Commit 3dca9d2d authored by Stuart Hodgson's avatar Stuart Hodgson Committed by Ben Hutchings

sfc: Do not attempt to flush queues if DMA is disabled

efx_nic_fatal_interrupt() disables DMA before scheduling a reset.
After this, we need not and *cannot* flush queues.
Signed-off-by: default avatarBen Hutchings <bhutchings@solarflare.com>
parent 2e7d21c5
...@@ -656,25 +656,30 @@ static void efx_stop_datapath(struct efx_nic *efx) ...@@ -656,25 +656,30 @@ static void efx_stop_datapath(struct efx_nic *efx)
struct efx_channel *channel; struct efx_channel *channel;
struct efx_tx_queue *tx_queue; struct efx_tx_queue *tx_queue;
struct efx_rx_queue *rx_queue; struct efx_rx_queue *rx_queue;
struct pci_dev *dev = efx->pci_dev;
int rc; int rc;
EFX_ASSERT_RESET_SERIALISED(efx); EFX_ASSERT_RESET_SERIALISED(efx);
BUG_ON(efx->port_enabled); BUG_ON(efx->port_enabled);
rc = efx_nic_flush_queues(efx); /* Only perform flush if dma is enabled */
if (rc && EFX_WORKAROUND_7803(efx)) { if (dev->is_busmaster) {
/* Schedule a reset to recover from the flush failure. The rc = efx_nic_flush_queues(efx);
* descriptor caches reference memory we're about to free,
* but falcon_reconfigure_mac_wrapper() won't reconnect if (rc && EFX_WORKAROUND_7803(efx)) {
* the MACs because of the pending reset. */ /* Schedule a reset to recover from the flush failure. The
netif_err(efx, drv, efx->net_dev, * descriptor caches reference memory we're about to free,
"Resetting to recover from flush failure\n"); * but falcon_reconfigure_mac_wrapper() won't reconnect
efx_schedule_reset(efx, RESET_TYPE_ALL); * the MACs because of the pending reset. */
} else if (rc) { netif_err(efx, drv, efx->net_dev,
netif_err(efx, drv, efx->net_dev, "failed to flush queues\n"); "Resetting to recover from flush failure\n");
} else { efx_schedule_reset(efx, RESET_TYPE_ALL);
netif_dbg(efx, drv, efx->net_dev, } else if (rc) {
"successfully flushed all queues\n"); netif_err(efx, drv, efx->net_dev, "failed to flush queues\n");
} else {
netif_dbg(efx, drv, efx->net_dev,
"successfully flushed all queues\n");
}
} }
efx_for_each_channel(channel, efx) { efx_for_each_channel(channel, efx) {
......
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