Merge http://linuxusb.bkbits.net/linus-2.5

into home.transmeta.com:/home/torvalds/v2.5/linux

arch/arm/Makefile

@@ -10,10 +10,12 @@
 LDFLAGS_vmlinux	:=-p -X -T arch/arm/vmlinux.lds
 OBJCOPYFLAGS	:=-O binary -R .note -R .comment -S
 GZFLAGS		:=-9
-CFLAGS		+=-pipe
+#CFLAGS		+=-pipe
+
+CFLAGS		:=$(CFLAGS:-O2=-Os)
 
 ifneq ($(CONFIG_NO_FRAME_POINTER),y)
-CFLAGS		:=$(CFLAGS:-fomit-frame-pointer=)
+CFLAGS		:=$(CFLAGS: -fomit-frame-pointer=)
 endif
 
 ifeq ($(CONFIG_DEBUG_INFO),y)
@@ -24,7 +26,7 @@ endif
 # the options further down the list override previous items.
 #
 apcs-$(CONFIG_CPU_32)		:=-mapcs-32
-apcs-$(CONFIG_CPU_26)		:=-mapcs-26 -mcpu=arm3 -Os
+apcs-$(CONFIG_CPU_26)		:=-mapcs-26 -mcpu=arm3
 
 # This selects which instruction set is used.
 # Note that GCC is lame - it doesn't numerically define an
@@ -212,8 +214,11 @@ include/asm-arm/.proc: $(wildcard include/config/cpu/32.h) $(wildcard include/co
 	@ln -sf proc-$(PROCESSOR) include/asm-arm/proc
 	@touch $@
 
-prepare: include/asm-arm/.arch include/asm-arm/.proc \
-	 include/asm-arm/constants.h
+prepare: maketools
+
+.PHONY: maketools
+maketools: include/asm-arm/.arch include/asm-arm/.proc \
+	 include/asm-arm/constants.h include/linux/version.h FORCE
 	@$(MAKETOOLS)
 
 vmlinux: arch/arm/vmlinux.lds
@@ -222,6 +227,7 @@ arch/arm/vmlinux.lds: arch/arm/Makefile $(LDSCRIPT) \
 	$(wildcard include/config/cpu/32.h) \
 	$(wildcard include/config/cpu/26.h) \
 	$(wildcard include/config/arch/*.h)
+	@echo '  Generating $@'
 	@sed 's/TEXTADDR/$(TEXTADDR)/;s/DATAADDR/$(DATAADDR)/' $(LDSCRIPT) >$@
 
 bzImage zImage zinstall Image bootpImage install: vmlinux
@@ -243,10 +249,6 @@ archmrproper: FORCE
 archclean: FORCE
 	@$(MAKEBOOT) clean
 
-# we need version.h
-maketools: include/linux/version.h FORCE
-	@$(MAKETOOLS)
-
 # My testing targets (that short circuit a few dependencies)
 zImg:;	@$(MAKEBOOT) zImage
 Img:;	@$(MAKEBOOT) Image

arch/arm/config.in

@@ -153,18 +153,15 @@ if [ "$CONFIG_ARCH_EP7211" = "y" -o \
 fi
 endmenu
 
-if [ "$CONFIG_ARCH_IOP310" = "y" ]; then
-   mainmenu_option next_comment
-   comment 'IOP310 Implementation Options'
-   choice 'IOP310 System Type' \
-   	"IQ80310	CONFIG_ARCH_IQ80310" IQ80310
-   comment 'IOP310 Chipset Features'
-   bool 'Support Intel 80312 Application Accelerator Unit (EXPERIMENTAL)' CONFIG_IOP310_AAU
-   bool 'Support Intel 80312 DMA (EXPERIMENTAL)' CONFIG_IOP310_DMA
-   bool 'Support Intel 80312 Messaging Unit (EXPERIMENTAL)' CONFIG_IOP310_MU
-   bool 'Support Intel 80312 Performance Monitor (EXPERIMENTAL)' CONFIG_IOP310_PMON
-   endmenu
-fi
+mainmenu_option next_comment
+comment 'IOP310 Implementation Options'
+dep_bool '  IQ80310' CONFIG_ARCH_IQ80310 $CONFIG_ARCH_IOP310
+comment 'IOP310 Chipset Features'
+dep_bool 'Support Intel 80312 Application Accelerator Unit (EXPERIMENTAL)' CONFIG_IOP310_AAU $CONFIG_ARCH_IOP310 $CONFIG_EXPERIMENTAL
+dep_bool 'Support Intel 80312 DMA (EXPERIMENTAL)' CONFIG_IOP310_DMA $CONFIG_ARCH_IOP310 $CONFIG_EXPERIMENTAL
+dep_bool 'Support Intel 80312 Messaging Unit (EXPERIMENTAL)' CONFIG_IOP310_MU $CONFIG_ARCH_IOP310 $CONFIG_EXPERIMENTAL
+dep_bool 'Support Intel 80312 Performance Monitor (EXPERIMENTAL)' CONFIG_IOP310_PMON $CONFIG_ARCH_IOP310 $CONFIG_EXPERIMENTAL
+endmenu
 
 # Definitions to make life easier
 if [ "$CONFIG_ARCH_ARCA5K" = "y" -o \

arch/arm/kernel/entry-armv.S

@@ -712,7 +712,6 @@ __dabt_svc:	sub	sp, sp, #S_FRAME_SIZE
 		mrs	r9, cpsr			@ Enable interrupts if they were
 		tst	r3, #PSR_I_BIT
 		biceq	r9, r9, #PSR_I_BIT		@ previously
-		mov	r0, r2				@ *** remove once everyones in sync
 /*
  * This routine must not corrupt r9
  */
@@ -855,7 +854,6 @@ __dabt_usr:	sub	sp, sp, #S_FRAME_SIZE		@ Allocate frame size in one go
 		stmdb	r5, {sp, lr}^
 		alignment_trap r7, r7, __temp_abt
 		zero_fp
-		mov	r0, r2				@ remove once everyones in sync
 #ifdef MULTI_ABORT
 		ldr	r4, .LCprocfns			@ pass r0, r3 to
 		mov	lr, pc				@ processor code
@@ -913,10 +911,13 @@ __und_usr:	sub	sp, sp, #S_FRAME_SIZE		@ Allocate frame size in one go
 		stmdb	r8, {sp, lr}^			@ Save user sp, lr
 		alignment_trap r4, r7, __temp_und
 		zero_fp
+		tst	r6, #PSR_T_BIT			@ Thumb mode?
+		bne	fpundefinstr			@ ignore FP
 		adrsvc	al, r9, ret_from_exception	@ r9  = normal FP return
 		adrsvc	al, lr, fpundefinstr		@ lr  = undefined instr return
 
-call_fpe:	get_thread_info r10			@ get current thread
+call_fpe:	set_cpsr_c r0, #MODE_SVC		@ Enable interrupts
+		get_thread_info r10			@ get current thread
 		ldr	r4, [r10, #TI_TASK]		@ get current task
 		mov	r8, #1
 		strb	r8, [r4, #TSK_USED_MATH]	@ set current->used_math
@@ -924,8 +925,7 @@ call_fpe:	get_thread_info r10			@ get current thread
 		add	r10, r10, #TI_FPSTATE		@ r10 = workspace
 		ldr	pc, [r4]			@ Call FP module USR entry point
 
-fpundefinstr:	set_cpsr_c r0, #MODE_SVC		@ Enable interrupts
-		mov	r0, sp
+fpundefinstr:	mov	r0, sp
 		adrsvc	al, lr, ret_from_exception
 		b	do_undefinstr
 

arch/arm/kernel/irq.c

@@ -202,8 +202,7 @@ __do_irq(unsigned int irq, struct irqaction *action, struct pt_regs *regs)
 	if (status & SA_SAMPLE_RANDOM)
 		add_interrupt_randomness(irq);
 
-	__cli();
-	spin_lock(&irq_controller_lock);
+	spin_lock_irq(&irq_controller_lock);
 }
 
 /*
@@ -634,6 +633,8 @@ unsigned long probe_irq_on(void)
 
 		irq_desc[i].probing = 1;
 		irq_desc[i].triggered = 0;
+		if (irq_desc[i].chip->type)
+			irq_desc[i].chip->type(i, IRQT_PROBE);
 		irq_desc[i].chip->unmask(i);
 		irqs += 1;
 	}

arch/arm/kernel/process.c

@@ -75,10 +75,10 @@ void (*pm_power_off)(void);
  */
 void default_idle(void)
 {
-	__cli();
+	local_irq_disable();
 	if (!need_resched() && !hlt_counter)
 		arch_idle();
-	__sti();
+	local_irq_enable();
 }
 
 /*

arch/arm/kernel/ptrace.c

@@ -40,12 +40,17 @@
  * Get the address of the live pt_regs for the specified task.
  * These are saved onto the top kernel stack when the process
  * is not running.
+ *
+ * Note: if a user thread is execve'd from kernel space, the
+ * kernel stack will not be empty on entry to the kernel, so
+ * ptracing these tasks will fail.
  */
 static inline struct pt_regs *
 get_user_regs(struct task_struct *task)
 {
 	return (struct pt_regs *)
-		((unsigned long)task->thread_info + 8192 - sizeof(struct pt_regs));
+		((unsigned long)task->thread_info + THREAD_SIZE -
+				 8 - sizeof(struct pt_regs));
 }
 
 /*
@@ -54,7 +59,7 @@ get_user_regs(struct task_struct *task)
  * this routine assumes that all the privileged stacks are in our
  * data space.
  */
-static inline long get_stack_long(struct task_struct *task, int offset)
+static inline long get_user_reg(struct task_struct *task, int offset)
 {
 	return get_user_regs(task)->uregs[offset];
 }
@@ -66,7 +71,7 @@ static inline long get_stack_long(struct task_struct *task, int offset)
  * data space.
  */
 static inline int
-put_stack_long(struct task_struct *task, int offset, long data)
+put_user_reg(struct task_struct *task, int offset, long data)
 {
 	struct pt_regs newregs, *regs = get_user_regs(task);
 	int ret = -EINVAL;
@@ -111,7 +116,7 @@ ptrace_getrn(struct task_struct *child, unsigned long insn)
 	unsigned int reg = (insn >> 16) & 15;
 	unsigned long val;
 
-	val = get_stack_long(child, reg);
+	val = get_user_reg(child, reg);
 	if (reg == 15)
 		val = pc_pointer(val + 8);
 
@@ -133,10 +138,10 @@ ptrace_getaluop2(struct task_struct *child, unsigned long insn)
 		shift = (insn >> 8) & 15;
 		type = 3;
 	} else {
-		val = get_stack_long (child, insn & 15);
+		val = get_user_reg (child, insn & 15);
 
 		if (insn & (1 << 4))
-			shift = (int)get_stack_long (child, (insn >> 8) & 15);
+			shift = (int)get_user_reg (child, (insn >> 8) & 15);
 		else
 			shift = (insn >> 7) & 31;
 
@@ -166,7 +171,7 @@ ptrace_getldrop2(struct task_struct *child, unsigned long insn)
 	int shift;
 	int type;
 
-	val = get_stack_long(child, insn & 15);
+	val = get_user_reg(child, insn & 15);
 	shift = (insn >> 7) & 31;
 	type = (insn >> 5) & 3;
 
@@ -215,7 +220,7 @@ get_branch_address(struct task_struct *child, unsigned long pc, unsigned long in
 
 		aluop1 = ptrace_getrn(child, insn);
 		aluop2 = ptrace_getaluop2(child, insn);
-		ccbit  = get_stack_long(child, REG_PSR) & PSR_C_BIT ? 1 : 0;
+		ccbit  = get_user_reg(child, REG_PSR) & PSR_C_BIT ? 1 : 0;
 
 		switch (insn & OP_MASK) {
 		case OP_AND: alt = aluop1 & aluop2;		break;
@@ -270,13 +275,7 @@ get_branch_address(struct task_struct *child, unsigned long pc, unsigned long in
 			unsigned int nr_regs;
 
 			if (insn & (1 << 23)) {
-				nr_regs = insn & 65535;
-
-				nr_regs = (nr_regs & 0x5555) + ((nr_regs & 0xaaaa) >> 1);
-				nr_regs = (nr_regs & 0x3333) + ((nr_regs & 0xcccc) >> 2);
-				nr_regs = (nr_regs & 0x0707) + ((nr_regs & 0x7070) >> 4);
-				nr_regs = (nr_regs & 0x000f) + ((nr_regs & 0x0f00) >> 8);
-				nr_regs <<= 2;
+				nr_regs = hweight16(insn & 65535) << 2;
 
 				if (!(insn & (1 << 24)))
 					nr_regs -= 4;
@@ -348,6 +347,11 @@ int ptrace_set_bpt(struct task_struct *child)
 	regs = get_user_regs(child);
 	pc = instruction_pointer(regs);
 
+	if (thumb_mode(regs)) {
+		printk(KERN_WARNING "ptrace: can't handle thumb mode\n");
+		return -EINVAL;
+	}
+
 	res = read_tsk_long(child, pc, &insn);
 	if (!res) {
 		struct debug_info *dbg = &child->thread.debug;
@@ -411,6 +415,118 @@ void ptrace_disable(struct task_struct *child)
 	__ptrace_cancel_bpt(child);
 }
 
+/*
+ * Handle hitting a breakpoint.
+ */
+void ptrace_break(struct task_struct *tsk, struct pt_regs *regs)
+{
+	siginfo_t info;
+
+	/*
+	 * The PC is always left pointing at the next instruction.  Fix this.
+	 */
+	regs->ARM_pc -= 4;
+
+	if (tsk->thread.debug.nsaved == 0)
+		printk(KERN_ERR "ptrace: bogus breakpoint trap\n");
+
+	__ptrace_cancel_bpt(tsk);
+
+	info.si_signo = SIGTRAP;
+	info.si_errno = 0;
+	info.si_code  = TRAP_BRKPT;
+	info.si_addr  = (void *)instruction_pointer(regs) -
+			 (thumb_mode(regs) ? 2 : 4);
+
+	force_sig_info(SIGTRAP, &info, tsk);
+}
+
+/*
+ * Read the word at offset "off" into the "struct user".  We
+ * actually access the pt_regs stored on the kernel stack.
+ */
+static int ptrace_read_user(struct task_struct *tsk, unsigned long off,
+			    unsigned long *ret)
+{
+	unsigned long tmp;
+
+	if (off & 3 || off >= sizeof(struct user))
+		return -EIO;
+
+	tmp = 0;
+	if (off < sizeof(struct pt_regs))
+		tmp = get_user_reg(tsk, off >> 2);
+
+	return put_user(tmp, ret);
+}
+
+/*
+ * Write the word at offset "off" into "struct user".  We
+ * actually access the pt_regs stored on the kernel stack.
+ */
+static int ptrace_write_user(struct task_struct *tsk, unsigned long off,
+			     unsigned long val)
+{
+	if (off & 3 || off >= sizeof(struct user))
+		return -EIO;
+
+	if (off >= sizeof(struct pt_regs))
+		return 0;
+
+	return put_user_reg(tsk, off >> 2, val);
+}
+
+/*
+ * Get all user integer registers.
+ */
+static int ptrace_getregs(struct task_struct *tsk, void *uregs)
+{
+	struct pt_regs *regs = get_user_regs(tsk);
+
+	return copy_to_user(uregs, regs, sizeof(struct pt_regs)) ? -EFAULT : 0;
+}
+
+/*
+ * Set all user integer registers.
+ */
+static int ptrace_setregs(struct task_struct *tsk, void *uregs)
+{
+	struct pt_regs newregs;
+	int ret;
+
+	ret = -EFAULT;
+	if (copy_from_user(&newregs, uregs, sizeof(struct pt_regs)) == 0) {
+		struct pt_regs *regs = get_user_regs(tsk);
+
+		ret = -EINVAL;
+		if (valid_user_regs(&newregs)) {
+			*regs = newregs;
+			ret = 0;
+		}
+	}
+
+	return ret;
+}
+
+/*
+ * Get the child FPU state.
+ */
+static int ptrace_getfpregs(struct task_struct *tsk, void *ufp)
+{
+	return copy_to_user(ufp, &tsk->thread_info->fpstate,
+			    sizeof(struct user_fp)) ? -EFAULT : 0;
+}
+
+/*
+ * Set the child FPU state.
+ */
+static int ptrace_setfpregs(struct task_struct *tsk, void *ufp)
+{
+	tsk->used_math = 1;
+	return copy_from_user(&tsk->thread_info->fpstate, ufp,
+			      sizeof(struct user_fp)) ? -EFAULT : 0;
+}
+
 static int do_ptrace(int request, struct task_struct *child, long addr, long data)
 {
 	unsigned long tmp;
@@ -427,18 +543,8 @@ static int do_ptrace(int request, struct task_struct *child, long addr, long dat
 				ret = put_user(tmp, (unsigned long *) data);
 			break;
 
-		/*
-		 * read the word at location "addr" in the user registers.
-		 */
 		case PTRACE_PEEKUSR:
-			ret = -EIO;
-			if ((addr & 3) || addr < 0 || addr >= sizeof(struct user))
-				break;
-
-			tmp = 0;  /* Default return condition */
-			if (addr < sizeof(struct pt_regs))
-				tmp = get_stack_long(child, (int)addr >> 2);
-			ret = put_user(tmp, (unsigned long *)data);
+			ret = ptrace_read_user(child, addr, (unsigned long *)data);
 			break;
 
 		/*
@@ -449,16 +555,8 @@ static int do_ptrace(int request, struct task_struct *child, long addr, long dat
 			ret = write_tsk_long(child, addr, data);
 			break;
 
-		/*
-		 * write the word at location addr in the user registers.
-		 */
 		case PTRACE_POKEUSR:
-			ret = -EIO;
-			if ((addr & 3) || addr < 0 || addr >= sizeof(struct user))
-				break;
-
-			if (addr < sizeof(struct pt_regs))
-				ret = put_stack_long(child, (int)addr >> 2, data);
+			ret = ptrace_write_user(child, addr, data);
 			break;
 
 		/*
@@ -486,14 +584,12 @@ static int do_ptrace(int request, struct task_struct *child, long addr, long dat
 		 * exit.
 		 */
 		case PTRACE_KILL:
-			/* already dead */
-			ret = 0;
-			if (child->state == TASK_ZOMBIE)
-				break;
-			child->exit_code = SIGKILL;
 			/* make sure single-step breakpoint is gone. */
 			__ptrace_cancel_bpt(child);
-			wake_up_process(child);
+			if (child->state != TASK_ZOMBIE) {
+				child->exit_code = SIGKILL;
+				wake_up_process(child);
+			}
 			ret = 0;
 			break;
 
@@ -512,71 +608,32 @@ static int do_ptrace(int request, struct task_struct *child, long addr, long dat
 			ret = 0;
 			break;
 
-		/*
-		 * detach a process that was attached.
-		 */
 		case PTRACE_DETACH:
 			ret = ptrace_detach(child, data);
 			break;
 
-		/*
-		 * Get all gp regs from the child.
-		 */
-		case PTRACE_GETREGS: {
-			struct pt_regs *regs = get_user_regs(child);
-
-			ret = 0;
-			if (copy_to_user((void *)data, regs,
-					 sizeof(struct pt_regs)))
-				ret = -EFAULT;
-
+		case PTRACE_GETREGS:
+			ret = ptrace_getregs(child, (void *)data);
 			break;
-		}
 
-		/*
-		 * Set all gp regs in the child.
-		 */
-		case PTRACE_SETREGS: {
-			struct pt_regs newregs;
-
-			ret = -EFAULT;
-			if (copy_from_user(&newregs, (void *)data,
-					   sizeof(struct pt_regs)) == 0) {
-				struct pt_regs *regs = get_user_regs(child);
-
-				ret = -EINVAL;
-				if (valid_user_regs(&newregs)) {
-					*regs = newregs;
-					ret = 0;
-				}
-			}
+		case PTRACE_SETREGS:
+			ret = ptrace_setregs(child, (void *)data);
 			break;
-		}
 
-		/*
-		 * Get the child FPU state.
-		 */
 		case PTRACE_GETFPREGS:
-			ret = -EIO;
-			if (!access_ok(VERIFY_WRITE, (void *)data, sizeof(struct user_fp)))
-				break;
-
-			/* we should check child->used_math here */
-			ret = __copy_to_user((void *)data, &child->thread_info->fpstate,
-					     sizeof(struct user_fp)) ? -EFAULT : 0;
+			ret = ptrace_getfpregs(child, (void *)data);
 			break;
 		
-		/*
-		 * Set the child FPU state.
-		 */
 		case PTRACE_SETFPREGS:
-			ret = -EIO;
-			if (!access_ok(VERIFY_READ, (void *)data, sizeof(struct user_fp)))
-				break;
+			ret = ptrace_setfpregs(child, (void *)data);
+			break;
 
-			child->used_math = 1;
-			ret = __copy_from_user(&child->thread_info->fpstate, (void *)data,
-					   sizeof(struct user_fp)) ? -EFAULT : 0;
+		case PTRACE_SETOPTIONS:
+			if (data & PTRACE_O_TRACESYSGOOD)
+				child->ptrace |= PT_TRACESYSGOOD;
+			else
+				child->ptrace &= ~PT_TRACESYSGOOD;
+			ret = 0;
 			break;
 
 		default:

arch/arm/kernel/ptrace.h

 /*
  *  linux/arch/arm/kernel/ptrace.h
  *
- *  Copyright (C) 2000 Russell King
+ *  Copyright (C) 2000-2002 Russell King
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -9,6 +9,7 @@
  */
 extern void __ptrace_cancel_bpt(struct task_struct *);
 extern int ptrace_set_bpt(struct task_struct *);
+extern void ptrace_break(struct task_struct *, struct pt_regs *);
 
 /*
  * Clear a breakpoint, if one exists.

arch/arm/kernel/signal.c

 /*
  *  linux/arch/arm/kernel/signal.c
  *
- *  Copyright (C) 1995-2001 Russell King
+ *  Copyright (C) 1995-2002 Russell King
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -17,15 +17,15 @@
 #include <linux/signal.h>
 #include <linux/wait.h>
 #include <linux/ptrace.h>
-#include <linux/stddef.h>
-#include <linux/unistd.h>
 #include <linux/personality.h>
 #include <linux/tty.h>
+#include <linux/binfmts.h>
 #include <linux/elf.h>
 
 #include <asm/pgalloc.h>
 #include <asm/ucontext.h>
 #include <asm/uaccess.h>
+#include <asm/unistd.h>
 
 #include "ptrace.h"
 
@@ -49,7 +49,7 @@ static const unsigned long retcodes[4] = {
 	SWI_SYS_RT_SIGRETURN,	SWI_THUMB_RT_SIGRETURN
 };
 
-asmlinkage int do_signal(sigset_t *oldset, struct pt_regs * regs, int syscall);
+static int do_signal(sigset_t *oldset, struct pt_regs * regs, int syscall);
 
 /*
  * atomically swap in the new signal mask, and wait for a signal.
@@ -325,7 +325,7 @@ setup_return(struct pt_regs *regs, struct k_sigaction *ka,
 	unsigned long retcode;
 	int thumb = 0;
 #ifdef CONFIG_CPU_32
-	unsigned long cpsr = regs->ARM_cpsr;
+	unsigned long cpsr = regs->ARM_cpsr & ~PSR_f;
 
 	/*
 	 * Maybe we need to deliver a 32-bit signal to a 26-bit task.
@@ -501,7 +501,7 @@ handle_signal(unsigned long sig, struct k_sigaction *ka,
  * the kernel can handle, and then we build all the user-level signal handling
  * stack-frames in one go after that.
  */
-int do_signal(sigset_t *oldset, struct pt_regs *regs, int syscall)
+static int do_signal(sigset_t *oldset, struct pt_regs *regs, int syscall)
 {
 	struct k_sigaction *ka;
 	siginfo_t info;
@@ -516,9 +516,6 @@ int do_signal(sigset_t *oldset, struct pt_regs *regs, int syscall)
 	if (!user_mode(regs))
 		return 0;
 
-	if (!oldset)
-		oldset = &current->blocked;
-
 	single_stepping = ptrace_cancel_bpt(current);
 
 	for (;;) {
@@ -598,6 +595,7 @@ int do_signal(sigset_t *oldset, struct pt_regs *regs, int syscall)
 				if (sig && !(sig->action[SIGCHLD-1].sa.sa_flags & SA_NOCLDSTOP))
 					notify_parent(current, SIGCHLD);
 				schedule();
+				single_stepping |= ptrace_cancel_bpt(current);
 				continue;
 			}
 
@@ -655,5 +653,5 @@ asmlinkage void
 do_notify_resume(struct pt_regs *regs, unsigned int thread_flags, int syscall)
 {
 	if (thread_flags & _TIF_SIGPENDING)
-		do_signal(NULL, regs, syscall);
+		do_signal(&current->blocked, regs, syscall);
 }

arch/arm/kernel/traps.c

 /*
  *  linux/arch/arm/kernel/traps.c
  *
- *  Copyright (C) 1995, 1996 Russell King
+ *  Copyright (C) 1995-2002 Russell King
  *  Fragments that appear the same as linux/arch/i386/kernel/traps.c (C) Linus Torvalds
  *
  * This program is free software; you can redistribute it and/or modify
@@ -66,8 +66,17 @@ static int verify_stack(unsigned long sp)
 static void dump_mem(const char *str, unsigned long bottom, unsigned long top)
 {
 	unsigned long p = bottom & ~31;
+	mm_segment_t fs;
 	int i;
 
+	/*
+	 * We need to switch to kernel mode so that we can use __get_user
+	 * to safely read from kernel space.  Note that we now dump the
+	 * code first, just in case the backtrace kills us.
+	 */
+	fs = get_fs();
+	set_fs(KERNEL_DS);
+
 	printk("%s", str);
 	printk("(0x%08lx to 0x%08lx)\n", bottom, top);
 
@@ -86,6 +95,8 @@ static void dump_mem(const char *str, unsigned long bottom, unsigned long top)
 		}
 		printk ("\n");
 	}
+
+	set_fs(fs);
 }
 
 static void dump_instr(struct pt_regs *regs)
@@ -93,8 +104,17 @@ static void dump_instr(struct pt_regs *regs)
 	unsigned long addr = instruction_pointer(regs);
 	const int thumb = thumb_mode(regs);
 	const int width = thumb ? 4 : 8;
+	mm_segment_t fs;
 	int i;
 
+	/*
+	 * We need to switch to kernel mode so that we can use __get_user
+	 * to safely read from kernel space.  Note that we now dump the
+	 * code first, just in case the backtrace kills us.
+	 */
+	fs = get_fs();
+	set_fs(KERNEL_DS);
+
 	printk("Code: ");
 	for (i = -4; i < 1; i++) {
 		unsigned int val, bad;
@@ -112,6 +132,8 @@ static void dump_instr(struct pt_regs *regs)
 		}
 	}
 	printk("\n");
+
+	set_fs(fs);
 }
 
 static void dump_stack(struct task_struct *tsk, unsigned long sp)
@@ -171,22 +193,9 @@ NORET_TYPE void die(const char *str, struct pt_regs *regs, int err)
 		current->comm, current->pid, tsk->thread_info + 1);
 
 	if (!user_mode(regs) || in_interrupt()) {
-		mm_segment_t fs;
-
-		/*
-		 * We need to switch to kernel mode so that we can
-		 * use __get_user to safely read from kernel space.
-		 * Note that we now dump the code first, just in case
-		 * the backtrace kills us.
-		 */
-		fs = get_fs();
-		set_fs(KERNEL_DS);
-
 		dump_stack(tsk, (unsigned long)(regs + 1));
 		dump_backtrace(regs, tsk);
 		dump_instr(regs);
-
-		set_fs(fs);
 	}
 
 	spin_unlock_irq(&die_lock);
@@ -233,7 +242,7 @@ asmlinkage void do_undefinstr(struct pt_regs *regs)
 }
 
 #ifdef CONFIG_CPU_26
-asmlinkage void do_excpt(int address, struct pt_regs *regs, int mode)
+asmlinkage void do_excpt(unsigned long address, struct pt_regs *regs, int mode)
 {
 	siginfo_t info;
 
@@ -274,21 +283,12 @@ asmlinkage void do_unexp_fiq (struct pt_regs *regs)
 asmlinkage void bad_mode(struct pt_regs *regs, int reason, int proc_mode)
 {
 	unsigned int vectors = vectors_base();
-	mm_segment_t fs;
 
 	console_verbose();
 
 	printk(KERN_CRIT "Bad mode in %s handler detected: mode %s\n",
 		handler[reason], processor_modes[proc_mode]);
 
-	/*
-	 * We need to switch to kernel mode so that we can use __get_user
-	 * to safely read from kernel space.  Note that we now dump the
-	 * code first, just in case the backtrace kills us.
-	 */
-	fs = get_fs();
-	set_fs(KERNEL_DS);
-
 	/*
 	 * Dump out the vectors and stub routines.  Maybe a better solution
 	 * would be to dump them out only if we detect that they are corrupted.
@@ -296,10 +296,8 @@ asmlinkage void bad_mode(struct pt_regs *regs, int reason, int proc_mode)
 	dump_mem(KERN_CRIT "Vectors: ", vectors, vectors + 0x40);
 	dump_mem(KERN_CRIT "Stubs: ", vectors + 0x200, vectors + 0x4b8);
 
-	set_fs(fs);
-
 	die("Oops", regs, 0);
-	cli();
+	local_irq_disable();
 	panic("bad mode");
 }
 
@@ -308,13 +306,7 @@ static int bad_syscall(int n, struct pt_regs *regs)
 	struct thread_info *thread = current_thread_info();
 	siginfo_t info;
 
-	/* You might think just testing `handler' would be enough, but PER_LINUX
-	 * points it to no_lcall7 to catch undercover SVr4 binaries.  Gutted.
-	 */
 	if (current->personality != PER_LINUX && thread->exec_domain->handler) {
-		/* Hand it off to iBCS.  The extra parameter and consequent type 
-		 * forcing is necessary because of the weird ARM calling convention.
-		 */
 		thread->exec_domain->handler(n, regs);
 		return regs->ARM_r0;
 	}
@@ -380,20 +372,7 @@ asmlinkage int arm_syscall(int no, struct pt_regs *regs)
 		return 0;
 
 	case NR(breakpoint): /* SWI BREAK_POINT */
-		/*
-		 * The PC is always left pointing at the next
-		 * instruction.  Fix this.
-		 */
-		regs->ARM_pc -= 4;
-		__ptrace_cancel_bpt(current);
-
-		info.si_signo = SIGTRAP;
-		info.si_errno = 0;
-		info.si_code  = TRAP_BRKPT;
-		info.si_addr  = (void *)instruction_pointer(regs) -
-				 (thumb_mode(regs) ? 2 : 4);
-
-		force_sig_info(SIGTRAP, &info, current);
+		ptrace_break(current, regs);
 		return regs->ARM_r0;
 
 #ifdef CONFIG_CPU_32
@@ -418,13 +397,13 @@ asmlinkage int arm_syscall(int no, struct pt_regs *regs)
 	case NR(usr26):
 		if (!(elf_hwcap & HWCAP_26BIT))
 			break;
-		regs->ARM_cpsr &= ~0x10;
+		regs->ARM_cpsr &= ~MODE32_BIT;
 		return regs->ARM_r0;
 
 	case NR(usr32):
 		if (!(elf_hwcap & HWCAP_26BIT))
 			break;
-		regs->ARM_cpsr |= 0x10;
+		regs->ARM_cpsr |= MODE32_BIT;
 		return regs->ARM_r0;
 #else
 	case NR(cacheflush):

arch/arm/lib/backtrace.S

@@ -52,25 +52,32 @@ ENTRY(c_backtrace)
 3:		tst	frame, mask		@ Check for address exceptions...
 		bne	1b
 
-1001:		ldmda	frame, {r0, r1, r2, r3}	@ fp, sp, lr, pc
-		mov	next, r0
-
+1001:		ldr	next, [frame, #-12]	@ get fp
+1002:		ldr	r2, [frame, #-4]	@ get lr
+1003:		ldr	r3, [frame, #0]		@ get pc
 		sub	save, r3, offset	@ Correct PC for prefetching
 		bic	save, save, mask
+1004:		ldr	r1, [save, #0]		@ get instruction at function
+		mov	r1, r1, lsr #10
+		ldr	r3, .Ldsi+4
+		teq	r1, r3
+		subeq	save, save, #4
 		adr	r0, .Lfe
 		mov	r1, save
 		bic	r2, r2, mask
 		bl	printk			@ print pc and link register
 
-		sub	r0, frame, #16
-1002:		ldr	r1, [save, #4]		@ get instruction at function+4
+		ldr	r0, [frame, #-8]	@ get sp
+		sub	r0, r0, #4
+1005:		ldr	r1, [save, #4]		@ get instruction at function+4
 		mov	r3, r1, lsr #10
 		ldr	r2, .Ldsi+4
 		teq	r3, r2			@ Check for stmia sp!, {args}
 		addeq	save, save, #4		@ next instruction
 		bleq	.Ldumpstm
 
-1003:		ldr	r1, [save, #4]		@ Get 'stmia sp!, {rlist, fp, ip, lr, pc}' instruction
+		sub	r0, frame, #16
+1006:		ldr	r1, [save, #4]		@ Get 'stmia sp!, {rlist, fp, ip, lr, pc}' instruction
 		mov	r3, r1, lsr #10
 		ldr	r2, .Ldsi
 		teq	r3, r2
@@ -87,7 +94,7 @@ ENTRY(c_backtrace)
  */
 		.section .fixup,"ax"
 		.align	0
-1004:		ldr	r0, =.Lbad
+1007:		ldr	r0, =.Lbad
 		mov	r1, frame
 		bl	printk
 		LOADREGS(fd, sp!, {r4 - r8, pc})
@@ -96,9 +103,12 @@ ENTRY(c_backtrace)
 		
 		.section __ex_table,"a"
 		.align	3
-		.long	1001b, 1004b
-		.long	1002b, 1004b
-		.long	1003b, 1004b
+		.long	1001b, 1007b
+		.long	1002b, 1007b
+		.long	1003b, 1007b
+		.long	1004b, 1007b
+		.long	1005b, 1007b
+		.long	1006b, 1007b
 		.previous
 
 #define instr r4

arch/arm/mach-arc/small_page.c

@@ -50,7 +50,7 @@
  */
 
 struct order {
-	struct page *queue;
+	struct list_head queue;
 	unsigned int mask;		/* (1 << shift) - 1		*/
 	unsigned int shift;		/* (1 << shift) size of page	*/
 	unsigned int block_mask;	/* nr_blocks - 1		*/
@@ -60,10 +60,10 @@ struct order {
 
 static struct order orders[] = {
 #if PAGE_SIZE == 4096
-	{ NULL, 2047, 11,  1, 0x00000003 }
+	{ LIST_HEAD_INIT(orders[0].queue), 2047, 11,  1, 0x00000003 }
 #elif PAGE_SIZE == 32768
-	{ NULL, 2047, 11, 15, 0x0000ffff },
-	{ NULL, 8191, 13,  3, 0x0000000f }
+	{ LIST_HEAD_INIT(orders[0].queue), 2047, 11, 15, 0x0000ffff },
+	{ LIST_HEAD_INIT(orders[1].queue), 8191, 13,  3, 0x0000000f }
 #else
 #error unsupported page size
 #endif
@@ -75,70 +75,49 @@ static struct order orders[] = {
 
 static spinlock_t small_page_lock = SPIN_LOCK_UNLOCKED;
 
-static void add_page_to_queue(struct page *page, struct page **p)
-{
-#ifdef PEDANTIC
-	if (page->pprev_hash)
-		PAGE_BUG(page);
-#endif
-	page->next_hash = *p;
-	if (*p)
-		(*p)->pprev_hash = &page->next_hash;
-	*p = page;
-	page->pprev_hash = p;
-}
-
-static void remove_page_from_queue(struct page *page)
-{
-	if (page->pprev_hash) {
-		if (page->next_hash)
-			page->next_hash->pprev_hash = page->pprev_hash;
-		*page->pprev_hash = page->next_hash;
-		page->pprev_hash = NULL;
-	}
-}
-
 static unsigned long __get_small_page(int priority, struct order *order)
 {
 	unsigned long flags;
 	struct page *page;
 	int offset;
 
-	if (!order->queue)
-		goto need_new_page;
+	do {
+		spin_lock_irqsave(&small_page_lock, flags);
+
+		if (list_empty(&order->queue))
+			goto need_new_page;
 
-	spin_lock_irqsave(&small_page_lock, flags);
-	page = order->queue;
+		page = list_entry(order->queue.next, struct page, list);
 again:
 #ifdef PEDANTIC
-	if (USED_MAP(page) & ~order->all_used)
-		PAGE_BUG(page);
+		if (USED_MAP(page) & ~order->all_used)
+			PAGE_BUG(page);
 #endif
-	offset = ffz(USED_MAP(page));
-	SET_USED(page, offset);
-	if (USED_MAP(page) == order->all_used)
-		remove_page_from_queue(page);
-	spin_unlock_irqrestore(&small_page_lock, flags);
+		offset = ffz(USED_MAP(page));
+		SET_USED(page, offset);
+		if (USED_MAP(page) == order->all_used)
+			list_del_init(&page->list);
+		spin_unlock_irqrestore(&small_page_lock, flags);
 
-	return (unsigned long) page_address(page) + (offset << order->shift);
+		return (unsigned long) page_address(page) + (offset << order->shift);
 
 need_new_page:
-	page = alloc_page(priority);
-
-	spin_lock_irqsave(&small_page_lock, flags);
-	if (!order->queue) {
-		if (!page)
-			goto no_page;
-		SetPageReserved(page);
-		USED_MAP(page) = 0;
-		cli();
-		add_page_to_queue(page, &order->queue);
-	} else {
+		spin_unlock_irqrestore(&small_page_lock, flags);
+		page = alloc_page(priority);
+		spin_lock_irqsave(&small_page_lock, flags);
+
+		if (list_empty(&order->queue)) {
+			if (!page)
+				goto no_page;
+			SetPageReserved(page);
+			USED_MAP(page) = 0;
+			list_add(&page->list, &order->queue);
+			goto again;
+		}
+
+		spin_unlock_irqrestore(&small_page_lock, flags);
 		__free_page(page);
-		cli();
-		page = order->queue;
-	}
-	goto again;
+	} while (1);
 
 no_page:
 	spin_unlock_irqrestore(&small_page_lock, flags);
@@ -173,7 +152,7 @@ static void __free_small_page(unsigned long spage, struct order *order)
 		spin_lock_irqsave(&small_page_lock, flags);
 
 		if (USED_MAP(page) == order->all_used)
-			add_page_to_queue(page, &order->queue);
+			list_add(&page->list, &order->queue);
 
 		if (!TEST_AND_CLEAR_USED(page, spage))
 			goto already_free;
@@ -189,7 +168,7 @@ static void __free_small_page(unsigned long spage, struct order *order)
 	/*
 	 * unlink the page from the small page queue and free it
 	 */
-	remove_page_from_queue(page);
+	list_del_init(&page->list);
 	spin_unlock_irqrestore(&small_page_lock, flags);
 	ClearPageReserved(page);
 	__free_page(page);

arch/arm/mach-footbridge/personal-pci.c

@@ -53,4 +53,4 @@ static int __init personal_pci_init(void)
 	return 0;
 }
 
-subsys_initcall(&personal_pci_init);
+subsys_initcall(personal_pci_init);

arch/arm/mach-integrator/arch.c

@@ -56,6 +56,7 @@ static int __init integrator_init(void)
 	register_kmi(&integrator_keyboard);
 	register_kmi(&integrator_mouse);
 #endif
+	return 0;
 }
 
 __initcall(integrator_init);

arch/arm/mach-integrator/cpu.c

@@ -3,7 +3,7 @@
  *
  *  Copyright (C) 2001 Deep Blue Solutions Ltd.
  *
- *  $Id: cpu.c,v 1.4 2002/05/29 11:41:55 rmk Exp $
+ *  $Id: cpu.c,v 1.5 2002/07/06 16:53:17 rmk Exp $
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -121,8 +121,16 @@ static int __init cpu_init(void)
 	cpu_freq_khz = vco_to_freq(vco, 1);
 
 #ifdef CONFIG_CPU_FREQ
-	cpufreq_init(cpu_freq_khz, 1000, 0);
-	cpufreq_setfunctions(integrator_validatespeed, integrator_setspeed);
+	{
+		struct cpufreq_driver cpufreq_driver;
+
+		cpufreq_driver.freq.min = 12000;
+		cpufreq_driver.freq.max = 160000;
+		cpufreq_driver.freq.cur = cpu_freq_khz;
+		cpufreq_driver.validate = &integrator_validatespeed;
+		cpufreq_driver.setspeed = &integrator_setspeed;
+		cpufreq_register(cpufreq_driver);
+	}
 #endif
 
 	cm_stat = __raw_readl(CM_STAT);

arch/arm/mach-iop310/iq80310-pci.c

@@ -25,10 +25,11 @@
  * format for those systems that do not already have PCI
  * interrupts properly routed.  We assume 1 <= pin <= 4
  */
-#define PCI_IRQ_TABLE_LOOKUP(minid,maxid)			 \
-({ int _ctl_ = -1;						 \
-   if (idsel >= minid && idsel <= maxid && pin >= 1 && pin <= 4) \
-      _ctl_ = pci_irq_table[idsel - minid][pin-1];		 \
+#define PCI_IRQ_TABLE_LOOKUP(minid,maxid)	\
+({ int _ctl_ = -1;				\
+   unsigned int _idsel = idsel - minid;		\
+   if (_idsel <= maxid)				\
+      _ctl_ = pci_irq_table[_idsel][pin-1];	\
    _ctl_; })
 
 #define INTA	IRQ_IQ80310_INTA
@@ -64,6 +65,8 @@ iq80310_pri_map_irq(struct pci_dev *dev, u8 idsel, u8 pin)
 {
 	irq_table *pci_irq_table;
 
+	BUG_ON(pin < 1 || pin > 4);
+
 	if (!system_rev) {
 		pci_irq_table = pci_pri_d_irq_table;
 	} else {
@@ -99,6 +102,8 @@ iq80310_sec_map_irq(struct pci_dev *dev, u8 idsel, u8 pin)
 {
 	irq_table *pci_irq_table;
 
+	BUG_ON(pin < 1 || pin > 4);
+
 	if (!system_rev) {
 		pci_irq_table = pci_sec_d_irq_table;
 	} else {

arch/arm/mach-sa1100/adsbitsy.c

@@ -59,7 +59,7 @@ static int __init adsbitsy_init(void)
 	/*
 	 * Enable PWM control for LCD
 	 */
-	SKPCR |= SKPCR_PWMCLKEN;
+	sa1111_enable_device(SKPCR_PWMCLKEN);
 	SKPWM0 = 0x7F;				// VEE
 	SKPEN0 = 1;
 	SKPWM1 = 0x01;				// Backlight

arch/arm/mach-sa1100/assabet.c

@@ -88,9 +88,21 @@ static int __init assabet_init(void)
 		return -EINVAL;
 
 	/*
-	 * Set the IRQ edges
+	 * Ensure that these pins are set as outputs and are driving
+	 * logic 0.  This ensures that we won't inadvertently toggle
+	 * the WS latch in the CPLD, and we don't float causing
+	 * excessive power drain.  --rmk
 	 */
-	set_irq_type(IRQ_GPIO23, IRQT_RISING);	/* UCB1300 */
+	GPDR |= GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
+	GPCR = GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
+
+	/*
+	 * Set up registers for sleep mode.
+	 */
+	PWER = PWER_GPIO0;
+	PGSR = 0;
+	PCFR = 0;
+	PSDR = 0;
 
 	sa1100fb_lcd_power = assabet_lcd_power;
 	sa1100fb_backlight_power = assabet_backlight_power;
@@ -254,13 +266,19 @@ static struct map_desc assabet_io_desc[] __initdata = {
 
 static void __init assabet_map_io(void)
 {
-	extern void neponset_map_io(void);
-
 	sa1100_map_io();
 	iotable_init(assabet_io_desc, ARRAY_SIZE(assabet_io_desc));
 
+	/*
+	 * Set SUS bit in SDCR0 so serial port 1 functions.
+	 * Its called GPCLKR0 in my SA1110 manual.
+	 */
+	Ser1SDCR0 |= SDCR0_SUS;
+
 	if (machine_has_neponset()) {
 #ifdef CONFIG_ASSABET_NEPONSET
+		extern void neponset_map_io(void);
+
 		/*
 		 * We map Neponset registers even if it isn't present since
 		 * many drivers will try to probe their stuff (and fail).
@@ -279,33 +297,11 @@ static void __init assabet_map_io(void)
 		 */
 		sa1100_register_uart(0, 3);
 		sa1100_register_uart(2, 1);
-		/*
-		 * Set SUS bit in SDCR0 so serial port 1 functions.
-		 * Its called GPCLKR0 in my SA1110 manual.
-		 */
-		Ser1SDCR0 |= SDCR0_SUS;
 	} else {
 		sa1100_register_uart_fns(&assabet_port_fns);
 		sa1100_register_uart(0, 1);	/* com port */
 		sa1100_register_uart(2, 3);	/* radio module */
 	}
-
-	/*
-	 * Ensure that these pins are set as outputs and are driving
-	 * logic 0.  This ensures that we won't inadvertently toggle
-	 * the WS latch in the CPLD, and we don't float causing
-	 * excessive power drain.  --rmk
-	 */
-	GPDR |= GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
-	GPCR = GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
-
-	/*
-	 * Set up registers for sleep mode.
-	 */
-	PWER = PWER_GPIO0;
-	PGSR = 0;
-	PCFR = 0;
-	PSDR = 0;
 }
 
 

arch/arm/mach-sa1100/cpu-sa1100.c

@@ -92,7 +92,7 @@
 
 extern unsigned int sa11x0_freq_to_ppcr(unsigned int khz);
 extern unsigned int sa11x0_validatespeed(unsigned int khz);
-
+extern unsigned int sa11x0_getspeed(void);
 
 typedef struct {
 	int speed;
@@ -187,7 +187,7 @@ static void sa1100_update_dram_timings(int current_speed, int new_speed)
 static int sa1100_dram_notifier(struct notifier_block *nb, 
 				unsigned long val, void *data)
 {
-	struct cpufreq_info *ci = data;
+	struct cpufreq_freqs *ci = data;
 	
 	switch(val) {
 	case CPUFREQ_MINMAX:
@@ -195,13 +195,13 @@ static int sa1100_dram_notifier(struct notifier_block *nb,
 		break;
 
 	case CPUFREQ_PRECHANGE:
-		if(ci->new_freq > ci->old_freq)
-			sa1100_update_dram_timings(ci->old_freq, ci->new_freq);
+		if(ci->new > ci->cur)
+			sa1100_update_dram_timings(ci->cur, ci->new);
 		break;
 
 	case CPUFREQ_POSTCHANGE:
-		if(ci->new_freq < ci->old_freq)
-			sa1100_update_dram_timings(ci->old_freq, ci->new_freq);
+		if(ci->new < ci->cur)
+			sa1100_update_dram_timings(ci->cur, ci->new);
 		break;
 		
 	default:
@@ -230,9 +230,19 @@ static int __init sa1100_dram_init(void)
 	int ret = -ENODEV;
 
 	if ((processor_id & CPU_SA1100_MASK) == CPU_SA1100_ID) {
+		cpufreq_driver_t cpufreq_driver;
+
 		ret = cpufreq_register_notifier(&sa1100_dram_block);
+		if (ret)
+			return ret;
+
+		cpufreq_driver.freq.min = 59000;
+		cpufreq_driver.freq.max = 287000;
+		cpufreq_driver.freq.cur = sa11x0_getspeed();
+		cpufreq_driver.validate = &sa11x0_validatespeed;
+		cpufreq_driver.setspeed = &sa1100_setspeed;
 
-		cpufreq_setfunctions(sa11x0_validatespeed, sa1100_setspeed);
+		ret = cpufreq_register(cpufreq_driver);<
 	}
 
 	return ret;

arch/arm/mach-sa1100/cpu-sa1110.c

@@ -3,7 +3,7 @@
  *
  *  Copyright (C) 2001 Russell King
  *
- *  $Id: cpu-sa1110.c,v 1.8 2002/01/09 17:13:27 rmk Exp $
+ *  $Id: cpu-sa1110.c,v 1.9 2002/07/06 16:53:18 rmk Exp $
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -31,6 +31,7 @@
 
 extern unsigned int sa11x0_freq_to_ppcr(unsigned int khz);
 extern unsigned int sa11x0_validatespeed(unsigned int khz);
+extern unsigned int sa11x0_getspeed(void);
 
 struct sdram_params {
 	u_char  rows;		/* bits				 */
@@ -88,6 +89,16 @@ static struct sdram_params samsung_km416s4030ct __initdata = {
 	cas_latency:	     3,
 };
 
+static struct sdram_params wbond_w982516ah75l_cl3_params __initdata = {
+	rows:		    16,
+	tck:		     8,
+	trcd:		    20,
+	trp:		    20,
+	twr:		     8,
+	refresh:	 64000,
+	cas_latency:	     3,
+};
+
 static struct sdram_params sdram_params;
 
 /*
@@ -287,6 +298,8 @@ static int __init sa1110_clk_init(void)
 		sdram = &samsung_km416s4030ct;
 
 	if (sdram) {
+		struct cpufreq_driver cpufreq_driver;
+
 		printk(KERN_DEBUG "SDRAM: tck: %d trcd: %d trp: %d"
 			" twr: %d refresh: %d cas_latency: %d\n",
 			sdram->tck, sdram->trcd, sdram->trp,
@@ -294,8 +307,15 @@ static int __init sa1110_clk_init(void)
 
 		memcpy(&sdram_params, sdram, sizeof(sdram_params));
 
-		sa1110_setspeed(cpufreq_get(0));
-		cpufreq_setfunctions(sa11x0_validatespeed, sa1110_setspeed);
+		sa1110_setspeed(sa11x0_getspeed());
+
+		cpufreq_driver.freq.min = 59000;
+		cpufreq_driver.freq.max = 287000;
+		cpufreq_driver.freq.cur = sa11x0_getspeed();
+		cpufreq_driver.validate = &sa11x0_validatespeed;
+		cpufreq_driver.setspeed = &sa1110_setspeed;
+
+		return cpufreq_register(cpufreq_driver);
 	}
 
 	return 0;

arch/arm/mach-sa1100/generic.c

@@ -76,13 +76,10 @@ unsigned int sa11x0_validatespeed(unsigned int khz)
 	return cclk_frequency_100khz[sa11x0_freq_to_ppcr(khz)] * 100;
 }
 
-static int __init sa11x0_init_clock(void)
+unsigned int sa11x0_getspeed(void)
 {
-	cpufreq_init(cclk_frequency_100khz[PPCR & 0xf] * 100, 59000, 287000);
-	return 0;
+	return cclk_frequency_100khz[PPCR & 0xf] * 100;
 }
-
-__initcall(sa11x0_init_clock);
 #else
 /*
  * We still need to provide this so building without cpufreq works.
@@ -100,7 +97,7 @@ EXPORT_SYMBOL(cpufreq_get);
 static void sa1100_power_off(void)
 {
 	mdelay(100);
-	cli();
+	local_irq_disable();
 	/* disable internal oscillator, float CS lines */
 	PCFR = (PCFR_OPDE | PCFR_FP | PCFR_FS);
 	/* enable wake-up on GPIO0 (Assabet...) */

arch/arm/mach-sa1100/graphicsmaster.c

@@ -49,7 +49,7 @@ static int __init graphicsmaster_init(void)
 	/*
 	 * Enable PWM control for LCD
 	 */
-	SKPCR |= SKPCR_PWMCLKEN;
+	sa1111_enable_device(SKPCR_PWMCLKEN);
 	SKPWM0 = 0x7F;				// VEE
 	SKPEN0 = 1;
 	SKPWM1 = 0x01;				// Backlight

arch/arm/mach-sa1100/irq.c

@@ -55,6 +55,12 @@ static int sa1100_gpio_type(unsigned int irq, unsigned int type)
 	else
 		mask = GPIO11_27_MASK(irq);
 
+	if (type == IRQT_PROBE) {
+		if ((GPIO_IRQ_rising_edge | GPIO_IRQ_falling_edge) & mask)
+			return 0;
+		type = __IRQT_RISEDGE | __IRQT_FALEDGE;
+	}
+
 	if (type & __IRQT_RISEDGE) {
 		GPIO_IRQ_rising_edge |= mask;
 	} else

arch/arm/mach-sa1100/pm.c

@@ -73,7 +73,7 @@ int pm_do_suspend(void)
 {
 	unsigned long sleep_save[SLEEP_SAVE_SIZE];
 
-	cli();
+	local_irq_disable();
 
 	leds_event(led_stop);
 
@@ -157,7 +157,7 @@ int pm_do_suspend(void)
 
 	leds_event(led_start);
 
-	sti();
+	local_irq_enable();
 
 	/*
 	 * Restore the CPU frequency settings.

arch/arm/mach-sa1100/sa1111.c

@@ -117,11 +117,12 @@ static int sa1111_type_lowirq(unsigned int irq, unsigned int flags)
 {
 	unsigned int mask = SA1111_IRQMASK_LO(irq);
 
+	if (flags == IRQT_PROBE)
+		return 0;
+
 	if ((!(flags & __IRQT_RISEDGE) ^ !(flags & __IRQT_FALEDGE)) == 0)
 		return -EINVAL;
 
-	printk("IRQ%d: %s edge\n", irq, flags & __IRQT_RISEDGE ? "rising" : "falling");
-
 	if (flags & __IRQT_RISEDGE)
 		INTPOL0 &= ~mask;
 	else
@@ -181,11 +182,12 @@ static int sa1111_type_highirq(unsigned int irq, unsigned int flags)
 {
 	unsigned int mask = SA1111_IRQMASK_HI(irq);
 
+	if (flags == IRQT_PROBE)
+		return 0;
+
 	if ((!(flags & __IRQT_RISEDGE) ^ !(flags & __IRQT_FALEDGE)) == 0)
 		return -EINVAL;
 
-	printk("IRQ%d: %s edge\n", irq, flags & __IRQT_RISEDGE ? "rising" : "falling");
-
 	if (flags & __IRQT_RISEDGE)
 		INTPOL1 &= ~mask;
 	else
@@ -302,7 +304,7 @@ sa1111_probe(struct device *parent, unsigned long phys_addr)
 	/*
 	 * Probe for the chip.  Only touch the SBI registers.
 	 */
-	id = readl(sa->base + SA1111_SKID);
+	id = sa1111_readl(sa->base + SA1111_SKID);
 	if ((id & SKID_ID_MASK) != SKID_SA1111_ID) {
 		printk(KERN_DEBUG "SA1111 not detected: ID = %08lx\n", id);
 		ret = -ENODEV;
@@ -370,11 +372,11 @@ void sa1111_wake(void)
 	/*
 	 * Turn VCO on, and disable PLL Bypass.
 	 */
-	r = readl(sa->base + SA1111_SKCR);
+	r = sa1111_readl(sa->base + SA1111_SKCR);
 	r &= ~SKCR_VCO_OFF;
-	writel(r, sa->base + SA1111_SKCR);
+	sa1111_writel(r, sa->base + SA1111_SKCR);
 	r |= SKCR_PLL_BYPASS | SKCR_OE_EN;
-	writel(r, sa->base + SA1111_SKCR);
+	sa1111_writel(r, sa->base + SA1111_SKCR);
 
 	/*
 	 * Wait lock time.  SA1111 manual _doesn't_
@@ -386,7 +388,7 @@ void sa1111_wake(void)
 	 * Enable RCLK.  We also ensure that RDYEN is set.
 	 */
 	r |= SKCR_RCLKEN | SKCR_RDYEN;
-	writel(r, sa->base + SA1111_SKCR);
+	sa1111_writel(r, sa->base + SA1111_SKCR);
 
 	/*
 	 * Wait 14 RCLK cycles for the chip to finish coming out
@@ -397,7 +399,7 @@ void sa1111_wake(void)
 	/*
 	 * Ensure all clocks are initially off.
 	 */
-	writel(0, sa->base + SA1111_SKPCR);
+	sa1111_writel(0, sa->base + SA1111_SKPCR);
 
 	local_irq_restore(flags);
 }
@@ -406,16 +408,18 @@ void sa1111_doze(void)
 {
 	struct sa1111_device *sa = sa1111;
 	unsigned long flags;
+	unsigned int val;
 
 	local_irq_save(flags);
 
-	if (readl(sa->base + SA1111_SKPCR) & SKPCR_UCLKEN) {
+	if (sa1111_readl(sa->base + SA1111_SKPCR) & SKPCR_UCLKEN) {
 		local_irq_restore(flags);
 		printk("SA1111 doze mode refused\n");
 		return;
 	}
 
-	writel(readl(sa->base + SA1111_SKCR) & ~SKCR_RCLKEN, sa->base + SA1111_SKCR);
+	val = sa1111_readl(sa->base + SA1111_SKCR);
+	sa1111_writel(val & ~SKCR_RCLKEN, sa->base + SA1111_SKCR);
 	local_irq_restore(flags);
 }
 
@@ -430,9 +434,37 @@ void sa1111_configure_smc(int sdram, unsigned int drac, unsigned int cas_latency
 	if (cas_latency == 3)
 		smcr |= SMCR_CLAT;
 
-	writel(smcr, sa->base + SA1111_SMCR);
+	sa1111_writel(smcr, sa->base + SA1111_SMCR);
+}
+
+EXPORT_SYMBOL(sa1111_wake);
+EXPORT_SYMBOL(sa1111_doze);
+
+void sa1111_enable_device(unsigned int mask)
+{
+	struct sa1111_device *sa = sa1111;
+	unsigned int val;
+
+	preempt_disable();
+	val = sa1111_readl(sa->base + SA1111_SKPCR);
+	sa1111_writel(val | mask, sa->base + SA1111_SKPCR);
+	preempt_enable();
+}
+
+void sa1111_disable_device(unsigned int mask)
+{
+	struct sa1111_device *sa = sa1111;
+	unsigned int val;
+
+	preempt_disable();
+	val = sa1111_readl(sa->base + SA1111_SKPCR);
+	sa1111_writel(val & ~mask, sa->base + SA1111_SKPCR);
+	preempt_enable();
 }
 
+EXPORT_SYMBOL(sa1111_enable_device);
+EXPORT_SYMBOL(sa1111_disable_device);
+
 /* According to the "Intel StrongARM SA-1111 Microprocessor Companion
  * Chip Specification Update" (June 2000), erratum #7, there is a
  * significant bug in Serial Audio Controller DMA. If the SAC is
@@ -527,7 +559,7 @@ int sa1111_init(struct device *parent, unsigned long phys, unsigned int irq)
 	 * We only need to turn on DCLK whenever we want to use the
 	 * DMA.  It can otherwise be held firmly in the off position.
 	 */
-	SKPCR |= SKPCR_DCLKEN;
+	sa1111_enable_device(SKPCR_DCLKEN);
 
 	/*
 	 * Enable the SA1110 memory bus request and grant signals.

arch/arm/mach-sa1100/shannon.c

@@ -13,6 +13,7 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/mach/serial_sa1100.h>
+#include <asm/arch/shannon.h>
 
 #include "generic.h"
 
@@ -23,13 +24,16 @@ static void __init shannon_map_io(void)
 
 	sa1100_register_uart(0, 3);
 	sa1100_register_uart(1, 1);
+
 	Ser1SDCR0 |= SDCR0_SUS;
 	GAFR |= (GPIO_UART_TXD | GPIO_UART_RXD);
-	GPDR |= GPIO_UART_TXD;
+	GPDR |= GPIO_UART_TXD | SHANNON_GPIO_CODEC_RESET;
 	GPDR &= ~GPIO_UART_RXD;
 	PPAR |= PPAR_UPR;
 
-	set_GPIO_IRQ_edge(SHANNON_GPIO_IRQ_CODEC);
+	/* reset the codec */
+	GPCR = SHANNON_GPIO_CODEC_RESET;
+	GPSR = SHANNON_GPIO_CODEC_RESET;
 }
 
 MACHINE_START(SHANNON, "Shannon (AKA: Tuxscreen)")

arch/arm/mach-sa1100/sleep.S

@@ -44,7 +44,8 @@ ENTRY(sa1100_cpu_suspend)
 	mrc 	p15, 0, r7, c1, c0, 0		@ control reg
 
 	@ store them plus current virtual stack ptr on stack
-	stmfd	sp!, {r4 - r7, sp}
+	mov	r8, sp
+	stmfd	sp!, {r4 - r8}
 
 	@ preserve phys address of stack
 	mov	r0, sp

arch/arm/mach-sa1100/system3.c

@@ -309,7 +309,7 @@ static void system3_lcd_on(void)
 	PTCTRL0_set( PT_CTRL0_LCD_EN );
 
 	/* brightness / contrast */
-	SKPCR |= SKPCR_PWMCLKEN;
+	sa1111_enable_device(SKPCR_PWMCLKEN);
 	PB_DDR = 0xFFFFFFFF;
 	SKPEN0 = 1;
 	SKPEN1 = 1;
@@ -325,7 +325,7 @@ static void system3_lcd_off(void)
 	PTCTRL0_clear( PT_CTRL0_LCD_EN );
 	SKPEN0 = 0;
 	SKPEN1 = 0;
-	SKPCR &= ~SKPCR_PWMCLKEN;
+	sa1111_disable_device(SKPCR_PWMCLKEN);
 }
 
 /**

arch/arm/mach-sa1100/xp860.c

@@ -22,7 +22,7 @@
 
 static void xp860_power_off(void)
 {
-	cli();
+	local_irq_disable();
 	GPDR |= GPIO_GPIO20;
 	GPSR = GPIO_GPIO20;
 	mdelay(1000);

arch/arm/mm/Makefile

@@ -42,7 +42,7 @@ p-$(CONFIG_CPU_SA1100)	+= proc-sa110.o   tlb-v4wb.o copypage-v4mc.o abort-ev4.o
 
 # ARMv5
 p-$(CONFIG_CPU_ARM926T)	+= proc-arm926.o  tlb-v4wb.o copypage-v4wb.o abort-ev5ej.o
-p-$(CONFIG_CPU_XSCALE)	+= proc-xscale.o  tlb-v4wb.o copypage-v5te.o abort-ev4t.o  minicache.o
+p-$(CONFIG_CPU_XSCALE)	+= proc-xscale.o  tlb-v4wb.o copypage-xscale.o abort-xscale.o minicache.o
 
 obj-y		+= $(sort $(p-y))
 

arch/arm/mm/abort-ev4.S

@@ -7,7 +7,7 @@
  *         : r3 = saved SPSR
  *
  * Returns : r0 = address of abort
- *	   : r1 = FSR, bit 8 = write
+ *	   : r1 = FSR, bit 11 = write
  *	   : r2-r8 = corrupted
  *	   : r9 = preserved
  *	   : sp = pointer to registers
@@ -22,8 +22,9 @@ ENTRY(v4_early_abort)
 	mrc	p15, 0, r1, c5, c0, 0		@ get FSR
 	mrc	p15, 0, r0, c6, c0, 0		@ get FAR
 	ldr	r3, [r2]			@ read aborted ARM instruction
+	bic	r1, r1, #1 << 11 | 1 << 10	@ clear bits 11 and 10 of FSR
 	tst	r3, #1 << 20			@ L = 1 -> write?
-	orreq	r1, r1, #1 << 8			@ yes.
+	orreq	r1, r1, #1 << 11		@ yes.
 	mov	pc, lr
 
 

arch/arm/mm/abort-ev4t.S

@@ -7,7 +7,7 @@
  *         : r3 = saved SPSR
  *
  * Returns : r0 = address of abort
- *	   : r1 = FSR, bit 8 = write
+ *	   : r1 = FSR, bit 11 = write
  *	   : r2-r8 = corrupted
  *	   : r9 = preserved
  *	   : sp = pointer to registers
@@ -24,8 +24,8 @@ ENTRY(v4t_early_abort)
 	tst	r3, #PSR_T_BIT
 	ldrneh	r3, [r2]			@ read aborted thumb instruction
 	ldreq	r3, [r2]			@ read aborted ARM instruction
-	bic	r1, r1, #1 << 8
+	bic	r1, r1, #1 << 11 | 1 << 10	@ clear bits 11 and 10 of FSR
 	movne	r3, r3, lsl #(21 - 12)		@ move thumb bit 11 to ARM bit 20
 	tst	r3, #1 << 20			@ check write
-	orreq	r1, r1, #1 << 8
+	orreq	r1, r1, #1 << 11
 	mov	pc, lr

arch/arm/mm/abort-ev5ej.S → arch/arm/mm/abort-ev5tej.S

 #include <linux/linkage.h>
 #include <asm/assembler.h>
 /*
- * Function: v5ej_early_abort
+ * Function: v5tej_early_abort
  *
  * Params  : r2 = address of aborted instruction
  *         : r3 = saved SPSR
  *
  * Returns : r0 = address of abort
- *	   : r1 = FSR, bit 8 = write
+ *	   : r1 = FSR, bit 11 = write
  *	   : r2-r8 = corrupted
  *	   : r9 = preserved
  *	   : sp = pointer to registers
@@ -18,18 +18,19 @@
  * picture.  Unfortunately, this does happen.  We live with it.
  */
 	.align	5
-ENTRY(v5ej_early_abort)
+ENTRY(v5tej_early_abort)
 	mrc	p15, 0, r1, c5, c0, 0		@ get FSR
 	mrc	p15, 0, r0, c6, c0, 0		@ get FAR
+	bic	r1, r1, #1 << 11 | 1 << 10	@ clear bits 11 and 10 of FSR
 	tst	r3, #PSR_J_BIT
-	orrne	r1, r1, #1 << 8			@ always assume write
+	orrne	r1, r1, #1 << 11		@ always assume write
 	bne	1f
 	tst	r3, #PSR_T_BIT
 	ldrneh	r3, [r2]			@ read aborted thumb instruction
 	ldreq	r3, [r2]			@ read aborted ARM instruction
 	movne	r3, r3, lsl #(21 - 12)		@ move thumb bit 11 to ARM bit 20
 	tst	r3, #1 << 20			@ L = 1 -> write
-	orreq	r1, r1, #1 << 8			@ yes.
+	orreq	r1, r1, #1 << 11		@ yes.
 1:	mov	pc, lr
 
 

arch/arm/mm/abort-lv4t.S

@@ -7,7 +7,7 @@
  *         : r3 = saved SPSR
  *
  * Returns : r0 = address of abort
- *	   : r1 = FSR, bit 8 = writing
+ *	   : r1 = FSR, bit 11 = write
  *	   : r2-r8 = corrupted
  *	   : r9 = preserved
  *	   : sp = pointer to registers
@@ -21,10 +21,11 @@ ENTRY(v4t_late_abort)
 	tst	r3, #PSR_T_BIT			@ check for thumb mode
 	mrc	p15, 0, r1, c5, c0, 0		@ get FSR
 	mrc	p15, 0, r0, c6, c0, 0		@ get FAR
+	bic	r1, r1, #1 << 11 | 1 << 10	@ clear bits 11 and 10 of FSR
 	ldreq	r8, [r2]			@ read arm instruction
 	bne	.data_thumb_abort
 	tst	r8, #1 << 20			@ L = 1 -> write?
-	orreq	r1, r1, #1 << 8			@ yes.
+	orreq	r1, r1, #1 << 11		@ yes.
 	and	r7, r8, #15 << 24
 	add	pc, pc, r7, lsr #22		@ Now branch to the relevant processing routine
 	nop

arch/arm/mm/abort-xscale.S

+#include <linux/linkage.h>
+#include <asm/assembler.h>
+/*
+ * Function: xscale_abort
+ *
+ * Params  : r2 = address of aborted instruction
+ *         : r3 = saved SPSR
+ *
+ * Returns : r0 = address of abort
+ *	   : r1 = FSR, bit 11 = write
+ *	   : r2-r8 = corrupted
+ *	   : r9 = preserved
+ *	   : sp = pointer to registers
+ *
+ * Purpose : obtain information about current aborted instruction.
+ * Note: we read user space.  This means we might cause a data
+ * abort here if the I-TLB and D-TLB aren't seeing the same
+ * picture.  Unfortunately, this does happen.  We live with it.
+ *
+ * Note: Xscale is contains non-standard architecture extensions.
+ * It requires its own early abort handler
+ */
+	.align	5
+ENTRY(xscale_abort)
+	mrc	p15, 0, r1, c5, c0, 0		@ get FSR
+	mrc	p15, 0, r0, c6, c0, 0		@ get FAR
+	tst	r3, #PSR_T_BIT
+	ldrneh	r3, [r2]			@ read aborted thumb instruction
+	ldreq	r3, [r2]			@ read aborted ARM instruction
+	bic	r1, r1, #1 << 11		@ clear bits 11 of FSR
+	movne	r3, r3, lsl #(21 - 12)		@ move thumb bit 11 to ARM bit 20
+	tst	r3, #1 << 20			@ check write
+	orreq	r1, r1, #1 << 11
+	mov	pc, lr

arch/arm/mm/copypage-v5te.S → arch/arm/mm/copypage-xscale.S

 /*
- *  linux/arch/arm/lib/copypage-armv5te.S
+ *  linux/arch/arm/lib/copypage-xscale.S
  *
  *  Copyright (C) 2001 Russell King
  *
@@ -19,7 +19,7 @@
 	.text
 	.align	5
 /*
- * ARMv5TE optimised copy_user_page
+ * XScale optimised copy_user_page
  *  r0 = destination
  *  r1 = source
  *  r2 = virtual user address of ultimate destination page
@@ -32,7 +32,7 @@
  * page.  We rely on the mini-cache being smaller than one page, so we'll
  * cycle through the complete cache anyway.
  */
-ENTRY(v5te_mc_copy_user_page)
+ENTRY(xscale_mc_copy_user_page)
 	stmfd	sp!, {r4, r5, lr}
 	mov	r5, r0
 	mov	r0, r1
@@ -58,11 +58,11 @@ ENTRY(v5te_mc_copy_user_page)
 
 	.align	5
 /*
- * ARMv5TE optimised clear_user_page
+ * XScale optimised clear_user_page
  *  r0 = destination
  *  r1 = virtual user address of ultimate destination page
  */
-ENTRY(v5te_mc_clear_user_page)
+ENTRY(xscale_mc_clear_user_page)
 	str	lr, [sp, #-4]!
 	mov	r1, #PAGE_SZ/32
 	mov	r2, #0
@@ -80,6 +80,6 @@ ENTRY(v5te_mc_clear_user_page)
 
 	.section ".text.init", #alloc, #execinstr
 
-ENTRY(v5te_mc_user_fns)
-	.long	v5te_mc_clear_user_page
-	.long	v5te_mc_copy_user_page
+ENTRY(xscale_mc_user_fns)
+	.long	xscale_mc_clear_user_page
+	.long	xscale_mc_copy_user_page

arch/arm/mm/fault-armv.c

@@ -47,6 +47,10 @@ static struct fsr_info {
 	int	sig;
 	const char *name;
 } fsr_info[] = {
+	/*
+	 * The following are the standard ARMv3 and ARMv4 aborts.  ARMv5
+	 * defines these to be "precise" aborts.
+	 */
 	{ do_bad,		SIGSEGV, "vector exception"		   },
 	{ do_bad,		SIGILL,	 "alignment exception"		   },
 	{ do_bad,		SIGKILL, "terminal exception"		   },
@@ -62,14 +66,35 @@ static struct fsr_info {
 	{ do_bad,		SIGBUS,	 "external abort on translation"   },
 	{ do_sect_fault,	SIGSEGV, "section permission fault"	   },
 	{ do_bad,		SIGBUS,	 "external abort on translation"   },
-	{ do_page_fault,	SIGSEGV, "page permission fault"	   }
+	{ do_page_fault,	SIGSEGV, "page permission fault"	   },
+	/*
+	 * The following are "imprecise" aborts, which are signalled by bit
+	 * 10 of the FSR, and may not be recoverable.  These are only
+	 * supported if the CPU abort handler supports bit 10.
+	 */
+	{ do_bad,		SIGBUS,  "unknown 16"			   },
+	{ do_bad,		SIGBUS,  "unknown 17"			   },
+	{ do_bad,		SIGBUS,  "unknown 18"			   },
+	{ do_bad,		SIGBUS,  "unknown 19"			   },
+	{ do_bad,		SIGBUS,  "lock abort"			   }, /* xscale */
+	{ do_bad,		SIGBUS,  "unknown 21"			   },
+	{ do_bad,		SIGBUS,  "imprecise external abort"	   }, /* xscale */
+	{ do_bad,		SIGBUS,  "unknown 23"			   },
+	{ do_bad,		SIGBUS,  "dcache parity error"		   }, /* xscale */
+	{ do_bad,		SIGBUS,  "unknown 25"			   },
+	{ do_bad,		SIGBUS,  "unknown 26"			   },
+	{ do_bad,		SIGBUS,  "unknown 27"			   },
+	{ do_bad,		SIGBUS,  "unknown 28"			   },
+	{ do_bad,		SIGBUS,  "unknown 29"			   },
+	{ do_bad,		SIGBUS,  "unknown 30"			   },
+	{ do_bad,		SIGBUS,  "unknown 31"			   }
 };
 
 void __init
 hook_fault_code(int nr, int (*fn)(unsigned long, unsigned int, struct pt_regs *),
 		int sig, const char *name)
 {
-	if (nr >= 0 && nr < 16) {
+	if (nr >= 0 && nr < ARRAY_SIZE(fsr_info)) {
 		fsr_info[nr].fn   = fn;
 		fsr_info[nr].sig  = sig;
 		fsr_info[nr].name = name;
@@ -82,7 +107,7 @@ hook_fault_code(int nr, int (*fn)(unsigned long, unsigned int, struct pt_regs *)
 asmlinkage void
 do_DataAbort(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
 {
-	const struct fsr_info *inf = fsr_info + (fsr & 15);
+	const struct fsr_info *inf = fsr_info + (fsr & 15) + ((fsr & (1 << 10)) >> 6);
 
 	if (!inf->fn(addr, fsr, regs))
 		return;

arch/arm/mm/fault-common.c

@@ -34,12 +34,10 @@
 #define READ_FAULT(m)		(!((m) & FAULT_CODE_WRITE))
 #else
 /*
- * On 32-bit processors, we define "mode" to be zero when reading,
- * non-zero when writing.  This now ties up nicely with the polarity
- * of the 26-bit machines, and also means that we avoid the horrible
- * gcc code for "int val = !other_val;".
+ * "code" is actually the FSR register.  Bit 11 set means the
+ * isntruction was performing a write.
  */
-#define DO_COW(code)		((code) & (1 << 8))
+#define DO_COW(code)		((code) & (1 << 11))
 #define READ_FAULT(code)	(!DO_COW(code))
 #endif
 
@@ -56,7 +54,7 @@ void show_pte(struct mm_struct *mm, unsigned long addr)
 
 	printk(KERN_ALERT "pgd = %p\n", mm->pgd);
 	pgd = pgd_offset(mm, addr);
-	printk(KERN_ALERT "*pgd = %08lx", pgd_val(*pgd));
+	printk(KERN_ALERT "*pgd=%08lx", pgd_val(*pgd));
 
 	do {
 		pmd_t *pmd;
@@ -71,7 +69,9 @@ void show_pte(struct mm_struct *mm, unsigned long addr)
 		}
 
 		pmd = pmd_offset(pgd, addr);
-		printk(", *pmd = %08lx", pmd_val(*pmd));
+#if PTRS_PER_PMD != 1
+		printk(", *pmd=%08lx", pmd_val(*pmd));
+#endif
 
 		if (pmd_none(*pmd))
 			break;
@@ -84,9 +84,9 @@ void show_pte(struct mm_struct *mm, unsigned long addr)
 #ifndef CONFIG_HIGHMEM
 		/* We must not map this if we have highmem enabled */
 		pte = pte_offset_map(pmd, addr);
-		printk(", *pte = %08lx", pte_val(*pte));
+		printk(", *pte=%08lx", pte_val(*pte));
 #ifdef CONFIG_CPU_32
-		printk(", *ppte = %08lx", pte_val(pte[-PTRS_PER_PTE]));
+		printk(", *ppte=%08lx", pte_val(pte[-PTRS_PER_PTE]));
 #endif
 		pte_unmap(pte);
 #endif

arch/arm/mm/proc-arm1020.S

@@ -394,8 +394,6 @@ ENTRY(cpu_arm1020_set_pmd)
  */
 	.align	5
 ENTRY(cpu_arm1020_set_pte)
-	tst	r0, #2048
-	streq	r0, [r0, -r0]			@ BUG_ON
 	str	r1, [r0], #-2048		@ linux version
 
 	eor	r1, r1, #LPTE_PRESENT | LPTE_YOUNG | LPTE_WRITE | LPTE_DIRTY
@@ -553,7 +551,7 @@ __arm1020_proc_info:
 	b	__arm1020_setup
 	.long	cpu_arch_name
 	.long	cpu_elf_name
-	.long	HWCAP_SWP | HWCAP_HALF | HWCAP_26BIT
+	.long	HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB
 	.long	cpu_arm1020_info
 	.long	arm1020_processor_functions
 	.long	v4wbi_tlb_fns

arch/arm/mm/proc-arm6_7.S

@@ -272,8 +272,6 @@ ENTRY(cpu_arm7_set_pmd)
 		.align	5
 ENTRY(cpu_arm6_set_pte)
 ENTRY(cpu_arm7_set_pte)
-		tst	r0, #2048
-		streq	r0, [r0, -r0]			@ BUG_ON
 		str	r1, [r0], #-2048		@ linux version
 
 		eor	r1, r1, #LPTE_PRESENT | LPTE_YOUNG | LPTE_WRITE | LPTE_DIRTY

arch/arm/mm/proc-arm720.S

@@ -135,8 +135,6 @@ ENTRY(cpu_arm720_set_pmd)
  */
 		.align	5
 ENTRY(cpu_arm720_set_pte)
-		tst	r0, #2048
-		streq	r0, [r0, -r0]			@ BUG_ON
 		str	r1, [r0], #-2048		@ linux version
 
 		eor	r1, r1, #LPTE_PRESENT | LPTE_YOUNG | LPTE_WRITE | LPTE_DIRTY
@@ -257,7 +255,7 @@ __arm720_proc_info:
 		b	__arm720_setup				@ cpu_flush
 		.long	cpu_arch_name				@ arch_name
 		.long	cpu_elf_name				@ elf_name
-		.long	HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB | HWCAP_26BIT	@ elf_hwcap
+		.long	HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB	@ elf_hwcap
 		.long	cpu_arm720_info				@ info
 		.long	arm720_processor_functions
 		.long	v4_tlb_fns

arch/arm/mm/proc-arm920.S

@@ -539,7 +539,7 @@ __arm920_proc_info:
 	b	__arm920_setup
 	.long	cpu_arch_name
 	.long	cpu_elf_name
-	.long	HWCAP_SWP | HWCAP_HALF | HWCAP_26BIT
+	.long	HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB
 	.long	cpu_arm920_info
 	.long	arm920_processor_functions
 	.long	v4wbi_tlb_fns

arch/arm/mm/proc-arm922.S

@@ -395,8 +395,6 @@ ENTRY(cpu_arm922_set_pmd)
  */
 	.align	5
 ENTRY(cpu_arm922_set_pte)
-	tst	r0, #2048
-	streq	r0, [r0, -r0]			@ BUG_ON
 	str	r1, [r0], #-2048		@ linux version
 
 	eor	r1, r1, #LPTE_PRESENT | LPTE_YOUNG | LPTE_WRITE | LPTE_DIRTY
@@ -540,7 +538,7 @@ __arm922_proc_info:
 	b	__arm922_setup
 	.long	cpu_arch_name
 	.long	cpu_elf_name
-	.long	HWCAP_SWP | HWCAP_HALF | HWCAP_26BIT
+	.long	HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB
 	.long	cpu_arm922_info
 	.long	arm922_processor_functions
 	.long	v4wbi_tlb_fns

arch/arm/mm/proc-arm926.S

 /*
- *  linux/arch/arm/mm/arm926.S: MMU functions for ARM926EJ-S
+ *  linux/arch/arm/mm/proc-arm926.S: MMU functions for ARM926EJ-S
  *
  *  Copyright (C) 1999-2001 ARM Limited
  *  Copyright (C) 2000 Deep Blue Solutions Ltd.
@@ -378,8 +378,6 @@ ENTRY(cpu_arm926_set_pmd)
  */
 	.align	5
 ENTRY(cpu_arm926_set_pte)
-	tst	r0, #2048
-	streq	r0, [r0, -r0]			@ BUG_ON
 	str	r1, [r0], #-2048		@ linux version
 
 	eor	r1, r1, #LPTE_PRESENT | LPTE_YOUNG | LPTE_WRITE | LPTE_DIRTY
@@ -442,7 +440,7 @@ __arm926_setup:
 	mcr	p15, 0, r4, c2, c0		@ load page table pointer
 
 
-#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH 
+#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
 	mov	r0, #4				@ disable write-back on caches explicitly
 	mcr	p15, 7, r0, c15, c0, 0
 #endif 
@@ -483,7 +481,7 @@ __arm926_setup:
  */
 	.type	arm926_processor_functions, #object
 arm926_processor_functions:
-	.word	v5ej_early_abort
+	.word	v5tej_early_abort
 	.word	cpu_arm926_check_bugs
 	.word	cpu_arm926_proc_init
 	.word	cpu_arm926_proc_fin
@@ -519,12 +517,12 @@ cpu_arm926_info:
 
 	.type	cpu_arch_name, #object
 cpu_arch_name:
-	.asciz	"armv5EJ"
+	.asciz	"armv5tej"
 	.size	cpu_arch_name, . - cpu_arch_name
 
 	.type	cpu_elf_name, #object
 cpu_elf_name:
-	.asciz	"v5EJ"
+	.asciz	"v5"
 	.size	cpu_elf_name, . - cpu_elf_name
 	.align
 
@@ -538,7 +536,8 @@ __arm926_proc_info:
 	b	__arm926_setup
 	.long	cpu_arch_name
 	.long	cpu_elf_name
-	.long	HWCAP_SWP | HWCAP_HALF | HWCAP_26BIT
+	.long	HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB | \
+		HWCAP_FAST_MULT | HWCAP_JAVA
 	.long	cpu_arm926_info
 	.long	arm926_processor_functions
 	.long	v4wbi_tlb_fns

arch/arm/mm/proc-xscale.S

@@ -602,8 +602,6 @@ ENTRY(cpu_xscale_set_pmd)
  */
 	.align	5
 ENTRY(cpu_xscale_set_pte)
-	tst	r0, #2048
-	streq	r0, [r0, -r0]			@ BUG_ON
 	str	r1, [r0], #-2048		@ linux version
 
 	bic	r2, r1, #0xff0
@@ -681,6 +679,9 @@ __xscale_setup:
 	mcr	p15, 0, r4, c2, c0, 0		@ load page table pointer
 	mov	r0, #0x1f			@ Domains 0, 1 = client
 	mcr	p15, 0, r0, c3, c0, 0		@ load domain access register
+	mov	r0, #1				@ Allow access to CP0 and CP13
+	orr	r0, r0, #1 << 13		@ Its undefined whether this
+	mcr	p15, 0, r0, c15, c1, 0		@ affects USR or SVC modes
 	mrc	p15, 0, r0, c1, c0, 0		@ get control register
 	bic	r0, r0, #0x0200			@ .... ..R. .... ....
 	bic	r0, r0, #0x0082			@ .... .... B... ..A.
@@ -697,7 +698,7 @@ __xscale_setup:
 
 	.type	xscale_processor_functions, #object
 ENTRY(xscale_processor_functions)
-	.word	v4t_early_abort
+	.word	xscale_abort
 	.word	cpu_xscale_check_bugs
 	.word	cpu_xscale_proc_init
 	.word	cpu_xscale_proc_fin
@@ -739,7 +740,7 @@ cpu_pxa250_info:
 
 	.type	cpu_arch_name, #object
 cpu_arch_name:
-	.asciz	"armv5"
+	.asciz	"armv5te"
 	.size	cpu_arch_name, . - cpu_arch_name
 
 	.type	cpu_elf_name, #object
@@ -762,7 +763,7 @@ __80200_proc_info:
 	.long	cpu_80200_info
 	.long	xscale_processor_functions
 	.long	v4wbi_tlb_fns
-	.long	v5te_mc_user_fns
+	.long	xscale_mc_user_fns
 	.size	__80200_proc_info, . - __80200_proc_info
 
 	.type	__pxa250_proc_info,#object
@@ -777,6 +778,6 @@ __pxa250_proc_info:
 	.long	cpu_pxa250_info
 	.long	xscale_processor_functions
 	.long	v4wbi_tlb_fns
-	.long	v5te_mc_user_fns
+	.long	xscale_mc_user_fns
 	.size	__pxa250_proc_info, . - __pxa250_proc_info
 

arch/arm/nwfpe/fpa11.c

@@ -142,9 +142,6 @@ void FPA11_CheckInit(void)
 unsigned int EmulateAll(unsigned int opcode)
 {
   unsigned int nRc = 1, code;
-  unsigned long flags;
-
-  save_flags(flags); sti();
 
   code = opcode & 0x00000f00;
   if (code == 0x00000100 || code == 0x00000200)
@@ -180,8 +177,6 @@ unsigned int EmulateAll(unsigned int opcode)
     }
   }
 
-  restore_flags(flags);
-
   return(nRc);
 }
 

arch/arm/tools/mach-types

@@ -6,7 +6,7 @@
 # To add an entry into this database, please see Documentation/arm/README,
 # or contact rmk@arm.linux.org.uk
 #
-# Last update: Tue May 21 14:19:05 2002
+# Last update: Fri Jul 5 21:32:20 2002
 #
 # machine_is_xxx	CONFIG_xxxx		MACH_TYPE_xxx		number
 #
@@ -192,3 +192,18 @@ ks8695			ARCH_KS8695		KS8695			180
 brh			ARCH_BRH		BRH			181
 s3c2410			ARCH_S3C2410		S3C2410			182
 possio_px30		ARCH_POSSIO_PX30	POSSIO_PX30		183
+s3c2800			ARCH_S3C2800		S3C2800			184
+fleetwood		SA1100_FLEETWOOD	FLEETWOOD		185
+omaha			ARCH_OMAHA		OMAHA			186
+ta7			ARCH_TA7		TA7			187
+nova			SA1100_NOVA		NOVA			188
+hmk			ARCH_HMK		HMK			189
+inphinity		ARCH_INPHINITY		INPHINITY		190
+fester			SA1100_FESTER		FESTER			191
+gpi			ARCH_GPI		GPI			192
+smdk2410		ARCH_SMDK2410		SMDK2410		193
+premium			ARCH_PREMIUM		PREMIUM			194
+nexio			SA1100_NEXIO		NEXIO			195
+bitbox			SA1100_BITBOX		BITBOX			196
+g200			SA1100_G200		G200			197
+gill			SA1100_GILL		GILL			198

arch/arm/vmlinux-armo.lds.in

@@ -8,10 +8,9 @@ jiffies = jiffies_64;
 SECTIONS
 {
 	. = TEXTADDR;
-
-	.init : {
+	.init : {			/* Init code and data		*/
 		_stext = .;
-		__init_begin = .;	/* Init code and data		*/
+		__init_begin = .;
 			*(.text.init)
 		__proc_info_begin = .;
 			*(.proc.info)
@@ -50,7 +49,7 @@ SECTIONS
 		*(.exitcall.exit)
 	}
 
-	.text : {
+	.text : {			/* Real text segment		*/
 		_text = .;		/* Text and read-only data	*/
 			*(.text)
 			*(.fixup)
@@ -59,19 +58,24 @@ SECTIONS
 			*(.rodata.*)
 			*(.glue_7)
 			*(.glue_7t)
-			*(.kstrtab)
-		. = ALIGN(16);		/* Exception table		*/
+		*(.got)			/* Global offset table		*/
+
+		_etext = .;		/* End of text section		*/
+	}
+
+	.kstrtab : { *(.kstrtab) }
+
+	. = ALIGN(16);
+	__ex_table : {			/* Exception table		*/
 		__start___ex_table = .;
 			*(__ex_table)
 		__stop___ex_table = .;
+	}
 
-		__start___ksymtab = .;	/* Kernel symbol table		*/
+	__ksymtab : {			/* Kernel symbol table		*/
+		__start___ksymtab = .;
 			*(__ksymtab)
 		__stop___ksymtab = .;
-
-		*(.got)			/* Global offset table		*/
-
-		_etext = .;		/* End of text section		*/
 	}
 
 	.data : {
@@ -90,14 +94,12 @@ SECTIONS
 		_edata = .;
 	}
 
-
 	.bss : {
 		__bss_start = .;	/* BSS				*/
 		*(.bss)
 		*(COMMON)
 		_end = . ;
 	}
-
 					/* Stabs debugging sections.	*/
 	.stab 0 : { *(.stab) }
 	.stabstr 0 : { *(.stabstr) }

arch/sparc64/defconfig

@@ -389,10 +389,7 @@ CONFIG_SCSI_FCAL=m
 # Fusion MPT device support
 #
 CONFIG_FUSION=m
-
-#
-# (ability to boot linux kernel from Fusion device is DISABLED!)
-#
+# CONFIG_FUSION_BOOT is not set
 CONFIG_FUSION_ISENSE=m
 CONFIG_FUSION_CTL=m
 CONFIG_FUSION_LAN=m
@@ -576,22 +573,51 @@ CONFIG_DRM_TDFX=m
 # Input device support
 #
 CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
 CONFIG_INPUT_KEYBDEV=y
 CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
 CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
 CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
 # CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
 CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
 # CONFIG_GAMEPORT is not set
 CONFIG_SOUND_GAMEPORT=y
 # CONFIG_GAMEPORT_NS558 is not set
 # CONFIG_GAMEPORT_L4 is not set
 # CONFIG_INPUT_EMU10K1 is not set
-# CONFIG_GAMEPORT_PCIGAME is not set
+# CONFIG_GAMEPORT_VORTEX is not set
 # CONFIG_GAMEPORT_FM801 is not set
 # CONFIG_GAMEPORT_CS461x is not set
 # CONFIG_SERIO is not set
+# CONFIG_SERIO_I8042 is not set
 # CONFIG_SERIO_SERPORT is not set
+# CONFIG_SERIO_CT82C710 is not set
+# CONFIG_SERIO_PARKBD is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ATKBD is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_PS2SERKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+CONFIG_INPUT_MOUSE=y
+# CONFIG_MOUSE_PS2 is not set
+# CONFIG_MOUSE_SERIAL is not set
+# CONFIG_MOUSE_INPORT is not set
+# CONFIG_MOUSE_LOGIBM is not set
+# CONFIG_MOUSE_PC110PAD is not set
 # CONFIG_INPUT_JOYSTICK is not set
 # CONFIG_JOYSTICK_ANALOG is not set
 # CONFIG_JOYSTICK_A3D is not set
@@ -599,6 +625,7 @@ CONFIG_SOUND_GAMEPORT=y
 # CONFIG_JOYSTICK_COBRA is not set
 # CONFIG_JOYSTICK_GF2K is not set
 # CONFIG_JOYSTICK_GRIP is not set
+# CONFIG_JOYSTICK_GUILLEMOT is not set
 # CONFIG_JOYSTICK_INTERACT is not set
 # CONFIG_JOYSTICK_SIDEWINDER is not set
 # CONFIG_JOYSTICK_TMDC is not set
@@ -609,9 +636,13 @@ CONFIG_SOUND_GAMEPORT=y
 # CONFIG_JOYSTICK_SPACEORB is not set
 # CONFIG_JOYSTICK_SPACEBALL is not set
 # CONFIG_JOYSTICK_STINGER is not set
+# CONFIG_JOYSTICK_TWIDDLER is not set
 # CONFIG_JOYSTICK_DB9 is not set
 # CONFIG_JOYSTICK_GAMECON is not set
 # CONFIG_JOYSTICK_TURBOGRAFX is not set
+# CONFIG_INPUT_JOYDUMP is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
 
 #
 # File systems
@@ -780,7 +811,6 @@ CONFIG_USB_DEVICEFS=y
 #
 CONFIG_USB_EHCI_HCD=m
 CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_UHCI_HCD=m
 # CONFIG_USB_UHCI_HCD_ALT is not set
 
 #

arch/sparc64/kernel/binfmt_elf32.c

@@ -136,6 +136,16 @@ struct elf_prpsinfo32
 #define NEW_TO_OLD_UID(uid) ((uid) > 65535) ? (u16)overflowuid : (u16)(uid)
 #define NEW_TO_OLD_GID(gid) ((gid) > 65535) ? (u16)overflowgid : (u16)(gid)
 
+#include <linux/time.h>
+
+#define jiffies_to_timeval jiffies_to_timeval32
+static __inline__ void
+jiffies_to_timeval32(unsigned long jiffies, struct timeval32 *value)
+{
+	value->tv_usec = (jiffies % HZ) * (1000000L / HZ);
+	value->tv_sec = jiffies / HZ;
+}
+
 #define elf_addr_t	u32
 #define elf_caddr_t	u32
 #undef start_thread

drivers/fc4/fc.c

@@ -994,7 +994,7 @@ int fcp_scsi_dev_reset(Scsi_Cmnd *SCpnt)
 	 */
 
 	fc->rst_pkt->host->eh_action = &sem;
-	fc->rst_pkt->request.rq_status = RQ_SCSI_BUSY;
+	fc->rst_pkt->request->rq_status = RQ_SCSI_BUSY;
 
 	fc->rst_pkt->done = fcp_scsi_reset_done;
 	fcp_scsi_queue_it(fc, fc->rst_pkt, fcmd, 0);

drivers/net/bonding.c

@@ -176,6 +176,16 @@
  *              Steve Mead <steve.mead at comdev dot cc>
  *     - Port Gleb Natapov's multicast support patchs from 2.4.12
  *       to 2.4.18 adding support for multicast.
+ *
+ * 2002/06/17 - Tony Cureington <tony.cureington * hp_com>
+ *     - corrected uninitialized pointer (ifr.ifr_data) in bond_check_dev_link;
+ *       actually changed function to use ETHTOOL, then MIIPHY, and finally
+ *       MIIREG to determine the link status
+ *     - fixed bad ifr_data pointer assignments in bond_ioctl
+ *     - corrected mode 1 being reported as active-backup in bond_get_info;
+ *       also added text to distinguish type of load balancing (rr or xor)
+ *     - change arp_ip_target module param from "1-12s" (array of 12 ptrs)
+ *       to "s" (a single ptr)
  */
 
 #include <linux/config.h>
@@ -210,6 +220,9 @@
 #include <linux/smp.h>
 #include <linux/if_ether.h>
 #include <linux/if_arp.h>
+#include <linux/mii.h>
+#include <linux/ethtool.h>
+
 
 /* monitor all links that often (in milliseconds). <=0 disables monitoring */
 #ifndef BOND_LINK_MON_INTERV
@@ -253,7 +266,7 @@ MODULE_PARM_DESC(miimon, "Link check interval in milliseconds");
 MODULE_PARM(mode, "i");
 MODULE_PARM(arp_interval, "i");
 MODULE_PARM_DESC(arp_interval, "arp interval in milliseconds");
-MODULE_PARM(arp_ip_target, "1-12s");
+MODULE_PARM(arp_ip_target, "s");
 MODULE_PARM_DESC(arp_ip_target, "arp target in n.n.n.n form");
 MODULE_PARM_DESC(mode, "Mode of operation : 0 for round robin, 1 for active-backup, 2 for xor");
 MODULE_PARM(updelay, "i");
@@ -386,21 +399,51 @@ static u16 bond_check_dev_link(struct net_device *dev)
 {
 	static int (* ioctl)(struct net_device *, struct ifreq *, int);
 	struct ifreq ifr;
-	u16 *data = (u16 *)&ifr.ifr_data;
-		
-	/* data[0] automagically filled by the ioctl */
-	data[1] = 1; /* MII location 1 reports Link Status */
-
-	if (((ioctl = dev->do_ioctl) != NULL) &&  /* ioctl to access MII */
-	    (ioctl(dev, &ifr, SIOCGMIIPHY) == 0)) {
-		/* now, data[3] contains info about link status :
-		   - data[3] & 0x04 means link up
-		   - data[3] & 0x20 means end of auto-negociation
-		*/
-		return data[3];
-	} else {
-		return MII_LINK_READY;  /* spoof link up ( we can't check it) */
+	struct mii_ioctl_data mii;
+	struct ethtool_value etool;
+
+	if ((ioctl = dev->do_ioctl) != NULL)  { /* ioctl to access MII */
+		/* TODO: set pointer to correct ioctl on a per team member */
+		/*       bases to make this more efficient. that is, once  */
+		/*       we determine the correct ioctl, we will always    */
+		/*       call it and not the others for that team          */
+		/*       member.                                           */
+
+		/* try SOICETHTOOL ioctl, some drivers cache ETHTOOL_GLINK */
+		/* for a period of time; we need to encourage link status  */
+		/* be reported by network drivers in real time; if the     */
+		/* value is cached, the mmimon module parm may have no     */
+		/* effect...                                               */
+	        etool.cmd = ETHTOOL_GLINK;
+	        ifr.ifr_data = (char*)&etool;
+		if (ioctl(dev, &ifr, SIOCETHTOOL) == 0) {
+			if (etool.data == 1) {
+				return(MII_LINK_READY);
+			} 
+			else { 
+				return(0);
+			} 
+		}
+
+		ifr.ifr_data = (char*)&mii;
+                /* try MIIPHY first then, if that doesn't work, try MIIREG */
+		if (ioctl(dev, &ifr, SIOCGMIIPHY) == 0) {
+			/* now, mii.phy_id contains info about link status :
+			- mii.phy_id & 0x04 means link up
+			- mii.phy_id & 0x20 means end of auto-negociation
+			*/
+			return mii.phy_id;
+		}
+
+		mii.reg_num = 1; /* the MII register we want to read */  
+		if (ioctl(dev, &ifr, SIOCGMIIREG) == 0) {
+			/* mii.val_out contians the same link info as phy_id */
+			/* above                                             */
+			return mii.val_out;
+		}
+
 	}
+	return MII_LINK_READY;  /* spoof link up ( we can't check it) */
 }
 
 static u16 bond_check_mii_link(bonding_t *bond)
@@ -1707,7 +1750,7 @@ static int bond_ioctl(struct net_device *master_dev, struct ifreq *ifr, int cmd)
 
 	switch (cmd) {
 	case SIOCGMIIPHY:
-		data = (u16 *)&ifr->ifr_data;
+		data = (u16 *)ifr->ifr_data;
 		if (data == NULL) {
 			return -EINVAL;
 		}
@@ -1718,7 +1761,7 @@ static int bond_ioctl(struct net_device *master_dev, struct ifreq *ifr, int cmd)
 		 * We do this again just in case we were called by SIOCGMIIREG
 		 * instead of SIOCGMIIPHY.
 		 */
-		data = (u16 *)&ifr->ifr_data;
+		data = (u16 *)ifr->ifr_data;
 		if (data == NULL) {
 			return -EINVAL;
 		}
@@ -2035,7 +2078,28 @@ static int bond_get_info(char *buf, char **start, off_t offset, int length)
 		link = bond_check_mii_link(bond);
 
 		len += sprintf(buf + len, "Bonding Mode: ");
-		len += sprintf(buf + len, "%s\n", mode ? "active-backup" : "load balancing");
+
+		switch (mode) {
+			case BOND_MODE_ACTIVEBACKUP:
+				len += sprintf(buf + len, "%s\n", 
+						"active-backup");
+			break;
+
+			case BOND_MODE_ROUNDROBIN:
+				len += sprintf(buf + len, "%s\n", 
+						"load balancing (round-robin)");
+			break;
+
+			case BOND_MODE_XOR:
+				len += sprintf(buf + len, "%s\n", 
+						"load balancing (xor)");
+			break;
+
+			default:
+				len += sprintf(buf + len, "%s\n", 
+						"unknown");
+			break;
+		}
 
 		if (mode == BOND_MODE_ACTIVEBACKUP) {
 			read_lock_irqsave(&bond->lock, flags);
@@ -2282,7 +2346,32 @@ static int __init bonding_init(void)
 	}
 	memset(dev_bonds, 0, max_bonds*sizeof(struct net_device));
 
+	if (updelay < 0) {
+		printk(KERN_WARNING 
+		       "bonding_init(): updelay module parameter (%d), "
+		       "not in range 0-%d, so it was reset to 0\n",
+		       updelay, INT_MAX);
+		updelay = 0;
+	}
+
+	if (downdelay < 0) {
+		printk(KERN_WARNING 
+		       "bonding_init(): downdelay module parameter (%d), "
+		       "not in range 0-%d, so it was reset to 0\n",
+		       downdelay, INT_MAX);
+		downdelay = 0;
+	}
+
+	if (arp_interval < 0) {
+		printk(KERN_WARNING 
+		       "bonding_init(): arp_interval module parameter (%d), "
+		       "not in range 0-%d, so it was reset to %d\n",
+		       arp_interval, INT_MAX, BOND_LINK_ARP_INTERV);
+		arp_interval = BOND_LINK_ARP_INTERV;
+	}
+
 	if (arp_ip_target) {
+		/* TODO: check and log bad ip address */
 		if (my_inet_aton(arp_ip_target, &arp_target) == 0)  {
 			arp_interval = 0;
 		}

drivers/net/sunhme.c

@@ -2201,7 +2201,7 @@ static int happy_meal_open(struct net_device *dev)
 	 */
 	if ((hp->happy_flags & (HFLAG_QUATTRO|HFLAG_PCI)) != HFLAG_QUATTRO) {
 		if (request_irq(dev->irq, &happy_meal_interrupt,
-				SA_SHIRQ, "HAPPY MEAL", (void *)dev)) {
+				SA_SHIRQ, dev->name, (void *)dev)) {
 			HMD(("EAGAIN\n"));
 #ifdef __sparc__
 			printk(KERN_ERR "happy_meal(SBUS): Can't order irq %s to go.\n",

drivers/net/tg3.h

@@ -1687,45 +1687,6 @@ struct tg3_link_config {
 	u8				orig_autoneg;
 };
 
-struct tg3_coalesce_config {
-	/* Current settings. */
-	u32		rx_coalesce_ticks;
-	u32		rx_max_coalesced_frames;
-	u32		rx_coalesce_ticks_during_int;
-	u32		rx_max_coalesced_frames_during_int;
-	u32		tx_coalesce_ticks;
-	u32		tx_max_coalesced_frames;
-	u32		tx_coalesce_ticks_during_int;
-	u32		tx_max_coalesced_frames_during_int;
-	u32		stats_coalesce_ticks;
-
-	/* Default settings. */
-	u32		rx_coalesce_ticks_def;
-	u32		rx_max_coalesced_frames_def;
-	u32		rx_coalesce_ticks_during_int_def;
-	u32		rx_max_coalesced_frames_during_int_def;
-	u32		tx_coalesce_ticks_def;
-	u32		tx_max_coalesced_frames_def;
-	u32		tx_coalesce_ticks_during_int_def;
-	u32		tx_max_coalesced_frames_during_int_def;
-	u32		stats_coalesce_ticks_def;
-
-	/* Adaptive RX/TX coalescing parameters. */
-	u32		rate_sample_jiffies;
-	u32		pkt_rate_low;
-	u32		pkt_rate_high;
-
-	u32		rx_coalesce_ticks_low;
-	u32		rx_max_coalesced_frames_low;
-	u32		tx_coalesce_ticks_low;
-	u32		tx_max_coalesced_frames_low;
-
-	u32		rx_coalesce_ticks_high;
-	u32		rx_max_coalesced_frames_high;
-	u32		tx_coalesce_ticks_high;
-	u32		tx_max_coalesced_frames_high;
-};
-
 struct tg3_bufmgr_config {
 	u32		mbuf_read_dma_low_water;
 	u32		mbuf_mac_rx_low_water;
@@ -1772,8 +1733,7 @@ struct tg3 {
 #define TG3_FLAG_POLL_SERDES		0x00000080
 #define TG3_FLAG_PHY_RESET_ON_INIT	0x00000100
 #define TG3_FLAG_PCIX_TARGET_HWBUG	0x00000200
-#define TG3_FLAG_TAGGED_IRQ_STATUS	0x00000400
-#define TG3_FLAG_WOL_SPEED_100MB	0x00000800
+#define TG3_FLAG_WOL_SPEED_100MB	0x00000400
 #define TG3_FLAG_WOL_ENABLE		0x00001000
 #define TG3_FLAG_NVRAM			0x00002000
 #define TG3_FLAG_NVRAM_BUFFERED		0x00004000
@@ -1802,7 +1762,6 @@ struct tg3 {
 	u32				timer_offset;
 
 	struct tg3_link_config		link_config;
-	struct tg3_coalesce_config	coalesce_config;
 	struct tg3_bufmgr_config	bufmgr_config;
 
 	u32				rx_pending;

drivers/scsi/aic7xxx_old.c

@@ -3070,7 +3070,7 @@ aic7xxx_done(struct aic7xxx_host *p, struct aic7xxx_scb *scb)
        * we check data_cmnd[0].  This catches the conditions for st.c, but
        * I'm still not sure if request.cmd is valid for sg devices.
        */
-      if ( (rq_data_dir(&cmd->request) == WRITE) || (cmd->data_cmnd[0] == WRITE_6) ||
+      if ( (rq_data_dir(cmd->request) == WRITE) || (cmd->data_cmnd[0] == WRITE_6) ||
            (cmd->data_cmnd[0] == WRITE_FILEMARKS) )
       {
         sp->w_total++;
@@ -4280,7 +4280,7 @@ aic7xxx_calculate_residual (struct aic7xxx_host *p, struct aic7xxx_scb *scb)
       {
         printk(INFO_LEAD "Underflow - Wanted %u, %s %u, residual SG "
           "count %d.\n", p->host_no, CTL_OF_SCB(scb), cmd->underflow,
-          (rq_data_dir(&cmd->request) == WRITE) ? "wrote" : "read", actual,
+          (rq_data_dir(cmd->request) == WRITE) ? "wrote" : "read", actual,
           hscb->residual_SG_segment_count);
         printk(INFO_LEAD "status 0x%x.\n", p->host_no, CTL_OF_SCB(scb),
           hscb->target_status);

drivers/scsi/pluto.c

@@ -65,7 +65,7 @@ static void __init pluto_detect_done(Scsi_Cmnd *SCpnt)
 
 static void __init pluto_detect_scsi_done(Scsi_Cmnd *SCpnt)
 {
-	SCpnt->request.rq_status = RQ_SCSI_DONE;
+	SCpnt->request->rq_status = RQ_SCSI_DONE;
 	PLND(("Detect done %08lx\n", (long)SCpnt))
 	if (atomic_dec_and_test (&fcss))
 		up(&fc_sem);
@@ -160,7 +160,7 @@ int __init pluto_detect(Scsi_Host_Template *tpnt)
 		
 		SCpnt->cmd_len = COMMAND_SIZE(INQUIRY);
 	
-		SCpnt->request.rq_status = RQ_SCSI_BUSY;
+		SCpnt->request->rq_status = RQ_SCSI_BUSY;
 		
 		SCpnt->done = pluto_detect_done;
 		SCpnt->bufflen = 256;
@@ -174,7 +174,7 @@ int __init pluto_detect(Scsi_Host_Template *tpnt)
 	for (retry = 0; retry < 5; retry++) {
 		for (i = 0; i < fcscount; i++) {
 			if (!fcs[i].fc) break;
-			if (fcs[i].cmd.request.rq_status != RQ_SCSI_DONE) {
+			if (fcs[i].cmd.request->rq_status != RQ_SCSI_DONE) {
 				disable_irq(fcs[i].fc->irq);
 				PLND(("queuecommand %d %d\n", retry, i))
 				fcp_scsi_queuecommand (&(fcs[i].cmd), 

fs/partitions/check.c

@@ -226,7 +226,7 @@ static ssize_t partition_device_kdev_read(struct device *driverfs_dev,
 			char *page, size_t count, loff_t off)
 {
 	kdev_t kdev; 
-	kdev.value=(int)driverfs_dev->driver_data;
+	kdev.value=(int)(long)driverfs_dev->driver_data;
 	return off ? 0 : sprintf (page, "%x\n",kdev.value);
 }
 static struct driver_file_entry partition_device_kdev_file = {
@@ -285,7 +285,7 @@ void driverfs_create_partitions(struct gendisk *hd, int minor)
 			current_driverfs_dev->parent = parent;
 			/* handle disc case */
 			current_driverfs_dev->driver_data =
-					(void *)__mkdev(hd->major, minor+part);
+					(void *)(long)__mkdev(hd->major, minor+part);
 			if (part == 0) {
 				if (parent)  {
 					sprintf(current_driverfs_dev->name,

fs/quota_v2.c

@@ -413,7 +413,7 @@ static int v2_write_dquot(struct dquot *dquot)
 
 	if (!dquot->dq_off)
 		if ((ret = dq_insert_tree(dquot)) < 0) {
-			printk(KERN_ERR "VFS: Error %d occured while creating quota.\n", ret);
+			printk(KERN_ERR "VFS: Error %Zd occured while creating quota.\n", ret);
 			return ret;
 		}
 	filp = sb_dqopt(dquot->dq_sb)->files[type];

include/asm-arm/arch-adifcc/param.h

 /*
- * linux/include/asm-arm/arch-adifcc/param.h
+ *  linux/include/asm-arm/arch-adifcc/param.h
  */

include/asm-arm/arch-anakin/param.h

@@ -11,11 +11,6 @@
  *   11-Apr-2001 TTC	Created
  */
 
-#ifndef __ASM_ARCH_PARAM_H
-#define __ASM_ARCH_PARAM_H
-
 /*
  * Reserved for future use
  */
-
-#endif

include/asm-arm/arch-arc/param.h

 /*
- * linux/include/asm-arm/arch-arc/param.h
+ *  linux/include/asm-arm/arch-arc/param.h
  */

include/asm-arm/arch-cl7500/param.h

 /*
- * linux/include/asm-arm/arch-cl7500/param.h
+ *  linux/include/asm-arm/arch-cl7500/param.h
  *
  * Copyright (C) 1999 Nexus Electronics Ltd
  */
-
-#define HZ 100

include/asm-arm/arch-clps711x/param.h

@@ -17,5 +17,3 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
-
-#define HZ 100

include/asm-arm/arch-ebsa110/param.h

 /*
- * linux/include/asm-arm/arch-ebsa110/param.h
+ *  linux/include/asm-arm/arch-ebsa110/param.h
  */

include/asm-arm/arch-ebsa285/param.h

 /*
- * linux/include/asm-arm/arch-ebsa285/param.h
+ *  linux/include/asm-arm/arch-ebsa285/param.h
  */

include/asm-arm/arch-epxa10db/param.h

@@ -17,5 +17,3 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
-
-#define HZ 100

include/asm-arm/arch-integrator/param.h

@@ -17,5 +17,3 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
-
-#define HZ 100

include/asm-arm/arch-iop310/param.h

 /*
- * linux/include/asm-arm/arch-iop80310/param.h
+ *  linux/include/asm-arm/arch-iop80310/param.h
  */

include/asm-arm/arch-l7200/param.h

 /*
- * linux/include/asm-arm/arch-l7200/param.h
+ *  linux/include/asm-arm/arch-l7200/param.h
  *
  * Copyright (C) 2000 Rob Scott (rscott@mtrob.fdns.net)
  *                    Steve Hill (sjhill@cotw.com)
@@ -12,21 +12,8 @@
  *   04-25-2000 SJH     Cleaned up file
  *   05-03-2000 SJH     Change comments and rate
  */
-#ifndef __ASM_ARCH_PARAM_H
-#define __ASM_ARCH_PARAM_H
 
 /*
  * See 'time.h' for how the RTC HZ rate is set
  */
-#define HZ 128
-
-/*
- * Define hz_to_std, since we have a non 100Hz define
- * (see include/asm-arm/param.h)
- */
-
-#if defined(__KERNEL__)
-#define hz_to_std(a) ((a * HZ)/100)
-#endif
-
-#endif
+#define __KERNEL_HZ 128

include/asm-arm/arch-nexuspci/param.h

 /*
- * linux/include/asm-arm/arch-nexuspci/param.h
+ *  linux/include/asm-arm/arch-nexuspci/param.h
  */

include/asm-arm/arch-rpc/param.h

 /*
- * linux/include/asm-arm/arch-rpc/param.h
+ *  linux/include/asm-arm/arch-rpc/param.h
  */

include/asm-arm/arch-sa1100/assabet.h

@@ -25,6 +25,13 @@
 
 #define ASSABET_SCR_INIT	-1
 
+extern unsigned long SCR_value;
+
+#ifdef CONFIG_ASSABET_NEPONSET
+#define machine_has_neponset()  ((SCR_value & ASSABET_SCR_SA1111) == 0)
+#else
+#define machine_has_neponset()	(0)
+#endif
 
 /* Board Control Register */
 
@@ -57,8 +64,6 @@
 #define ASSABET_BCR_RAD_ON	(1<<22)	/* Radio Power On */
 #define ASSABET_BCR_SPK_OFF	(1<<23)	/* 1 = Speaker amplifier power off */
 
-extern unsigned long SCR_value;
-
 #ifdef CONFIG_SA1100_ASSABET
 extern void ASSABET_BCR_frob(unsigned int mask, unsigned int set);
 #else
@@ -98,70 +103,4 @@ extern void ASSABET_BCR_frob(unsigned int mask, unsigned int set);
 #define ASSABET_IRQ_GPIO_CF_BVD2	IRQ_GPIO24
 #define ASSABET_IRQ_GPIO_CF_BVD1	IRQ_GPIO25
 
-
-/*
- * Neponset definitions: 
- */
-
-#define NEPONSET_CPLD_BASE      (0x10000000)
-#define Nep_p2v( x )            ((x) - NEPONSET_CPLD_BASE + 0xf3000000)
-#define Nep_v2p( x )            ((x) - 0xf3000000 + NEPONSET_CPLD_BASE)
-
-#define _IRR                    0x10000024      /* Interrupt Reason Register */
-#define _AUD_CTL                0x100000c0      /* Audio controls (RW)       */
-#define _MDM_CTL_0              0x100000b0      /* Modem control 0 (RW)      */
-#define _MDM_CTL_1              0x100000b4      /* Modem control 1 (RW)      */
-#define _NCR_0	                0x100000a0      /* Control Register (RW)     */
-#define _KP_X_OUT               0x10000090      /* Keypad row write (RW)     */
-#define _KP_Y_IN                0x10000080      /* Keypad column read (RO)   */
-#define _SWPK                   0x10000020      /* Switch pack (RO)          */
-#define _WHOAMI                 0x10000000      /* System ID Register (RO)   */
-
-#define _LEDS                   0x10000010      /* LEDs [31:0] (WO)          */
-
-#define IRR                     (*((volatile u_char *) Nep_p2v(_IRR)))
-#define AUD_CTL                 (*((volatile u_char *) Nep_p2v(_AUD_CTL)))
-#define MDM_CTL_0               (*((volatile u_char *) Nep_p2v(_MDM_CTL_0)))
-#define MDM_CTL_1               (*((volatile u_char *) Nep_p2v(_MDM_CTL_1)))
-#define NCR_0			(*((volatile u_char *) Nep_p2v(_NCR_0)))
-#define KP_X_OUT                (*((volatile u_char *) Nep_p2v(_KP_X_OUT)))
-#define KP_Y_IN                 (*((volatile u_char *) Nep_p2v(_KP_Y_IN)))
-#define SWPK                    (*((volatile u_char *) Nep_p2v(_SWPK)))
-#define WHOAMI                  (*((volatile u_char *) Nep_p2v(_WHOAMI)))
-
-#define LEDS                    (*((volatile Word   *) Nep_p2v(_LEDS)))
-
-#define IRR_ETHERNET		(1<<0)
-#define IRR_USAR		(1<<1)
-#define IRR_SA1111		(1<<2)
-
-#define AUD_SEL_1341            (1<<0)
-#define AUD_MUTE_1341           (1<<1)
-
-#define MDM_CTL0_RTS1		(1 << 0)
-#define MDM_CTL0_DTR1		(1 << 1)
-#define MDM_CTL0_RTS2		(1 << 2)
-#define MDM_CTL0_DTR2		(1 << 3)
-
-#define MDM_CTL1_CTS1		(1 << 0)
-#define MDM_CTL1_DSR1		(1 << 1)
-#define MDM_CTL1_DCD1		(1 << 2)
-#define MDM_CTL1_CTS2		(1 << 3)
-#define MDM_CTL1_DSR2		(1 << 4)
-#define MDM_CTL1_DCD2		(1 << 5)
-
-#define NCR_GP01_OFF		(1<<0)
-#define NCR_TP_PWR_EN		(1<<1)
-#define NCR_MS_PWR_EN		(1<<2)
-#define NCR_ENET_OSC_EN		(1<<3)
-#define NCR_SPI_KB_WK_UP	(1<<4)
-#define NCR_A0VPP		(1<<5)
-#define NCR_A1VPP		(1<<6)
-
-#ifdef CONFIG_ASSABET_NEPONSET
-#define machine_has_neponset()  ((SCR_value & ASSABET_SCR_SA1111) == 0)
-#else
-#define machine_has_neponset()	(0)
-#endif
-
 #endif

include/asm-arm/arch-sa1100/neponset.h

+/*
+ * linux/include/asm-arm/arch-sa1100/assabet.h
+ *
+ * Created 2000/06/05 by Nicolas Pitre <nico@cam.org>
+ *
+ * This file contains the hardware specific definitions for Assabet
+ * Only include this file from SA1100-specific files.
+ *
+ * 2000/05/23 John Dorsey <john+@cs.cmu.edu>
+ *      Definitions for Neponset added.
+ */
+#ifndef __ASM_ARCH_NEPONSET_H
+#define __ASM_ARCH_NEPONSET_H
+
+/*
+ * Neponset definitions: 
+ */
+
+#define NEPONSET_CPLD_BASE      (0x10000000)
+#define Nep_p2v( x )            ((x) - NEPONSET_CPLD_BASE + 0xf3000000)
+#define Nep_v2p( x )            ((x) - 0xf3000000 + NEPONSET_CPLD_BASE)
+
+#define _IRR                    0x10000024      /* Interrupt Reason Register */
+#define _AUD_CTL                0x100000c0      /* Audio controls (RW)       */
+#define _MDM_CTL_0              0x100000b0      /* Modem control 0 (RW)      */
+#define _MDM_CTL_1              0x100000b4      /* Modem control 1 (RW)      */
+#define _NCR_0	                0x100000a0      /* Control Register (RW)     */
+#define _KP_X_OUT               0x10000090      /* Keypad row write (RW)     */
+#define _KP_Y_IN                0x10000080      /* Keypad column read (RO)   */
+#define _SWPK                   0x10000020      /* Switch pack (RO)          */
+#define _WHOAMI                 0x10000000      /* System ID Register (RO)   */
+
+#define _LEDS                   0x10000010      /* LEDs [31:0] (WO)          */
+
+#define IRR                     (*((volatile u_char *) Nep_p2v(_IRR)))
+#define AUD_CTL                 (*((volatile u_char *) Nep_p2v(_AUD_CTL)))
+#define MDM_CTL_0               (*((volatile u_char *) Nep_p2v(_MDM_CTL_0)))
+#define MDM_CTL_1               (*((volatile u_char *) Nep_p2v(_MDM_CTL_1)))
+#define NCR_0			(*((volatile u_char *) Nep_p2v(_NCR_0)))
+#define KP_X_OUT                (*((volatile u_char *) Nep_p2v(_KP_X_OUT)))
+#define KP_Y_IN                 (*((volatile u_char *) Nep_p2v(_KP_Y_IN)))
+#define SWPK                    (*((volatile u_char *) Nep_p2v(_SWPK)))
+#define WHOAMI                  (*((volatile u_char *) Nep_p2v(_WHOAMI)))
+
+#define LEDS                    (*((volatile Word   *) Nep_p2v(_LEDS)))
+
+#define IRR_ETHERNET		(1<<0)
+#define IRR_USAR		(1<<1)
+#define IRR_SA1111		(1<<2)
+
+#define AUD_SEL_1341            (1<<0)
+#define AUD_MUTE_1341           (1<<1)
+
+#define MDM_CTL0_RTS1		(1 << 0)
+#define MDM_CTL0_DTR1		(1 << 1)
+#define MDM_CTL0_RTS2		(1 << 2)
+#define MDM_CTL0_DTR2		(1 << 3)
+
+#define MDM_CTL1_CTS1		(1 << 0)
+#define MDM_CTL1_DSR1		(1 << 1)
+#define MDM_CTL1_DCD1		(1 << 2)
+#define MDM_CTL1_CTS2		(1 << 3)
+#define MDM_CTL1_DSR2		(1 << 4)
+#define MDM_CTL1_DCD2		(1 << 5)
+
+#define NCR_GP01_OFF		(1<<0)
+#define NCR_TP_PWR_EN		(1<<1)
+#define NCR_MS_PWR_EN		(1<<2)
+#define NCR_ENET_OSC_EN		(1<<3)
+#define NCR_SPI_KB_WK_UP	(1<<4)
+#define NCR_A0VPP		(1<<5)
+#define NCR_A1VPP		(1<<6)
+
+#endif

include/asm-arm/arch-sa1100/param.h

 /*
- * linux/include/asm-arm/arch-sa1100/param.h
+ *  linux/include/asm-arm/arch-sa1100/param.h
  */

include/asm-arm/arch-sa1100/pfs168.h

@@ -47,8 +47,6 @@
 #define SA1111_BASE             (0x40000000)
 
 #ifndef __ASSEMBLY__
-#define machine_has_neponset() (0)
-
 #define PFS168_COM5_VBASE		(*((volatile unsigned char *)(0xf0000000UL)))
 #define PFS168_COM6_VBASE		(*((volatile unsigned char *)(0xf0001000UL)))
 #define PFS168_SYSC1RTS			(*((volatile unsigned char *)(0xf0002000UL)))

include/asm-arm/arch-sa1100/serial.h

@@ -7,6 +7,26 @@
  * This is included by serial.c -- serial_sa1100.c makes no use of it.
  */
 
+/* Standard COM flags */
+#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
+
+/*
+ * Rather empty table...
+ * Hardwired serial ports should be defined here.
+ * PCMCIA will fill it dynamically.
+ */
+#ifdef CONFIG_SA1100_TRIZEPS
+
+#define RS_TABLE_SIZE 2
+
+#define STD_SERIAL_PORT_DEFNS	\
+       /* UART	CLK     	PORT		IRQ		FLAGS		*/ \
+	{ 0,	1500000,	TRIZEPS_UART5,	IRQ_GPIO16,	STD_COM_FLAGS },   \
+	{ 0,	1500000,	TRIZEPS_UART6,	IRQ_GPIO17,	STD_COM_FLAGS }
+
+#else
+
+#define RS_TABLE_SIZE 4
 
 /*
  * This assumes you have a 1.8432 MHz clock for your UART.
@@ -17,17 +37,6 @@
  */
 #define BASE_BAUD ( 1843200 / 16 )
 
-/* Standard COM flags */
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
-
-#define RS_TABLE_SIZE 4
-
-
-/*
- * Rather empty table...
- * Hardwired serial ports should be defined here.
- * PCMCIA will fill it dynamically.
- */
 #define STD_SERIAL_PORT_DEFNS	\
        /* UART	CLK     	PORT		IRQ	FLAGS		*/ \
 	{ 0,	BASE_BAUD,	0, 		0,	STD_COM_FLAGS },   \
@@ -35,5 +44,6 @@
 	{ 0,	BASE_BAUD,	0, 		0,	STD_COM_FLAGS },   \
 	{ 0,	BASE_BAUD,	0, 		0,	STD_COM_FLAGS }
 
-#define EXTRA_SERIAL_PORT_DEFNS
+#endif
 
+#define EXTRA_SERIAL_PORT_DEFNS

include/asm-arm/arch-shark/param.h

 /*
- * linux/include/asm-arm/arch-shark/param.h
+ *  linux/include/asm-arm/arch-shark/param.h
  *
  * by Alexander Schulz
  */
-
-#define HZ 100
-

include/asm-arm/arch-shark/system.h

@@ -11,7 +11,7 @@
 static void arch_reset(char mode)
 {
 	short temp;
-	cli();
+	local_irq_disable();
 	/* Reset the Machine via pc[3] of the sequoia chipset */
 	outw(0x09,0x24);
 	temp=inw(0x26);

include/asm-arm/arch-tbox/param.h

-#define HZ 1000
+/*
+ *  linux/include/asm-arm/arch-tbox/param.h
+ */
+#define __KERNEL_HZ 1000

include/asm-arm/cacheflush.h

@@ -10,6 +10,8 @@
 #ifndef _ASMARM_CACHEFLUSH_H
 #define _ASMARM_CACHEFLUSH_H
 
+#include <linux/sched.h>
+#include <linux/mm.h>
 #include <asm/proc/cache.h>
 
 #endif

include/asm-arm/glue.h

@@ -89,7 +89,8 @@
  *	  v4_early	- ARMv4 without Thumb early abort handler
  *	  v4t_late	- ARMv4 with Thumb late abort handler
  *	  v4t_early	- ARMv4 with Thumb early abort handler
- *	  v5ej_early	- ARMv5 with Thumb and Java early abort handler
+ *	  v5tej_early	- ARMv5 with Thumb and Java early abort handler
+ *	  xscale	- ARMv5 with Thumb with Xscale extensions
  */
 #undef CPU_ABORT_HANDLER
 #undef MULTI_ABORT
@@ -127,7 +128,7 @@
 #endif
 
 #if defined(CONFIG_CPU_ARM920T) || defined(CONFIG_CPU_ARM922T) || \
-    defined(CONFIG_CPU_ARM1020) || defined(CONFIG_CPU_XSCALE)
+    defined(CONFIG_CPU_ARM1020)
 # ifdef CPU_ABORT_HANDLER
 #  define MULTI_ABORT 1
 # else
@@ -139,7 +140,15 @@
 # ifdef CPU_ABORT_HANDLER
 #  define MULTI_ABORT 1
 # else
-#  define CPU_ABORT_HANDLER v5ej_early_abort
+#  define CPU_ABORT_HANDLER v5tej_early_abort
+# endif
+#endif
+
+#if defined(CONFIG_CPU_XSCALE)
+# ifdef CPU_ABORT_HANDLER
+#  define MULTI_ABORT 1
+# else
+#  define CPU_ABORT_HANDLER xscale_abort
 # endif
 #endif
 
@@ -161,7 +170,7 @@
  *	  v4wt		- ARMv4 with writethrough cache, without minicache
  *	  v4wb		- ARMv4 with writeback cache, without minicache
  *	  v4_mc		- ARMv4 with minicache
- *	  v5te_mc	- ARMv5TE with minicache
+ *	  xscale	- Xscale
  */
 #undef _USER
 #undef MULTI_USER
@@ -204,7 +213,7 @@
 # ifdef _USER
 #  define MULTI_USER 1
 # else
-#  define _USER v5te_mc
+#  define _USER xscale_mc
 # endif
 #endif
 

include/asm-arm/hardware/sa1111.h

@@ -49,6 +49,9 @@
  */
 #define __CCREG(x)	__REGP(SA1111_VBASE + (x))
 
+#define sa1111_writel(val,addr)	({ *(volatile unsigned int *)(addr) = (val); })
+#define sa1111_readl(addr)	(*(volatile unsigned int *)(addr))
+
 /*
  * System Bus Interface (SBI)
  *
@@ -697,4 +700,10 @@ struct sa1111_device {
 
 extern struct sa1111_device *sa1111;
 
+/*
+ * These frob the SKPCR register.
+ */
+void sa1111_enable_device(unsigned int mask);
+void sa1111_disable_device(unsigned int mask);
+
 #endif  /* _ASM_ARCH_SA1111 */

include/asm-arm/irq.h

@@ -37,6 +37,7 @@ extern void enable_irq(unsigned int);
 #define IRQT_BOTHEDGE	(__IRQT_RISEDGE|__IRQT_FALEDGE)
 #define IRQT_LOW	(__IRQT_LOWLVL)
 #define IRQT_HIGH	(__IRQT_HIGHLVL)
+#define IRQT_PROBE	(1 << 4)
 
 int set_irq_type(unsigned int irq, unsigned int type);
 

include/asm-arm/mach/serial_sa1100.h

@@ -19,11 +19,8 @@ struct uart_info;
 struct sa1100_port_fns {
 	void	(*set_mctrl)(struct uart_port *, u_int);
 	u_int	(*get_mctrl)(struct uart_port *);
-	void	(*enable_ms)(struct uart_port *);
 	void	(*pm)(struct uart_port *, u_int, u_int);
 	int	(*set_wake)(struct uart_port *, u_int);
-	int	(*open)(struct uart_port *, struct uart_info *);
-	void	(*close)(struct uart_port *, struct uart_info *);
 };
 
 #ifdef CONFIG_SERIAL_SA1100

include/asm-arm/mmu_context.h

@@ -13,13 +13,10 @@
 #ifndef __ASM_ARM_MMU_CONTEXT_H
 #define __ASM_ARM_MMU_CONTEXT_H
 
-#include <asm/bitops.h>
-#include <asm/pgtable.h>
-#include <asm/arch/memory.h>
 #include <asm/proc-fns.h>
 
-#define destroy_context(mm)		do { } while(0)
 #define init_new_context(tsk,mm)	0
+#define destroy_context(mm)		do { } while(0)
 
 /*
  * This is called when "tsk" is about to enter lazy TLB mode.
@@ -30,7 +27,8 @@
  *
  * tsk->mm will be NULL
  */
-static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk, unsigned cpu)
+static inline void
+enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk, unsigned cpu)
 {
 }
 
@@ -42,11 +40,12 @@ static inline void
 switch_mm(struct mm_struct *prev, struct mm_struct *next,
 	  struct task_struct *tsk, unsigned int cpu)
 {
-	if (prev != next)
-		cpu_switch_mm(next->pgd, next);
+	cpu_switch_mm(next->pgd, next);
 }
 
-#define activate_mm(prev, next) \
-	switch_mm((prev),(next),NULL,smp_processor_id())
+static inline void activate_mm(struct mm_struct *prev, struct mm_struct *next)
+{
+	cpu_switch_mm(next->pgd, next);
+}
 
 #endif

include/asm-arm/param.h

@@ -13,11 +13,16 @@
 #include <asm/arch/param.h>	/* for HZ */
 #include <asm/proc/page.h>	/* for EXEC_PAGE_SIZE */
 
-#ifndef HZ
-#define HZ 100
+#ifndef __KERNEL_HZ
+#define __KERNEL_HZ	100
 #endif
-#if defined(__KERNEL__) && (HZ == 100)
-#define hz_to_std(a) (a)
+
+#ifdef __KERNEL__
+# define HZ		__KERNEL_HZ	/* Internal kernel timer frequency */
+# define USER_HZ	100		/* User interfaces are in "ticks" */
+# define CLOCKS_PER_SEC	(USER_HZ)	/* like times() */
+#else
+# define HZ		100
 #endif
 
 #ifndef NGROUPS
@@ -31,9 +36,5 @@
 /* max length of hostname */
 #define MAXHOSTNAMELEN  64
 
-#ifdef __KERNEL__
-# define CLOCKS_PER_SEC	HZ
-#endif
-
 #endif
 

include/asm-arm/proc-armv/pgtable.h

@@ -144,13 +144,13 @@ static inline pte_t *pmd_page_kernel(pmd_t pmd)
  * The following macros handle the cache and bufferable bits...
  */
 #define _L_PTE_DEFAULT	L_PTE_PRESENT | L_PTE_YOUNG
-#define _L_PTE_READ	L_PTE_USER | L_PTE_CACHEABLE | L_PTE_BUFFERABLE
+#define _L_PTE_READ	L_PTE_USER | L_PTE_EXEC | L_PTE_CACHEABLE | L_PTE_BUFFERABLE
 
 #define PAGE_NONE       __pgprot(_L_PTE_DEFAULT)
 #define PAGE_COPY       __pgprot(_L_PTE_DEFAULT | _L_PTE_READ)
 #define PAGE_SHARED     __pgprot(_L_PTE_DEFAULT | _L_PTE_READ | L_PTE_WRITE)
 #define PAGE_READONLY   __pgprot(_L_PTE_DEFAULT | _L_PTE_READ)
-#define PAGE_KERNEL     __pgprot(_L_PTE_DEFAULT | L_PTE_CACHEABLE | L_PTE_BUFFERABLE | L_PTE_DIRTY | L_PTE_WRITE)
+#define PAGE_KERNEL     __pgprot(_L_PTE_DEFAULT | L_PTE_CACHEABLE | L_PTE_BUFFERABLE | L_PTE_DIRTY | L_PTE_WRITE | L_PTE_EXEC)
 
 #define _PAGE_CHG_MASK	(PAGE_MASK | L_PTE_DIRTY | L_PTE_YOUNG)
 

include/asm-arm/proc-armv/ptrace.h

@@ -32,12 +32,21 @@
 #define PSR_F_BIT	0x00000040
 #define PSR_I_BIT	0x00000080
 #define PSR_J_BIT	0x01000000
+#define PSR_Q_BIT	0x08000000
 #define PSR_V_BIT	0x10000000
 #define PSR_C_BIT	0x20000000
 #define PSR_Z_BIT	0x40000000
 #define PSR_N_BIT	0x80000000
 #define PCMASK		0
 
+/*
+ * Groups of PSR bits
+ */
+#define PSR_f		0xff000000	/* Flags		*/
+#define PSR_s		0x00ff0000	/* Status		*/
+#define PSR_x		0x0000ff00	/* Extension		*/
+#define PSR_c		0x000000ff	/* Control		*/
+
 /*
  * CR1 bits
  */
@@ -121,7 +130,7 @@ static inline int valid_user_regs(struct pt_regs *regs)
 	/*
 	 * Force CPSR to something logical...
 	 */
-	regs->ARM_cpsr &= (PSR_V_BIT|PSR_C_BIT|PSR_Z_BIT|PSR_N_BIT|MODE32_BIT);
+	regs->ARM_cpsr &= PSR_f | PSR_s | PSR_x | PSR_T_BIT | MODE32_BIT;
 
 	return 0;
 }

include/asm-arm/proc-armv/system.h

@@ -182,12 +182,12 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size
 			break;
 #else
 		case 1:	__asm__ __volatile__ ("swpb %0, %1, [%2]"
-					: "=r" (ret)
+					: "=&r" (ret)
 					: "r" (x), "r" (ptr)
 					: "memory");
 			break;
 		case 4:	__asm__ __volatile__ ("swp %0, %1, [%2]"
-					: "=r" (ret)
+					: "=&r" (ret)
 					: "r" (x), "r" (ptr)
 					: "memory");
 			break;

include/asm-arm/procinfo.h

@@ -50,13 +50,14 @@ struct proc_info_list {
 
 #define PROC_INFO_SZ	44
 
-#define HWCAP_SWP	 1
-#define HWCAP_HALF	 2
-#define HWCAP_THUMB	 4
-#define HWCAP_26BIT	 8	/* Play it safe */
-#define HWCAP_FAST_MULT	 16
-#define HWCAP_FPA        32
-#define HWCAP_VFP        64
-#define HWCAP_EDSP	 128
+#define HWCAP_SWP	1
+#define HWCAP_HALF	2
+#define HWCAP_THUMB	4
+#define HWCAP_26BIT	8	/* Play it safe */
+#define HWCAP_FAST_MULT	16
+#define HWCAP_FPA	32
+#define HWCAP_VFP	64
+#define HWCAP_EDSP	128
+#define HWCAP_JAVA	256
 
 #endif

include/asm-arm/suspend.h

+#ifdef _ASMARM_SUSPEND_H
+#define _ASMARM_SUSPEND_H
+
+#endif

include/asm-arm/system.h

@@ -64,7 +64,12 @@ extern asmlinkage void __backtrace(void);
 struct thread_info;
 extern struct task_struct *__switch_to(struct thread_info *, struct thread_info *);
 
-#define switch_to(prev,next)						\
+#define prepare_arch_schedule(prev)		do { } while(0)
+#define finish_arch_schedule(prev)		do { } while(0)
+#define prepare_arch_switch(rq)			do { } while(0)
+#define finish_arch_switch(rq)			spin_unlock_irq(&(rq)->lock)
+
+#define switch_to(prev,next,last)					\
 	do {			 					\
 		__switch_to(prev->thread_info,next->thread_info);	\
 		mb();							\

include/asm-sparc/cache.h

@@ -10,6 +10,7 @@
 
 #include <asm/asi.h>
 
+#define L1_CACHE_SHIFT 5
 #define L1_CACHE_BYTES 32
 #define L1_CACHE_ALIGN(x) ((((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)))
 

include/asm-sparc/param.h

@@ -2,6 +2,12 @@
 #ifndef _ASMSPARC_PARAM_H
 #define _ASMSPARC_PARAM_H
 
+#ifdef __KERNEL__
+# define HZ		100	/* Internal kernel timer frequency */
+# define USER_HZ	100	/* .. some user interfaces are in "ticks" */
+# define CLOCKS_PER_SEC (USER_HZ)
+#endif
+
 #ifndef HZ
 #define HZ 100
 #endif
@@ -18,8 +24,4 @@
 
 #define MAXHOSTNAMELEN	64	/* max length of hostname */
 
-#ifdef __KERNEL__
-# define CLOCKS_PER_SEC	HZ	/* frequency at which times() counts */
-#endif
-
 #endif

include/asm-sparc64/cache.h

@@ -5,7 +5,8 @@
 #define __ARCH_SPARC64_CACHE_H
 
 /* bytes per L1 cache line */
-#define        L1_CACHE_BYTES		32 /* Two 16-byte sub-blocks per line. */
+#define        L1_CACHE_SHIFT	5
+#define        L1_CACHE_BYTES	32 /* Two 16-byte sub-blocks per line. */
 
 #define        L1_CACHE_ALIGN(x)       (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1))
 

include/asm-sparc64/param.h

@@ -2,6 +2,12 @@
 #ifndef _ASMSPARC64_PARAM_H
 #define _ASMSPARC64_PARAM_H
 
+#ifdef __KERNEL__
+# define HZ		100	/* Internal kernel timer frequency */
+# define USER_HZ	100	/* .. some user interfaces are in "ticks" */
+# define CLOCKS_PER_SEC (USER_HZ)
+#endif
+
 #ifndef HZ
 #define HZ 100
 #endif
@@ -18,8 +24,4 @@
 
 #define MAXHOSTNAMELEN	64	/* max length of hostname */
 
-#ifdef __KERNEL__
-# define CLOCKS_PER_SEC	HZ	/* frequency at which times() counts */
-#endif
-
 #endif /* _ASMSPARC64_PARAM_H */

include/linux/if_vlan.h

@@ -141,9 +141,10 @@ struct vlan_skb_tx_cookie {
 	(VLAN_TX_SKB_CB(__skb)->magic == VLAN_TX_COOKIE_MAGIC)
 #define vlan_tx_tag_get(__skb)	(VLAN_TX_SKB_CB(__skb)->vlan_tag)
 
-/* VLAN rx hw acceleration helper.  This acts like netif_rx().  */
-static inline int vlan_hwaccel_rx(struct sk_buff *skb, struct vlan_group *grp,
-				  unsigned short vlan_tag)
+/* VLAN rx hw acceleration helper.  This acts like netif_{rx,receive_skb}(). */
+static inline int __vlan_hwaccel_rx(struct sk_buff *skb,
+				    struct vlan_group *grp,
+				    unsigned short vlan_tag, int polling)
 {
 	struct net_device_stats *stats;
 
@@ -182,9 +183,22 @@ static inline int vlan_hwaccel_rx(struct sk_buff *skb, struct vlan_group *grp,
 		break;
 	};
 
-	return netif_rx(skb);
+	return (polling ? netif_receive_skb(skb) : netif_rx(skb));
 }
 
+static inline int vlan_hwaccel_rx(struct sk_buff *skb,
+				  struct vlan_group *grp,
+				  unsigned short vlan_tag)
+{
+	return __vlan_hwaccel_rx(skb, grp, vlan_tag, 0);
+}
+
+static inline int vlan_hwaccel_receive_skb(struct sk_buff *skb,
+					   struct vlan_group *grp,
+					   unsigned short vlan_tag)
+{
+	return __vlan_hwaccel_rx(skb, grp, vlan_tag, 1);
+}
 #endif /* __KERNEL__ */
 
 /* VLAN IOCTLs are found in sockios.h */

include/linux/netlink.h

@@ -110,6 +110,8 @@ extern int netlink_unicast(struct sock *ssk, struct sk_buff *skb, __u32 pid, int
 extern void netlink_broadcast(struct sock *ssk, struct sk_buff *skb, __u32 pid,
 			      __u32 group, int allocation);
 extern void netlink_set_err(struct sock *ssk, __u32 pid, __u32 group, int code);
+extern int netlink_register_notifier(struct notifier_block *nb);
+extern int netlink_unregister_notifier(struct notifier_block *nb);
 
 /*
  *	skb should fit one page. This choice is good for headerless malloc.
@@ -129,6 +131,12 @@ struct netlink_callback
 	long		args[4];
 };
 
+struct netlink_notify
+{
+	int pid;
+	int protocol;
+};
+
 static __inline__ struct nlmsghdr *
 __nlmsg_put(struct sk_buff *skb, u32 pid, u32 seq, int type, int len)
 {

include/linux/notifier.h

@@ -58,5 +58,7 @@ extern int notifier_call_chain(struct notifier_block **n, unsigned long val, voi
 #define SYS_HALT	0x0002	/* Notify of system halt */
 #define SYS_POWER_OFF	0x0003	/* Notify of system power off */
 
+#define NETLINK_URELEASE	0x0001	/* Unicast netlink socket released */
+
 #endif /* __KERNEL__ */
 #endif /* _LINUX_NOTIFIER_H */