Commit 400bd2e4 authored by Markos Chandras's avatar Markos Chandras Committed by Ralf Baechle

MIPS: math-emu: Add support for the MIPS R6 RINT FPU instruction

MIPS R6 introduced the following instruction:
Floating-Point Round to Integral
Scalar floating-point round to integral floating point value.

RINT.fmt: FPR[fd] = round_int(FPR[fs])
Signed-off-by: default avatarMarkos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10958/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 83d43305
...@@ -1791,6 +1791,18 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx, ...@@ -1791,6 +1791,18 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
break; break;
} }
case frint_op: {
union ieee754sp fs;
if (!cpu_has_mips_r6)
return SIGILL;
SPFROMREG(fs, MIPSInst_FS(ir));
rv.l = ieee754sp_tlong(fs);
rv.s = ieee754sp_flong(rv.l);
goto copcsr;
}
case fabs_op: case fabs_op:
handler.u = ieee754sp_abs; handler.u = ieee754sp_abs;
goto scopuop; goto scopuop;
...@@ -2037,6 +2049,18 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx, ...@@ -2037,6 +2049,18 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
break; break;
} }
case frint_op: {
union ieee754dp fs;
if (!cpu_has_mips_r6)
return SIGILL;
DPFROMREG(fs, MIPSInst_FS(ir));
rv.l = ieee754dp_tlong(fs);
rv.d = ieee754dp_flong(rv.l);
goto copcsr;
}
case fabs_op: case fabs_op:
handler.u = ieee754dp_abs; handler.u = ieee754dp_abs;
goto dcopuop; goto dcopuop;
......
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