Commit 40ce6575 authored by Daniel Vetter's avatar Daniel Vetter Committed by Chris Wilson

drm/i915/gtt: call chipset flush directly

Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
parent 23ed992a
...@@ -1476,6 +1476,13 @@ const struct intel_gtt *intel_gtt_get(void) ...@@ -1476,6 +1476,13 @@ const struct intel_gtt *intel_gtt_get(void)
} }
EXPORT_SYMBOL(intel_gtt_get); EXPORT_SYMBOL(intel_gtt_get);
void intel_gtt_chipset_flush(void)
{
if (intel_private.driver->chipset_flush)
intel_private.driver->chipset_flush();
}
EXPORT_SYMBOL(intel_gtt_chipset_flush);
void intel_gmch_remove(struct pci_dev *pdev) void intel_gmch_remove(struct pci_dev *pdev)
{ {
if (intel_private.pcidev) if (intel_private.pcidev)
......
...@@ -2192,7 +2192,7 @@ i915_gem_flush(struct drm_device *dev, ...@@ -2192,7 +2192,7 @@ i915_gem_flush(struct drm_device *dev,
drm_i915_private_t *dev_priv = dev->dev_private; drm_i915_private_t *dev_priv = dev->dev_private;
if (flush_domains & I915_GEM_DOMAIN_CPU) if (flush_domains & I915_GEM_DOMAIN_CPU)
drm_agp_chipset_flush(dev); intel_gtt_chipset_flush();
if ((flush_domains | invalidate_domains) & I915_GEM_GPU_DOMAINS) { if ((flush_domains | invalidate_domains) & I915_GEM_GPU_DOMAINS) {
if (flush_rings & RING_RENDER) if (flush_rings & RING_RENDER)
...@@ -2920,14 +2920,13 @@ i915_gem_object_flush_gtt_write_domain(struct drm_gem_object *obj) ...@@ -2920,14 +2920,13 @@ i915_gem_object_flush_gtt_write_domain(struct drm_gem_object *obj)
static void static void
i915_gem_object_flush_cpu_write_domain(struct drm_gem_object *obj) i915_gem_object_flush_cpu_write_domain(struct drm_gem_object *obj)
{ {
struct drm_device *dev = obj->dev;
uint32_t old_write_domain; uint32_t old_write_domain;
if (obj->write_domain != I915_GEM_DOMAIN_CPU) if (obj->write_domain != I915_GEM_DOMAIN_CPU)
return; return;
i915_gem_clflush_object(obj); i915_gem_clflush_object(obj);
drm_agp_chipset_flush(dev); intel_gtt_chipset_flush();
old_write_domain = obj->write_domain; old_write_domain = obj->write_domain;
obj->write_domain = 0; obj->write_domain = 0;
...@@ -5069,7 +5068,7 @@ void i915_gem_detach_phys_object(struct drm_device *dev, ...@@ -5069,7 +5068,7 @@ void i915_gem_detach_phys_object(struct drm_device *dev,
page_cache_release(page); page_cache_release(page);
} }
} }
drm_agp_chipset_flush(dev); intel_gtt_chipset_flush();
obj_priv->phys_obj->cur_obj = NULL; obj_priv->phys_obj->cur_obj = NULL;
obj_priv->phys_obj = NULL; obj_priv->phys_obj = NULL;
...@@ -5161,7 +5160,7 @@ i915_gem_phys_pwrite(struct drm_device *dev, struct drm_gem_object *obj, ...@@ -5161,7 +5160,7 @@ i915_gem_phys_pwrite(struct drm_device *dev, struct drm_gem_object *obj,
return -EFAULT; return -EFAULT;
} }
drm_agp_chipset_flush(dev); intel_gtt_chipset_flush();
return 0; return 0;
} }
......
...@@ -13,6 +13,7 @@ const struct intel_gtt { ...@@ -13,6 +13,7 @@ const struct intel_gtt {
unsigned int gtt_mappable_entries; unsigned int gtt_mappable_entries;
} *intel_gtt_get(void); } *intel_gtt_get(void);
void intel_gtt_chipset_flush(void);
/* Special gtt memory types */ /* Special gtt memory types */
#define AGP_DCACHE_MEMORY 1 #define AGP_DCACHE_MEMORY 1
...@@ -26,4 +27,3 @@ const struct intel_gtt { ...@@ -26,4 +27,3 @@ const struct intel_gtt {
#define AGP_USER_CACHED_MEMORY_GFDT (1 << 3) #define AGP_USER_CACHED_MEMORY_GFDT (1 << 3)
#endif #endif
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