Commit 40d3c041 authored by V sujith kumar Reddy's avatar V sujith kumar Reddy Committed by Mark Brown

ASoC: SOF: amd: increase SRAM inbox and outbox size to 1024

Increase inbox and outbox mailbox size from 512 to 1024 to
support thirdparty DTS integration ipc tx/rx messages communication.
This is done through firmware window get info.
Signed-off-by: default avatarV sujith kumar Reddy <Vsujithkumar.Reddy@amd.com>
Reviewed-by: default avatarPierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://lore.kernel.org/r/20220913144319.1055302-5-Vsujithkumar.Reddy@amd.comSigned-off-by: default avatarMark Brown <broonie@kernel.org>
parent ed2562c6
......@@ -77,6 +77,7 @@ struct snd_sof_dsp_ops sof_acp_common_ops = {
.send_msg = acp_sof_ipc_send_msg,
.ipc_msg_data = acp_sof_ipc_msg_data,
.get_mailbox_offset = acp_sof_ipc_get_mailbox_offset,
.get_window_offset = acp_sof_ipc_get_window_offset,
.irq_thread = acp_sof_ipc_irq_thread,
/* stream callbacks */
......
......@@ -42,21 +42,24 @@ static void acpbus_trigger_host_to_dsp_swintr(struct acp_dev_data *adata)
static void acp_ipc_host_msg_set(struct snd_sof_dev *sdev)
{
unsigned int host_msg = offsetof(struct scratch_ipc_conf, sof_host_msg_write);
unsigned int host_msg = sdev->debug_box.offset +
offsetof(struct scratch_ipc_conf, sof_host_msg_write);
snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_SCRATCH_REG_0 + host_msg, 1);
}
static void acp_dsp_ipc_host_done(struct snd_sof_dev *sdev)
{
unsigned int dsp_msg = offsetof(struct scratch_ipc_conf, sof_dsp_msg_write);
unsigned int dsp_msg = sdev->debug_box.offset +
offsetof(struct scratch_ipc_conf, sof_dsp_msg_write);
snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_SCRATCH_REG_0 + dsp_msg, 0);
}
static void acp_dsp_ipc_dsp_done(struct snd_sof_dev *sdev)
{
unsigned int dsp_ack = offsetof(struct scratch_ipc_conf, sof_dsp_ack_write);
unsigned int dsp_ack = sdev->debug_box.offset +
offsetof(struct scratch_ipc_conf, sof_dsp_ack_write);
snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_SCRATCH_REG_0 + dsp_ack, 0);
}
......@@ -65,7 +68,7 @@ int acp_sof_ipc_send_msg(struct snd_sof_dev *sdev, struct snd_sof_ipc_msg *msg)
{
struct acp_dev_data *adata = sdev->pdata->hw_pdata;
const struct sof_amd_acp_desc *desc = get_chip_info(sdev->pdata);
unsigned int offset = offsetof(struct scratch_ipc_conf, sof_in_box);
unsigned int offset = sdev->host_box.offset;
unsigned int count = ACP_HW_SEM_RETRY_COUNT;
while (snd_sof_dsp_read(sdev, ACP_DSP_BAR, desc->hw_semaphore_offset)) {
......@@ -95,7 +98,7 @@ static void acp_dsp_ipc_get_reply(struct snd_sof_dev *sdev)
struct snd_sof_ipc_msg *msg = sdev->msg;
struct sof_ipc_reply reply;
struct sof_ipc_cmd_hdr *hdr;
unsigned int offset = offsetof(struct scratch_ipc_conf, sof_in_box);
unsigned int offset = sdev->host_box.offset;
int ret = 0;
/*
......@@ -145,11 +148,19 @@ static void acp_dsp_ipc_get_reply(struct snd_sof_dev *sdev)
irqreturn_t acp_sof_ipc_irq_thread(int irq, void *context)
{
struct snd_sof_dev *sdev = context;
unsigned int dsp_msg_write = offsetof(struct scratch_ipc_conf, sof_dsp_msg_write);
unsigned int dsp_ack_write = offsetof(struct scratch_ipc_conf, sof_dsp_ack_write);
unsigned int dsp_msg_write = sdev->debug_box.offset +
offsetof(struct scratch_ipc_conf, sof_dsp_msg_write);
unsigned int dsp_ack_write = sdev->debug_box.offset +
offsetof(struct scratch_ipc_conf, sof_dsp_ack_write);
bool ipc_irq = false;
int dsp_msg, dsp_ack;
if (sdev->first_boot && sdev->fw_state != SOF_FW_BOOT_COMPLETE) {
snd_sof_ipc_msgs_rx(sdev);
acp_dsp_ipc_host_done(sdev);
return IRQ_HANDLED;
}
dsp_msg = snd_sof_dsp_read(sdev, ACP_DSP_BAR, ACP_SCRATCH_REG_0 + dsp_msg_write);
if (dsp_msg) {
snd_sof_ipc_msgs_rx(sdev);
......@@ -179,7 +190,7 @@ EXPORT_SYMBOL_NS(acp_sof_ipc_irq_thread, SND_SOC_SOF_AMD_COMMON);
int acp_sof_ipc_msg_data(struct snd_sof_dev *sdev, struct snd_pcm_substream *substream,
void *p, size_t sz)
{
unsigned int offset = offsetof(struct scratch_ipc_conf, sof_out_box);
unsigned int offset = sdev->dsp_box.offset;
if (!substream || !sdev->stream_box.size)
acp_mailbox_read(sdev, offset, p, sz);
......@@ -196,4 +207,10 @@ int acp_sof_ipc_get_mailbox_offset(struct snd_sof_dev *sdev)
}
EXPORT_SYMBOL_NS(acp_sof_ipc_get_mailbox_offset, SND_SOC_SOF_AMD_COMMON);
int acp_sof_ipc_get_window_offset(struct snd_sof_dev *sdev, u32 id)
{
return 0;
}
EXPORT_SYMBOL_NS(acp_sof_ipc_get_window_offset, SND_SOC_SOF_AMD_COMMON);
MODULE_DESCRIPTION("AMD ACP sof-ipc driver");
......@@ -42,7 +42,8 @@ int acp_pcm_hw_params(struct snd_sof_dev *sdev, struct snd_pcm_substream *substr
/* write buffer size of stream in scratch memory */
buf_offset = offsetof(struct scratch_reg_conf, buf_size);
buf_offset = sdev->debug_box.offset +
offsetof(struct scratch_reg_conf, buf_size);
index = stream->stream_tag - 1;
buf_offset = buf_offset + index * 4;
......
......@@ -89,7 +89,8 @@ int acp_dsp_stream_config(struct snd_sof_dev *sdev, struct acp_dsp_stream *strea
/* write phy_addr in scratch memory */
phy_addr_offset = offsetof(struct scratch_reg_conf, reg_offset);
phy_addr_offset = sdev->debug_box.offset +
offsetof(struct scratch_reg_conf, reg_offset);
index = stream_tag - 1;
phy_addr_offset = phy_addr_offset + index * 4;
......@@ -97,6 +98,7 @@ int acp_dsp_stream_config(struct snd_sof_dev *sdev, struct acp_dsp_stream *strea
phy_addr_offset, stream->reg_offset);
/* Group Enable */
offset = offset + sdev->debug_box.offset;
reg_val = desc->sram_pte_offset + offset;
snd_sof_dsp_write(sdev, ACP_DSP_BAR, pte_reg, reg_val | BIT(31));
snd_sof_dsp_write(sdev, ACP_DSP_BAR, pte_size, PAGE_SIZE_4K_ENABLE);
......
......@@ -42,7 +42,8 @@ static void init_dma_descriptor(struct acp_dev_data *adata)
const struct sof_amd_acp_desc *desc = get_chip_info(sdev->pdata);
unsigned int addr;
addr = desc->sram_pte_offset + offsetof(struct scratch_reg_conf, dma_desc);
addr = desc->sram_pte_offset + sdev->debug_box.offset +
offsetof(struct scratch_reg_conf, dma_desc);
snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_DMA_DESC_BASE_ADDR, addr);
snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_DMA_DESC_MAX_NUM_DSCR, ACP_MAX_DESC_CNT);
......@@ -54,8 +55,9 @@ static void configure_dma_descriptor(struct acp_dev_data *adata, unsigned short
struct snd_sof_dev *sdev = adata->dev;
unsigned int offset;
offset = ACP_SCRATCH_REG_0 + offsetof(struct scratch_reg_conf, dma_desc) +
idx * sizeof(struct dma_descriptor);
offset = ACP_SCRATCH_REG_0 + sdev->debug_box.offset +
offsetof(struct scratch_reg_conf, dma_desc) +
idx * sizeof(struct dma_descriptor);
snd_sof_dsp_write(sdev, ACP_DSP_BAR, offset, dscr_info->src_addr);
snd_sof_dsp_write(sdev, ACP_DSP_BAR, offset + 0x4, dscr_info->dest_addr);
......@@ -516,6 +518,15 @@ int amd_sof_acp_probe(struct snd_sof_dev *sdev)
return ret;
}
sdev->dsp_box.offset = 0;
sdev->dsp_box.size = BOX_SIZE_512;
sdev->host_box.offset = sdev->dsp_box.offset + sdev->dsp_box.size;
sdev->host_box.size = BOX_SIZE_512;
sdev->debug_box.offset = sdev->host_box.offset + sdev->host_box.size;
sdev->debug_box.size = BOX_SIZE_1024;
acp_memory_init(sdev);
acp_dsp_stream_init(sdev);
......
......@@ -66,6 +66,9 @@
#define MBOX_READY_MASK 0x80000000
#define MBOX_STATUS_MASK 0xFFFF
#define BOX_SIZE_512 0x200
#define BOX_SIZE_1024 0x400
struct acp_atu_grp_pte {
u32 low;
u32 high;
......@@ -90,10 +93,6 @@ struct dma_descriptor {
/* Scratch memory structure for communication b/w host and dsp */
struct scratch_ipc_conf {
/* DSP mailbox */
u8 sof_out_box[512];
/* Host mailbox */
u8 sof_in_box[512];
/* Debug memory */
u8 sof_debug_box[1024];
/* Exception memory*/
......
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