Commit 40e8b3a6 authored by Venu Byravarasu's avatar Venu Byravarasu Committed by Stephen Warren

ARM: tegra: Add reset GPIO information to PHY DT node

As reset GPIO information is PHY specific detail, adding
it to PHY DT node.
Signed-off-by: default avatarVenu Byravarasu <vbyravarasu@nvidia.com>
Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
parent 93045121
......@@ -7,6 +7,9 @@ Required properties :
- reg : Address and length of the register set for the USB PHY interface.
- phy_type : Should be one of "ulpi" or "utmi".
Required properties for phy_type == ulpi:
- nvidia,phy-reset-gpio : The GPIO used to reset the PHY.
Optional properties:
- nvidia,has-legacy-mode : boolean indicates whether this controller can
operate in legacy mode (as APX 2500 / 2600). In legacy mode some
......
......@@ -432,6 +432,10 @@ usb@c5008000 {
status = "okay";
};
usb-phy@c5004400 {
nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
};
sdhci@c8000200 {
status = "okay";
cd-gpios = <&gpio 69 0>; /* gpio PI5 */
......
......@@ -420,6 +420,10 @@ usb@c5008000 {
status = "okay";
};
usb-phy@c5004400 {
nvidia,phy-reset-gpio = <&gpio 168 0>; /* gpio PV0 */
};
sdhci@c8000000 {
status = "okay";
cd-gpios = <&gpio 173 0>; /* gpio PV5 */
......
......@@ -561,6 +561,10 @@ usb@c5008000 {
status = "okay";
};
usb-phy@c5004400 {
nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
};
sdhci@c8000000 {
status = "okay";
power-gpios = <&gpio 86 0>; /* gpio PK6 */
......
......@@ -310,6 +310,10 @@ usb@c5008000 {
status = "okay";
};
usb-phy@c5004400 {
nvidia,phy-reset-gpio = <&gpio 168 0>; /* gpio PV0 */
};
sdhci@c8000000 {
status = "okay";
bus-width = <4>;
......
......@@ -497,6 +497,10 @@ usb@c5008000 {
status = "okay";
};
usb-phy@c5004400 {
nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
};
sdhci@c8000000 {
status = "okay";
power-gpios = <&gpio 86 0>; /* gpio PK6 */
......
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