Commit 40f4b058 authored by Mark Brown's avatar Mark Brown

Merge remote-tracking branch 'regmap/for-6.3' into regmap-next

parents 697c3892 c74e7af1
......@@ -189,12 +189,8 @@ static void regmap_irq_sync_unlock(struct irq_data *data)
if (!d->type_buf_def[i])
continue;
reg = d->get_irq_reg(d, d->chip->type_base, i);
if (d->chip->type_invert)
ret = regmap_update_bits(d->map, reg,
d->type_buf_def[i], ~d->type_buf[i]);
else
ret = regmap_update_bits(d->map, reg,
d->type_buf_def[i], d->type_buf[i]);
ret = regmap_update_bits(d->map, reg,
d->type_buf_def[i], d->type_buf[i]);
if (ret != 0)
dev_err(d->map->dev, "Failed to sync type in %x\n",
reg);
......@@ -882,20 +878,6 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
*/
dev_warn(map->dev, "mask_base and unmask_base are inverted, please fix it");
/* Might as well warn about mask_invert while we're at it... */
if (chip->mask_invert)
dev_warn(map->dev, "mask_invert=true ignored");
d->mask_base = chip->unmask_base;
d->unmask_base = chip->mask_base;
} else if (chip->mask_invert) {
/*
* Swap the roles of mask_base and unmask_base if the bits are
* inverted. This is deprecated, drivers should use unmask_base
* directly.
*/
dev_warn(map->dev, "mask_invert=true is deprecated; please switch to unmask_base");
d->mask_base = chip->unmask_base;
d->unmask_base = chip->mask_base;
} else {
......@@ -1028,9 +1010,6 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
ret = regmap_read(map, reg, &d->type_buf_def[i]);
if (d->chip->type_invert)
d->type_buf_def[i] = ~d->type_buf_def[i];
if (ret) {
dev_err(map->dev, "Failed to get type defaults at 0x%x: %d\n",
reg, ret);
......
......@@ -10,31 +10,21 @@
/* Clause-45 mask includes the device type (5 bit) and actual register number (16 bit) */
#define REGNUM_C45_MASK GENMASK(20, 0)
static int regmap_mdio_read(struct mdio_device *mdio_dev, u32 reg, unsigned int *val)
static int regmap_mdio_c22_read(void *context, unsigned int reg, unsigned int *val)
{
struct mdio_device *mdio_dev = context;
int ret;
if (unlikely(reg & ~REGNUM_C22_MASK))
return -ENXIO;
ret = mdiodev_read(mdio_dev, reg);
if (ret < 0)
return ret;
*val = ret & REGVAL_MASK;
return 0;
}
static int regmap_mdio_write(struct mdio_device *mdio_dev, u32 reg, unsigned int val)
{
return mdiodev_write(mdio_dev, reg, val);
}
static int regmap_mdio_c22_read(void *context, unsigned int reg, unsigned int *val)
{
struct mdio_device *mdio_dev = context;
if (unlikely(reg & ~REGNUM_C22_MASK))
return -ENXIO;
return regmap_mdio_read(mdio_dev, reg, val);
return 0;
}
static int regmap_mdio_c22_write(void *context, unsigned int reg, unsigned int val)
......@@ -55,21 +45,36 @@ static const struct regmap_bus regmap_mdio_c22_bus = {
static int regmap_mdio_c45_read(void *context, unsigned int reg, unsigned int *val)
{
struct mdio_device *mdio_dev = context;
unsigned int devad;
int ret;
if (unlikely(reg & ~REGNUM_C45_MASK))
return -ENXIO;
return regmap_mdio_read(mdio_dev, MII_ADDR_C45 | reg, val);
devad = reg >> REGMAP_MDIO_C45_DEVAD_SHIFT;
reg = reg & REGMAP_MDIO_C45_REGNUM_MASK;
ret = mdiodev_c45_read(mdio_dev, devad, reg);
if (ret < 0)
return ret;
*val = ret & REGVAL_MASK;
return 0;
}
static int regmap_mdio_c45_write(void *context, unsigned int reg, unsigned int val)
{
struct mdio_device *mdio_dev = context;
unsigned int devad;
if (unlikely(reg & ~REGNUM_C45_MASK))
return -ENXIO;
return regmap_mdio_write(mdio_dev, MII_ADDR_C45 | reg, val);
devad = reg >> REGMAP_MDIO_C45_DEVAD_SHIFT;
reg = reg & REGMAP_MDIO_C45_REGNUM_MASK;
return mdiodev_c45_write(mdio_dev, devad, reg, val);
}
static const struct regmap_bus regmap_mdio_c45_bus = {
......
......@@ -38,6 +38,14 @@ struct regmap_field;
struct snd_ac97;
struct sdw_slave;
/*
* regmap_mdio address encoding. IEEE 802.3ae clause 45 addresses consist of a
* device address and a register address.
*/
#define REGMAP_MDIO_C45_DEVAD_SHIFT 16
#define REGMAP_MDIO_C45_DEVAD_MASK GENMASK(20, 16)
#define REGMAP_MDIO_C45_REGNUM_MASK GENMASK(15, 0)
/* An enum of all the supported cache types */
enum regcache_type {
REGCACHE_NONE,
......@@ -512,6 +520,7 @@ typedef void (*regmap_hw_free_context)(void *context);
* to perform locking. This field is ignored if custom lock/unlock
* functions are used (see fields lock/unlock of
* struct regmap_config).
* @free_on_exit: kfree this on exit of regmap
* @write: Write operation.
* @gather_write: Write operation with split register/value, return -ENOTSUPP
* if not implemented on a given device.
......@@ -540,10 +549,10 @@ typedef void (*regmap_hw_free_context)(void *context);
* DEFAULT, BIG is assumed.
* @max_raw_read: Max raw read size that can be used on the bus.
* @max_raw_write: Max raw write size that can be used on the bus.
* @free_on_exit: kfree this on exit of regmap
*/
struct regmap_bus {
bool fast_io;
bool free_on_exit;
regmap_hw_write write;
regmap_hw_gather_write gather_write;
regmap_hw_async_write async_write;
......@@ -560,7 +569,6 @@ struct regmap_bus {
enum regmap_endian val_format_endian_default;
size_t max_raw_read;
size_t max_raw_write;
bool free_on_exit;
};
/*
......@@ -1532,9 +1540,6 @@ struct regmap_irq_chip_data;
* @config_base: Base address for IRQ type config regs. If null unsupported.
* @irq_reg_stride: Stride to use for chips where registers are not contiguous.
* @init_ack_masked: Ack all masked interrupts once during initalization.
* @mask_invert: Inverted mask register: cleared bits are masked out.
* Deprecated; prefer describing an inverted mask register as
* an unmask register.
* @mask_unmask_non_inverted: Controls mask bit inversion for chips that set
* both @mask_base and @unmask_base. If false, mask and unmask bits are
* inverted (which is deprecated behavior); if true, bits will not be
......@@ -1547,8 +1552,6 @@ struct regmap_irq_chip_data;
* @ack_invert: Inverted ack register: cleared bits for ack.
* @clear_ack: Use this to set 1 and 0 or vice-versa to clear interrupts.
* @wake_invert: Inverted wake register: cleared bits are wake enabled.
* @type_invert: Invert the type flags. Deprecated, use config registers
* instead.
* @type_in_mask: Use the mask registers for controlling irq type. Use this if
* the hardware provides separate bits for rising/falling edge
* or low/high level interrupts and they should be combined into
......@@ -1618,14 +1621,12 @@ struct regmap_irq_chip {
const unsigned int *config_base;
unsigned int irq_reg_stride;
unsigned int init_ack_masked:1;
unsigned int mask_invert:1;
unsigned int mask_unmask_non_inverted:1;
unsigned int use_ack:1;
unsigned int ack_invert:1;
unsigned int clear_ack:1;
unsigned int wake_invert:1;
unsigned int runtime_pm:1;
unsigned int type_invert:1;
unsigned int type_in_mask:1;
unsigned int clear_on_unmask:1;
unsigned int not_fixed_stride:1;
......
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