Commit 415e2c52 authored by Sanjeev Bansal's avatar Sanjeev Bansal Committed by Kleber Sacilotto de Souza

tg3: Add higher cpu clock for 5762.

BugLink: https://bugs.launchpad.net/bugs/1791080

[ Upstream commit 3a498606 ]

This patch has fix for TX timeout while running bi-directional
traffic with 100 Mbps using 5762.
Signed-off-by: default avatarSanjeev Bansal <sanjeevb.bansal@broadcom.com>
Signed-off-by: default avatarSiva Reddy Kallam <siva.kallam@broadcom.com>
Reviewed-by: default avatarMichael Chan <michael.chan@broadcom.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: default avatarStefan Bader <stefan.bader@canonical.com>
Signed-off-by: default avatarKleber Sacilotto de Souza <kleber.souza@canonical.com>
parent fe06a807
......@@ -9279,6 +9279,15 @@ static int tg3_chip_reset(struct tg3 *tp)
tg3_restore_clk(tp);
/* Increase the core clock speed to fix tx timeout issue for 5762
* with 100Mbps link speed.
*/
if (tg3_asic_rev(tp) == ASIC_REV_5762) {
val = tr32(TG3_CPMU_CLCK_ORIDE_ENABLE);
tw32(TG3_CPMU_CLCK_ORIDE_ENABLE, val |
TG3_CPMU_MAC_ORIDE_ENABLE);
}
/* Reprobe ASF enable state. */
tg3_flag_clear(tp, ENABLE_ASF);
tp->phy_flags &= ~(TG3_PHYFLG_1G_ON_VAUX_OK |
......
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