Merge tag 'devicetree-fixes-for-6.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

Pull devicetree fixes from Rob Herring:

 - Add Conor Dooley as a DT binding maintainer

 - Swap the order of parsing /memreserve/ and /reserved-memory nodes so
   that the /reserved-memory nodes which have more information are
   handled first

 - Fix some property dependencies in riscv,pmu binding

 - Update maintainers entries on a couple of bindings

* tag 'devicetree-fixes-for-6.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux:
  MAINTAINERS: add Conor as a dt-bindings maintainer
  dt-bindings: perf: riscv,pmu: fix property dependencies
  dt-bindings: xilinx: Remove Naga from memory and mtd bindings
  of: fdt: Scan /memreserve/ last
  dt-bindings: clock: r9a06g032-sysctrl: Change maintainer to Fabrizio Castro
  dt-bindings: pinctrl: renesas,rzv2m: Change maintainer to Fabrizio Castro
  dt-bindings: pinctrl: renesas,rzn1: Change maintainer to Fabrizio Castro
  dt-bindings: i2c: renesas,rzv2m: Change maintainer to Fabrizio Castro

Documentation/devicetree/bindings/clock/renesas,r9a06g032-sysctrl.yaml

@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
 title: Renesas RZ/N1D (R9A06G032) System Controller
 
 maintainers:
-  - Gareth Williams <gareth.williams.jx@renesas.com>
+  - Fabrizio Castro <fabrizio.castro.jz@renesas.com>
   - Geert Uytterhoeven <geert+renesas@glider.be>
 
 properties:

Documentation/devicetree/bindings/i2c/renesas,rzv2m.yaml

@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
 title: Renesas RZ/V2M I2C Bus Interface
 
 maintainers:
-  - Phil Edworthy <phil.edworthy@renesas.com>
+  - Fabrizio Castro <fabrizio.castro.jz@renesas.com>
 
 allOf:
   - $ref: /schemas/i2c/i2c-controller.yaml#

Documentation/devicetree/bindings/memory-controllers/arm,pl35x-smc.yaml

@@ -8,7 +8,6 @@ title: Arm PL35x Series Static Memory Controller (SMC)
 
 maintainers:
   - Miquel Raynal <miquel.raynal@bootlin.com>
-  - Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com>
 
 description: |
   The PL35x Static Memory Controller is a bus where you can connect two kinds

Documentation/devicetree/bindings/mtd/arasan,nand-controller.yaml

@@ -10,7 +10,7 @@ allOf:
   - $ref: nand-controller.yaml
 
 maintainers:
-  - Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com>
+  - Michal Simek <michal.simek@amd.com>
 
 properties:
   compatible:

Documentation/devicetree/bindings/mtd/arm,pl353-nand-r2p1.yaml

@@ -11,7 +11,6 @@ allOf:
 
 maintainers:
   - Miquel Raynal <miquel.raynal@bootlin.com>
-  - Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com>
 
 properties:
   compatible:

Documentation/devicetree/bindings/perf/riscv,pmu.yaml

@@ -91,7 +91,6 @@ properties:
 
 dependencies:
   "riscv,event-to-mhpmevent": [ "riscv,event-to-mhpmcounters" ]
-  "riscv,event-to-mhpmcounters": [ "riscv,event-to-mhpmevent" ]
 
 required:
   - compatible

Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.yaml

@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
 title: Renesas RZ/N1 Pin Controller
 
 maintainers:
-  - Gareth Williams <gareth.williams.jx@renesas.com>
+  - Fabrizio Castro <fabrizio.castro.jz@renesas.com>
   - Geert Uytterhoeven <geert+renesas@glider.be>
 
 properties:

Documentation/devicetree/bindings/pinctrl/renesas,rzv2m-pinctrl.yaml

@@ -7,8 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
 title: Renesas RZ/V2M combined Pin and GPIO controller
 
 maintainers:
+  - Fabrizio Castro <fabrizio.castro.jz@renesas.com>
   - Geert Uytterhoeven <geert+renesas@glider.be>
-  - Phil Edworthy <phil.edworthy@renesas.com>
 
 description:
   The Renesas RZ/V2M SoC features a combined Pin and GPIO controller.

MAINTAINERS

@@ -15703,6 +15703,7 @@ K:	of_overlay_remove
 OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS
 M:	Rob Herring <robh+dt@kernel.org>
 M:	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
+M:	Conor Dooley <conor+dt@kernel.org>
 L:	devicetree@vger.kernel.org
 S:	Maintained
 C:	irc://irc.libera.chat/devicetree

drivers/of/fdt.c

@@ -635,6 +635,9 @@ void __init early_init_fdt_scan_reserved_mem(void)
 	if (!initial_boot_params)
 		return;
 
+	fdt_scan_reserved_mem();
+	fdt_reserve_elfcorehdr();
+
 	/* Process header /memreserve/ fields */
 	for (n = 0; ; n++) {
 		fdt_get_mem_rsv(initial_boot_params, n, &base, &size);
@@ -643,8 +646,6 @@ void __init early_init_fdt_scan_reserved_mem(void)
 		memblock_reserve(base, size);
 	}
 
-	fdt_scan_reserved_mem();
-	fdt_reserve_elfcorehdr();
 	fdt_init_reserved_mem();
 }