wifi: ath12k: subscribe required word mask from rx tlv
Most of the RX descriptors fields are currently not used in the ath12k driver. Hence add support to selectively subscribe to the required quad words (64 bits) within msdu_end and mpdu_start of rx_desc. Add compact rx_desc structures and configure the bit mask for Rx TLVs (msdu_end, mpdu_start, mpdu_end) via registers. With these registers SW can configure to DMA the partial TLV struct to Rx buffer. Each TLV type has its own register to configure the mask value. The mask value configured in register will indicate if a particular QWORD has to be written to rx buffer or not i.e., if Nth bit is enabled in the mask Nth QWORD will be written and it will not be written if the bit is disabled in mask. While 0th bit indicates whether TLV tag will be written or not. Advantages of Qword subscription of TLVs - Avoid multiple cache-line misses as the all the required fields of the TLV are within 128 bytes. - Memory optimization as TLVs + DATA + SHINFO can fit in 2k buffer even for 64 bit kernel. Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.1.1-00188-QCAHKSWPL_SILICONZ-1 Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.0.1-00029-QCAHKSWPL_SILICONZ-1 Tested-on: WCN7850 hw2.0 PCI WLAN.HMT.1.0.c5-00481-QCAHMTSWPL_V1.0_V2.0_SILICONZ-3 Signed-off-by:Karthikeyan Kathirvel <quic_kathirve@quicinc.com> Co-developed-by:
Raj Kumar Bhagat <quic_rajkbhag@quicinc.com> Signed-off-by:
Raj Kumar Bhagat <quic_rajkbhag@quicinc.com> Acked-by:
Jeff Johnson <quic_jjohnson@quicinc.com> Signed-off-by:
Kalle Valo <quic_kvalo@quicinc.com> Link: https://msgid.link/20240129065724.2310207-10-quic_rajkbhag@quicinc.com
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