Commit 41efc76e authored by Ulf Hansson's avatar Ulf Hansson

mmc: dt: Document binding for eMMC DDR 3.3V I/O voltage support

Cc: <devicetree@vger.kernel.org>
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
Reviewed-by: default avatarShawn Lin <shawn.lin@rock-chips.com>
Tested-by: default avatarJan Glauber <jglauber@cavium.com>
Tested-by: default avatarStefan Wahren <stefan.wahren@i2se.com>
Acked-by: default avatarRob Herring <robh@kernel.org>
parent 20f921bb
...@@ -40,6 +40,7 @@ Optional properties: ...@@ -40,6 +40,7 @@ Optional properties:
- cap-mmc-hw-reset: eMMC hardware reset is supported - cap-mmc-hw-reset: eMMC hardware reset is supported
- cap-sdio-irq: enable SDIO IRQ signalling on this interface - cap-sdio-irq: enable SDIO IRQ signalling on this interface
- full-pwr-cycle: full power cycle of the card is supported - full-pwr-cycle: full power cycle of the card is supported
- mmc-ddr-3_3v: eMMC high-speed DDR mode(3.3V I/O) is supported
- mmc-ddr-1_8v: eMMC high-speed DDR mode(1.8V I/O) is supported - mmc-ddr-1_8v: eMMC high-speed DDR mode(1.8V I/O) is supported
- mmc-ddr-1_2v: eMMC high-speed DDR mode(1.2V I/O) is supported - mmc-ddr-1_2v: eMMC high-speed DDR mode(1.2V I/O) is supported
- mmc-hs200-1_8v: eMMC HS200 mode(1.8V I/O) is supported - mmc-hs200-1_8v: eMMC HS200 mode(1.8V I/O) is supported
......
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