Commit 426b4c4f authored by Charlene Liu's avatar Charlene Liu Committed by Alex Deucher

drm/amd/display: clean up some formats and log

[why]
reduce az indirect register dump. need add az clock_gating control field
used in some project.

[how]
conditional output indrect register in the log.  add clock_gating feild
Reviewed-by: default avatarSung joon Kim <Sungjoon.Kim@amd.com>
Acked-by: default avatarAnson Jacob <Anson.Jacob@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarCharlene Liu <Charlene.Liu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent b57d16bd
...@@ -302,7 +302,7 @@ enum dc_detect_reason { ...@@ -302,7 +302,7 @@ enum dc_detect_reason {
DETECT_REASON_HPD, DETECT_REASON_HPD,
DETECT_REASON_HPDRX, DETECT_REASON_HPDRX,
DETECT_REASON_FALLBACK, DETECT_REASON_FALLBACK,
DETECT_REASON_RETRAIN DETECT_REASON_RETRAIN,
}; };
bool dc_link_detect(struct dc_link *dc_link, enum dc_detect_reason reason); bool dc_link_detect(struct dc_link *dc_link, enum dc_detect_reason reason);
......
...@@ -67,9 +67,6 @@ static void write_indirect_azalia_reg(struct audio *audio, ...@@ -67,9 +67,6 @@ static void write_indirect_azalia_reg(struct audio *audio,
/* AZALIA_F0_CODEC_ENDPOINT_DATA endpoint data */ /* AZALIA_F0_CODEC_ENDPOINT_DATA endpoint data */
REG_SET(AZALIA_F0_CODEC_ENDPOINT_DATA, 0, REG_SET(AZALIA_F0_CODEC_ENDPOINT_DATA, 0,
AZALIA_ENDPOINT_REG_DATA, reg_data); AZALIA_ENDPOINT_REG_DATA, reg_data);
DC_LOG_HW_AUDIO("AUDIO:write_indirect_azalia_reg: index: %u data: %u\n",
reg_index, reg_data);
} }
static uint32_t read_indirect_azalia_reg(struct audio *audio, uint32_t reg_index) static uint32_t read_indirect_azalia_reg(struct audio *audio, uint32_t reg_index)
...@@ -85,9 +82,6 @@ static uint32_t read_indirect_azalia_reg(struct audio *audio, uint32_t reg_index ...@@ -85,9 +82,6 @@ static uint32_t read_indirect_azalia_reg(struct audio *audio, uint32_t reg_index
/* AZALIA_F0_CODEC_ENDPOINT_DATA endpoint data */ /* AZALIA_F0_CODEC_ENDPOINT_DATA endpoint data */
value = REG_READ(AZALIA_F0_CODEC_ENDPOINT_DATA); value = REG_READ(AZALIA_F0_CODEC_ENDPOINT_DATA);
DC_LOG_HW_AUDIO("AUDIO:read_indirect_azalia_reg: index: %u data: %u\n",
reg_index, value);
return value; return value;
} }
......
...@@ -113,6 +113,7 @@ struct dce_audio_shift { ...@@ -113,6 +113,7 @@ struct dce_audio_shift {
uint8_t DCCG_AUDIO_DTO2_USE_512FBR_DTO; uint8_t DCCG_AUDIO_DTO2_USE_512FBR_DTO;
uint32_t DCCG_AUDIO_DTO0_USE_512FBR_DTO; uint32_t DCCG_AUDIO_DTO0_USE_512FBR_DTO;
uint32_t DCCG_AUDIO_DTO1_USE_512FBR_DTO; uint32_t DCCG_AUDIO_DTO1_USE_512FBR_DTO;
uint32_t CLOCK_GATING_DISABLE;
}; };
struct dce_audio_mask { struct dce_audio_mask {
...@@ -132,6 +133,7 @@ struct dce_audio_mask { ...@@ -132,6 +133,7 @@ struct dce_audio_mask {
uint32_t DCCG_AUDIO_DTO2_USE_512FBR_DTO; uint32_t DCCG_AUDIO_DTO2_USE_512FBR_DTO;
uint32_t DCCG_AUDIO_DTO0_USE_512FBR_DTO; uint32_t DCCG_AUDIO_DTO0_USE_512FBR_DTO;
uint32_t DCCG_AUDIO_DTO1_USE_512FBR_DTO; uint32_t DCCG_AUDIO_DTO1_USE_512FBR_DTO;
uint32_t CLOCK_GATING_DISABLE;
}; };
......
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