Commit 435f87d0 authored by Ching-Te Ku's avatar Ching-Te Ku Committed by Kalle Valo

wifi: rtw89: coex: Combine set grant WL/BT and correct the debug log

To reduce register IO, combine set_gnt_wl/set_gnt_bt to set the same
register one time. Because RTL8852C use different register to control
antenna path, so make correction of path control related debug logs.
Signed-off-by: default avatarChing-Te Ku <ku920601@realtek.com>
Signed-off-by: default avatarPing-Ke Shih <pkshih@realtek.com>
Signed-off-by: default avatarKalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20220913092546.43722-8-pkshih@realtek.com
parent c918f5f4
This diff is collapsed.
......@@ -1798,8 +1798,9 @@ struct rtw89_btc_dm {
u32 wl_btg_rx: 1;
u32 trx_para_level: 8;
u32 wl_stb_chg: 1;
u32 pta_owner: 1;
u32 tdma_instant_excute: 1;
u32 rsvd: 2;
u32 rsvd: 1;
u16 slot_dur[CXST_MAX];
......
......@@ -3156,6 +3156,18 @@
#define B_AX_GNT_WL_BB_VAL BIT(1)
#define B_AX_GNT_WL_BB_SWCTRL BIT(0)
#define R_AX_GNT_VAL 0x0054
#define B_AX_GNT_BT_RFC_S1_STA BIT(5)
#define B_AX_GNT_WL_RFC_S1_STA BIT(4)
#define B_AX_GNT_BT_RFC_S0_STA BIT(3)
#define B_AX_GNT_WL_RFC_S0_STA BIT(2)
#define R_AX_GNT_VAL_V1 0xDA4C
#define B_AX_GNT_BT_RFC_S1 BIT(4)
#define B_AX_GNT_BT_RFC_S0 BIT(3)
#define B_AX_GNT_WL_RFC_S1 BIT(2)
#define B_AX_GNT_WL_RFC_S0 BIT(1)
#define R_AX_TDMA_MODE 0xDA4C
#define R_AX_TDMA_MODE_C1 0xFA4C
#define B_AX_R_BT_CMD_RPT_MASK GENMASK(31, 16)
......
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