Commit 435f87d0 authored by Ching-Te Ku's avatar Ching-Te Ku Committed by Kalle Valo

wifi: rtw89: coex: Combine set grant WL/BT and correct the debug log

To reduce register IO, combine set_gnt_wl/set_gnt_bt to set the same
register one time. Because RTL8852C use different register to control
antenna path, so make correction of path control related debug logs.
Signed-off-by: default avatarChing-Te Ku <ku920601@realtek.com>
Signed-off-by: default avatarPing-Ke Shih <pkshih@realtek.com>
Signed-off-by: default avatarKalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20220913092546.43722-8-pkshih@realtek.com
parent c918f5f4
...@@ -491,6 +491,11 @@ enum btc_gnt_state { ...@@ -491,6 +491,11 @@ enum btc_gnt_state {
BTC_GNT_MAX BTC_GNT_MAX
}; };
enum btc_ctr_path {
BTC_CTRL_BY_BT = 0,
BTC_CTRL_BY_WL
};
enum btc_wl_max_tx_time { enum btc_wl_max_tx_time {
BTC_MAX_TX_TIME_L1 = 500, BTC_MAX_TX_TIME_L1 = 500,
BTC_MAX_TX_TIME_L2 = 1000, BTC_MAX_TX_TIME_L2 = 1000,
...@@ -1621,7 +1626,7 @@ void btc_fw_event(struct rtw89_dev *rtwdev, u8 evt_id, void *data, u32 len) ...@@ -1621,7 +1626,7 @@ void btc_fw_event(struct rtw89_dev *rtwdev, u8 evt_id, void *data, u32 len)
} }
} }
static void _set_gnt_wl(struct rtw89_dev *rtwdev, u8 phy_map, u8 state) static void _set_gnt(struct rtw89_dev *rtwdev, u8 phy_map, u8 wl_state, u8 bt_state)
{ {
struct rtw89_btc *btc = &rtwdev->btc; struct rtw89_btc *btc = &rtwdev->btc;
struct rtw89_btc_dm *dm = &btc->dm; struct rtw89_btc_dm *dm = &btc->dm;
...@@ -1635,7 +1640,7 @@ static void _set_gnt_wl(struct rtw89_dev *rtwdev, u8 phy_map, u8 state) ...@@ -1635,7 +1640,7 @@ static void _set_gnt_wl(struct rtw89_dev *rtwdev, u8 phy_map, u8 state)
if (!(phy_map & BIT(i))) if (!(phy_map & BIT(i)))
continue; continue;
switch (state) { switch (wl_state) {
case BTC_GNT_HW: case BTC_GNT_HW:
g[i].gnt_wl_sw_en = 0; g[i].gnt_wl_sw_en = 0;
g[i].gnt_wl = 0; g[i].gnt_wl = 0;
...@@ -1649,6 +1654,21 @@ static void _set_gnt_wl(struct rtw89_dev *rtwdev, u8 phy_map, u8 state) ...@@ -1649,6 +1654,21 @@ static void _set_gnt_wl(struct rtw89_dev *rtwdev, u8 phy_map, u8 state)
g[i].gnt_wl = 1; g[i].gnt_wl = 1;
break; break;
} }
switch (bt_state) {
case BTC_GNT_HW:
g[i].gnt_bt_sw_en = 0;
g[i].gnt_bt = 0;
break;
case BTC_GNT_SW_LO:
g[i].gnt_bt_sw_en = 1;
g[i].gnt_bt = 0;
break;
case BTC_GNT_SW_HI:
g[i].gnt_bt_sw_en = 1;
g[i].gnt_bt = 1;
break;
}
} }
rtw89_chip_mac_cfg_gnt(rtwdev, &dm->gnt); rtw89_chip_mac_cfg_gnt(rtwdev, &dm->gnt);
...@@ -2783,39 +2803,6 @@ void rtw89_btc_set_policy_v1(struct rtw89_dev *rtwdev, u16 policy_type) ...@@ -2783,39 +2803,6 @@ void rtw89_btc_set_policy_v1(struct rtw89_dev *rtwdev, u16 policy_type)
} }
EXPORT_SYMBOL(rtw89_btc_set_policy_v1); EXPORT_SYMBOL(rtw89_btc_set_policy_v1);
static void _set_gnt_bt(struct rtw89_dev *rtwdev, u8 phy_map, u8 state)
{
struct rtw89_btc *btc = &rtwdev->btc;
struct rtw89_btc_dm *dm = &btc->dm;
struct rtw89_mac_ax_gnt *g = dm->gnt.band;
u8 i;
if (phy_map > BTC_PHY_ALL)
return;
for (i = 0; i < RTW89_PHY_MAX; i++) {
if (!(phy_map & BIT(i)))
continue;
switch (state) {
case BTC_GNT_HW:
g[i].gnt_bt_sw_en = 0;
g[i].gnt_bt = 0;
break;
case BTC_GNT_SW_LO:
g[i].gnt_bt_sw_en = 1;
g[i].gnt_bt = 0;
break;
case BTC_GNT_SW_HI:
g[i].gnt_bt_sw_en = 1;
g[i].gnt_bt = 1;
break;
}
}
rtw89_chip_mac_cfg_gnt(rtwdev, &dm->gnt);
}
static void _set_bt_plut(struct rtw89_dev *rtwdev, u8 phy_map, static void _set_bt_plut(struct rtw89_dev *rtwdev, u8 phy_map,
u8 tx_val, u8 rx_val) u8 tx_val, u8 rx_val)
{ {
...@@ -2880,86 +2867,74 @@ static void _set_ant(struct rtw89_dev *rtwdev, bool force_exec, ...@@ -2880,86 +2867,74 @@ static void _set_ant(struct rtw89_dev *rtwdev, bool force_exec,
switch (type) { switch (type) {
case BTC_ANT_WPOWERON: case BTC_ANT_WPOWERON:
rtw89_chip_cfg_ctrl_path(rtwdev, false); rtw89_chip_cfg_ctrl_path(rtwdev, BTC_CTRL_BY_BT);
break; break;
case BTC_ANT_WINIT: case BTC_ANT_WINIT:
if (bt->enable.now) { if (bt->enable.now)
_set_gnt_wl(rtwdev, phy_map, BTC_GNT_SW_LO); _set_gnt(rtwdev, phy_map, BTC_GNT_SW_LO, BTC_GNT_SW_HI);
_set_gnt_bt(rtwdev, phy_map, BTC_GNT_SW_HI); else
} else { _set_gnt(rtwdev, phy_map, BTC_GNT_SW_HI, BTC_GNT_SW_LO);
_set_gnt_wl(rtwdev, phy_map, BTC_GNT_SW_HI);
_set_gnt_bt(rtwdev, phy_map, BTC_GNT_SW_LO); rtw89_chip_cfg_ctrl_path(rtwdev, BTC_CTRL_BY_WL);
}
rtw89_chip_cfg_ctrl_path(rtwdev, true);
_set_bt_plut(rtwdev, BTC_PHY_ALL, BTC_PLT_BT, BTC_PLT_BT); _set_bt_plut(rtwdev, BTC_PHY_ALL, BTC_PLT_BT, BTC_PLT_BT);
break; break;
case BTC_ANT_WONLY: case BTC_ANT_WONLY:
_set_gnt_wl(rtwdev, phy_map, BTC_GNT_SW_HI); _set_gnt(rtwdev, phy_map, BTC_GNT_SW_HI, BTC_GNT_SW_LO);
_set_gnt_bt(rtwdev, phy_map, BTC_GNT_SW_LO); rtw89_chip_cfg_ctrl_path(rtwdev, BTC_CTRL_BY_WL);
rtw89_chip_cfg_ctrl_path(rtwdev, true);
_set_bt_plut(rtwdev, BTC_PHY_ALL, BTC_PLT_NONE, BTC_PLT_NONE); _set_bt_plut(rtwdev, BTC_PHY_ALL, BTC_PLT_NONE, BTC_PLT_NONE);
break; break;
case BTC_ANT_WOFF: case BTC_ANT_WOFF:
rtw89_chip_cfg_ctrl_path(rtwdev, false); rtw89_chip_cfg_ctrl_path(rtwdev, BTC_CTRL_BY_BT);
_set_bt_plut(rtwdev, BTC_PHY_ALL, BTC_PLT_NONE, BTC_PLT_NONE); _set_bt_plut(rtwdev, BTC_PHY_ALL, BTC_PLT_NONE, BTC_PLT_NONE);
break; break;
case BTC_ANT_W2G: case BTC_ANT_W2G:
rtw89_chip_cfg_ctrl_path(rtwdev, true); rtw89_chip_cfg_ctrl_path(rtwdev, BTC_CTRL_BY_WL);
if (rtwdev->dbcc_en) { if (rtwdev->dbcc_en) {
for (i = 0; i < RTW89_PHY_MAX; i++) { for (i = 0; i < RTW89_PHY_MAX; i++) {
b2g = (wl_dinfo->real_band[i] == RTW89_BAND_2G); b2g = (wl_dinfo->real_band[i] == RTW89_BAND_2G);
gnt_wl_ctrl = b2g ? BTC_GNT_HW : BTC_GNT_SW_HI; gnt_wl_ctrl = b2g ? BTC_GNT_HW : BTC_GNT_SW_HI;
_set_gnt_wl(rtwdev, BIT(i), gnt_wl_ctrl);
gnt_bt_ctrl = b2g ? BTC_GNT_HW : BTC_GNT_SW_HI; gnt_bt_ctrl = b2g ? BTC_GNT_HW : BTC_GNT_SW_HI;
/* BT should control by GNT_BT if WL_2G at S0 */ /* BT should control by GNT_BT if WL_2G at S0 */
if (i == 1 && if (i == 1 &&
wl_dinfo->real_band[0] == RTW89_BAND_2G && wl_dinfo->real_band[0] == RTW89_BAND_2G &&
wl_dinfo->real_band[1] == RTW89_BAND_5G) wl_dinfo->real_band[1] == RTW89_BAND_5G)
gnt_bt_ctrl = BTC_GNT_HW; gnt_bt_ctrl = BTC_GNT_HW;
_set_gnt_bt(rtwdev, BIT(i), gnt_bt_ctrl); _set_gnt(rtwdev, BIT(i), gnt_wl_ctrl, gnt_bt_ctrl);
plt_ctrl = b2g ? BTC_PLT_BT : BTC_PLT_NONE; plt_ctrl = b2g ? BTC_PLT_BT : BTC_PLT_NONE;
_set_bt_plut(rtwdev, BIT(i), _set_bt_plut(rtwdev, BIT(i),
plt_ctrl, plt_ctrl); plt_ctrl, plt_ctrl);
} }
} else { } else {
_set_gnt_wl(rtwdev, phy_map, BTC_GNT_HW); _set_gnt(rtwdev, phy_map, BTC_GNT_HW, BTC_GNT_HW);
_set_gnt_bt(rtwdev, phy_map, BTC_GNT_HW);
_set_bt_plut(rtwdev, BTC_PHY_ALL, _set_bt_plut(rtwdev, BTC_PHY_ALL,
BTC_PLT_BT, BTC_PLT_BT); BTC_PLT_BT, BTC_PLT_BT);
} }
break; break;
case BTC_ANT_W5G: case BTC_ANT_W5G:
rtw89_chip_cfg_ctrl_path(rtwdev, true); rtw89_chip_cfg_ctrl_path(rtwdev, BTC_CTRL_BY_WL);
_set_gnt_wl(rtwdev, phy_map, BTC_GNT_SW_HI); _set_gnt(rtwdev, phy_map, BTC_GNT_SW_HI, BTC_GNT_HW);
_set_gnt_bt(rtwdev, phy_map, BTC_GNT_HW);
_set_bt_plut(rtwdev, BTC_PHY_ALL, BTC_PLT_NONE, BTC_PLT_NONE); _set_bt_plut(rtwdev, BTC_PHY_ALL, BTC_PLT_NONE, BTC_PLT_NONE);
break; break;
case BTC_ANT_W25G: case BTC_ANT_W25G:
rtw89_chip_cfg_ctrl_path(rtwdev, true); rtw89_chip_cfg_ctrl_path(rtwdev, BTC_CTRL_BY_WL);
_set_gnt_wl(rtwdev, phy_map, BTC_GNT_HW); _set_gnt(rtwdev, phy_map, BTC_GNT_HW, BTC_GNT_HW);
_set_gnt_bt(rtwdev, phy_map, BTC_GNT_HW);
_set_bt_plut(rtwdev, BTC_PHY_ALL, _set_bt_plut(rtwdev, BTC_PHY_ALL,
BTC_PLT_GNT_WL, BTC_PLT_GNT_WL); BTC_PLT_GNT_WL, BTC_PLT_GNT_WL);
break; break;
case BTC_ANT_FREERUN: case BTC_ANT_FREERUN:
rtw89_chip_cfg_ctrl_path(rtwdev, true); rtw89_chip_cfg_ctrl_path(rtwdev, BTC_CTRL_BY_WL);
_set_gnt_wl(rtwdev, phy_map, BTC_GNT_SW_HI); _set_gnt(rtwdev, phy_map, BTC_GNT_SW_HI, BTC_GNT_SW_HI);
_set_gnt_bt(rtwdev, phy_map, BTC_GNT_SW_HI);
_set_bt_plut(rtwdev, BTC_PHY_ALL, BTC_PLT_NONE, BTC_PLT_NONE); _set_bt_plut(rtwdev, BTC_PHY_ALL, BTC_PLT_NONE, BTC_PLT_NONE);
break; break;
case BTC_ANT_WRFK: case BTC_ANT_WRFK:
rtw89_chip_cfg_ctrl_path(rtwdev, true); rtw89_chip_cfg_ctrl_path(rtwdev, BTC_CTRL_BY_WL);
_set_gnt_wl(rtwdev, phy_map, BTC_GNT_SW_HI); _set_gnt(rtwdev, phy_map, BTC_GNT_SW_HI, BTC_GNT_SW_LO);
_set_gnt_bt(rtwdev, phy_map, BTC_GNT_SW_LO);
_set_bt_plut(rtwdev, phy_map, BTC_PLT_NONE, BTC_PLT_NONE); _set_bt_plut(rtwdev, phy_map, BTC_PLT_NONE, BTC_PLT_NONE);
break; break;
case BTC_ANT_BRFK: case BTC_ANT_BRFK:
rtw89_chip_cfg_ctrl_path(rtwdev, false); rtw89_chip_cfg_ctrl_path(rtwdev, BTC_CTRL_BY_BT);
_set_gnt_wl(rtwdev, phy_map, BTC_GNT_SW_LO); _set_gnt(rtwdev, phy_map, BTC_GNT_SW_LO, BTC_GNT_SW_HI);
_set_gnt_bt(rtwdev, phy_map, BTC_GNT_SW_HI);
_set_bt_plut(rtwdev, phy_map, BTC_PLT_NONE, BTC_PLT_NONE); _set_bt_plut(rtwdev, phy_map, BTC_PLT_NONE, BTC_PLT_NONE);
break; break;
default: default:
...@@ -4636,7 +4611,7 @@ void rtw89_btc_ntfy_init(struct rtw89_dev *rtwdev, u8 mode) ...@@ -4636,7 +4611,7 @@ void rtw89_btc_ntfy_init(struct rtw89_dev *rtwdev, u8 mode)
_write_scbd(rtwdev, _write_scbd(rtwdev,
BTC_WSCB_ACTIVE | BTC_WSCB_ON | BTC_WSCB_BTLOG, true); BTC_WSCB_ACTIVE | BTC_WSCB_ON | BTC_WSCB_BTLOG, true);
_update_bt_scbd(rtwdev, true); _update_bt_scbd(rtwdev, true);
if (rtw89_mac_get_ctrl_path(rtwdev)) { if (rtw89_mac_get_ctrl_path(rtwdev) && chip->chip_id == RTL8852A) {
rtw89_debug(rtwdev, RTW89_DBG_BTC, rtw89_debug(rtwdev, RTW89_DBG_BTC,
"[BTC], %s(): PTA owner warning!!\n", "[BTC], %s(): PTA owner warning!!\n",
__func__); __func__);
...@@ -6391,6 +6366,47 @@ static void _show_fw_dm_msg(struct rtw89_dev *rtwdev, struct seq_file *m) ...@@ -6391,6 +6366,47 @@ static void _show_fw_dm_msg(struct rtw89_dev *rtwdev, struct seq_file *m)
_show_fbtc_step(rtwdev, m); _show_fbtc_step(rtwdev, m);
} }
static void _get_gnt(struct rtw89_dev *rtwdev, struct rtw89_mac_ax_coex_gnt *gnt_cfg)
{
const struct rtw89_chip_info *chip = rtwdev->chip;
struct rtw89_mac_ax_gnt *gnt;
u32 val, status;
if (chip->chip_id == RTL8852A || chip->chip_id == RTL8852B) {
rtw89_mac_read_lte(rtwdev, R_AX_LTE_SW_CFG_1, &val);
rtw89_mac_read_lte(rtwdev, R_AX_GNT_VAL, &status);
gnt = &gnt_cfg->band[0];
gnt->gnt_bt_sw_en = !!(val & B_AX_GNT_BT_RFC_S0_SW_CTRL);
gnt->gnt_bt = !!(status & B_AX_GNT_BT_RFC_S0_STA);
gnt->gnt_wl_sw_en = !!(val & B_AX_GNT_WL_RFC_S0_SW_CTRL);
gnt->gnt_wl = !!(status & B_AX_GNT_WL_RFC_S0_STA);
gnt = &gnt_cfg->band[1];
gnt->gnt_bt_sw_en = !!(val & B_AX_GNT_BT_RFC_S1_SW_CTRL);
gnt->gnt_bt = !!(status & B_AX_GNT_BT_RFC_S1_STA);
gnt->gnt_wl_sw_en = !!(val & B_AX_GNT_WL_RFC_S1_SW_CTRL);
gnt->gnt_wl = !!(status & B_AX_GNT_WL_RFC_S1_STA);
} else if (chip->chip_id == RTL8852C) {
val = rtw89_read32(rtwdev, R_AX_GNT_SW_CTRL);
status = rtw89_read32(rtwdev, R_AX_GNT_VAL_V1);
gnt = &gnt_cfg->band[0];
gnt->gnt_bt_sw_en = !!(val & B_AX_GNT_BT_RFC_S0_SWCTRL);
gnt->gnt_bt = !!(status & B_AX_GNT_BT_RFC_S0);
gnt->gnt_wl_sw_en = !!(val & B_AX_GNT_WL_RFC_S0_SWCTRL);
gnt->gnt_wl = !!(status & B_AX_GNT_WL_RFC_S0);
gnt = &gnt_cfg->band[1];
gnt->gnt_bt_sw_en = !!(val & B_AX_GNT_BT_RFC_S1_SWCTRL);
gnt->gnt_bt = !!(status & B_AX_GNT_BT_RFC_S1);
gnt->gnt_wl_sw_en = !!(val & B_AX_GNT_WL_RFC_S1_SWCTRL);
gnt->gnt_wl = !!(status & B_AX_GNT_WL_RFC_S1);
} else {
return;
}
}
static void _show_mreg(struct rtw89_dev *rtwdev, struct seq_file *m) static void _show_mreg(struct rtw89_dev *rtwdev, struct seq_file *m)
{ {
const struct rtw89_chip_info *chip = rtwdev->chip; const struct rtw89_chip_info *chip = rtwdev->chip;
...@@ -6402,7 +6418,8 @@ static void _show_mreg(struct rtw89_dev *rtwdev, struct seq_file *m) ...@@ -6402,7 +6418,8 @@ static void _show_mreg(struct rtw89_dev *rtwdev, struct seq_file *m)
struct rtw89_btc_cx *cx = &btc->cx; struct rtw89_btc_cx *cx = &btc->cx;
struct rtw89_btc_wl_info *wl = &btc->cx.wl; struct rtw89_btc_wl_info *wl = &btc->cx.wl;
struct rtw89_btc_bt_info *bt = &btc->cx.bt; struct rtw89_btc_bt_info *bt = &btc->cx.bt;
struct rtw89_mac_ax_gnt gnt[2] = {0}; struct rtw89_mac_ax_coex_gnt gnt_cfg = {};
struct rtw89_mac_ax_gnt gnt;
u8 i = 0, type = 0, cnt = 0; u8 i = 0, type = 0, cnt = 0;
u32 val, offset; u32 val, offset;
...@@ -6419,45 +6436,28 @@ static void _show_mreg(struct rtw89_dev *rtwdev, struct seq_file *m) ...@@ -6419,45 +6436,28 @@ static void _show_mreg(struct rtw89_dev *rtwdev, struct seq_file *m)
/* To avoid I/O if WL LPS or power-off */ /* To avoid I/O if WL LPS or power-off */
if (!wl->status.map.lps && !wl->status.map.rf_off) { if (!wl->status.map.lps && !wl->status.map.rf_off) {
rtw89_mac_read_lte(rtwdev, R_AX_LTE_SW_CFG_1, &val); if (chip->chip_id == RTL8852A)
if (val & (B_AX_GNT_BT_RFC_S0_SW_VAL | btc->dm.pta_owner = rtw89_mac_get_ctrl_path(rtwdev);
B_AX_GNT_BT_BB_S0_SW_VAL)) else if (chip->chip_id == RTL8852C)
gnt[0].gnt_bt = true; btc->dm.pta_owner = 0;
if (val & (B_AX_GNT_BT_RFC_S0_SW_CTRL |
B_AX_GNT_BT_BB_S0_SW_CTRL))
gnt[0].gnt_bt_sw_en = true;
if (val & (B_AX_GNT_WL_RFC_S0_SW_VAL |
B_AX_GNT_WL_BB_S0_SW_VAL))
gnt[0].gnt_wl = true;
if (val & (B_AX_GNT_WL_RFC_S0_SW_CTRL |
B_AX_GNT_WL_BB_S0_SW_CTRL))
gnt[0].gnt_wl_sw_en = true;
if (val & (B_AX_GNT_BT_RFC_S1_SW_VAL |
B_AX_GNT_BT_BB_S1_SW_VAL))
gnt[1].gnt_bt = true;
if (val & (B_AX_GNT_BT_RFC_S1_SW_CTRL |
B_AX_GNT_BT_BB_S1_SW_CTRL))
gnt[1].gnt_bt_sw_en = true;
if (val & (B_AX_GNT_WL_RFC_S1_SW_VAL |
B_AX_GNT_WL_BB_S1_SW_VAL))
gnt[1].gnt_wl = true;
if (val & (B_AX_GNT_WL_RFC_S1_SW_CTRL |
B_AX_GNT_WL_BB_S1_SW_CTRL))
gnt[1].gnt_wl_sw_en = true;
_get_gnt(rtwdev, &gnt_cfg);
gnt = gnt_cfg.band[0];
seq_printf(m, seq_printf(m,
" %-15s : pta_owner:%s, phy-0[gnt_wl:%s-%d/gnt_bt:%s-%d], ", " %-15s : pta_owner:%s, phy-0[gnt_wl:%s-%d/gnt_bt:%s-%d], ",
"[gnt_status]", "[gnt_status]",
(rtw89_mac_get_ctrl_path(rtwdev) ? "WL" : "BT"), chip->chip_id == RTL8852C ? "HW" :
(gnt[0].gnt_wl_sw_en ? "SW" : "HW"), gnt[0].gnt_wl, btc->dm.pta_owner == BTC_CTRL_BY_WL ? "WL" : "BT",
(gnt[0].gnt_bt_sw_en ? "SW" : "HW"), gnt[0].gnt_bt); gnt.gnt_wl_sw_en ? "SW" : "HW", gnt.gnt_wl,
gnt.gnt_bt_sw_en ? "SW" : "HW", gnt.gnt_bt);
gnt = gnt_cfg.band[1];
seq_printf(m, "phy-1[gnt_wl:%s-%d/gnt_bt:%s-%d]\n", seq_printf(m, "phy-1[gnt_wl:%s-%d/gnt_bt:%s-%d]\n",
(gnt[1].gnt_wl_sw_en ? "SW" : "HW"), gnt[1].gnt_wl, gnt.gnt_wl_sw_en ? "SW" : "HW",
(gnt[1].gnt_bt_sw_en ? "SW" : "HW"), gnt[1].gnt_bt); gnt.gnt_wl,
gnt.gnt_bt_sw_en ? "SW" : "HW",
gnt.gnt_bt);
} }
pcinfo = &pfwinfo->rpt_fbtc_mregval.cinfo; pcinfo = &pfwinfo->rpt_fbtc_mregval.cinfo;
if (!pcinfo->valid) { if (!pcinfo->valid) {
rtw89_debug(rtwdev, RTW89_DBG_BTC, rtw89_debug(rtwdev, RTW89_DBG_BTC,
......
...@@ -1798,8 +1798,9 @@ struct rtw89_btc_dm { ...@@ -1798,8 +1798,9 @@ struct rtw89_btc_dm {
u32 wl_btg_rx: 1; u32 wl_btg_rx: 1;
u32 trx_para_level: 8; u32 trx_para_level: 8;
u32 wl_stb_chg: 1; u32 wl_stb_chg: 1;
u32 pta_owner: 1;
u32 tdma_instant_excute: 1; u32 tdma_instant_excute: 1;
u32 rsvd: 2; u32 rsvd: 1;
u16 slot_dur[CXST_MAX]; u16 slot_dur[CXST_MAX];
......
...@@ -3156,6 +3156,18 @@ ...@@ -3156,6 +3156,18 @@
#define B_AX_GNT_WL_BB_VAL BIT(1) #define B_AX_GNT_WL_BB_VAL BIT(1)
#define B_AX_GNT_WL_BB_SWCTRL BIT(0) #define B_AX_GNT_WL_BB_SWCTRL BIT(0)
#define R_AX_GNT_VAL 0x0054
#define B_AX_GNT_BT_RFC_S1_STA BIT(5)
#define B_AX_GNT_WL_RFC_S1_STA BIT(4)
#define B_AX_GNT_BT_RFC_S0_STA BIT(3)
#define B_AX_GNT_WL_RFC_S0_STA BIT(2)
#define R_AX_GNT_VAL_V1 0xDA4C
#define B_AX_GNT_BT_RFC_S1 BIT(4)
#define B_AX_GNT_BT_RFC_S0 BIT(3)
#define B_AX_GNT_WL_RFC_S1 BIT(2)
#define B_AX_GNT_WL_RFC_S0 BIT(1)
#define R_AX_TDMA_MODE 0xDA4C #define R_AX_TDMA_MODE 0xDA4C
#define R_AX_TDMA_MODE_C1 0xFA4C #define R_AX_TDMA_MODE_C1 0xFA4C
#define B_AX_R_BT_CMD_RPT_MASK GENMASK(31, 16) #define B_AX_R_BT_CMD_RPT_MASK GENMASK(31, 16)
......
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