Commit 4453d51e authored by Swati Agarwal's avatar Swati Agarwal Committed by Ulf Hansson

mmc: sdhci-of-arasan: Add support to request the "gate" clock

Add support to read the optional "gate" clock property and request the
clock which will be used to ungate the DLL clock.

For Xilinx platforms which has DLL module, dll clock must be
ungated/enabled when SD controller operates at higher frequencies like 50
MHz, 100 MHz and 200 MHz. This will be done by explicitly requesting gate
clock from the driver.
Signed-off-by: default avatarSwati Agarwal <swati.agarwal@amd.com>
Acked-by: default avatarMichal Simek <michal.simek@amd.com>
Acked-by: default avatarAdrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20230223141402.23979-1-swati.agarwal@amd.comSigned-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent e8d018dd
......@@ -1630,6 +1630,7 @@ static int sdhci_arasan_probe(struct platform_device *pdev)
int ret;
struct device_node *node;
struct clk *clk_xin;
struct clk *clk_dll;
struct sdhci_host *host;
struct sdhci_pltfm_host *pltfm_host;
struct device *dev = &pdev->dev;
......@@ -1703,6 +1704,12 @@ static int sdhci_arasan_probe(struct platform_device *pdev)
goto clk_dis_ahb;
}
clk_dll = devm_clk_get_optional_enabled(dev, "gate");
if (IS_ERR(clk_dll)) {
ret = dev_err_probe(dev, PTR_ERR(clk_dll), "failed to get dll clk\n");
goto clk_disable_all;
}
if (of_property_read_bool(np, "xlnx,fails-without-test-cd"))
sdhci_arasan->quirks |= SDHCI_ARASAN_QUIRK_FORCE_CDTEST;
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment