Commit 44cc24b0 authored by David S. Miller's avatar David S. Miller

Merge tag 'wireless-drivers-next-2021-10-07' of...

Merge tag 'wireless-drivers-next-2021-10-07' of git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/wireless-drivers-next

Kalle Valo says:

====================
wireless-drivers-next patches for v5.16

First set of patches for v5.16. ath11k getting most of new features
this time. Other drivers also have few new features, and of course the
usual set of fixes and cleanups all over.

Major changes:

rtw88

* support adaptivity for ETSI/JP DFS region

* 8821c: support RFE type4 wifi NIC

brcmfmac

* DMI nvram filename quirk for Cyberbook T116 tablet

ath9k

* load calibration data and pci init values via nvmem subsystem

ath11k

* include channel rx and tx time in survey dump statistics

* support for setting fixed Wi-Fi 6 rates from user space

* support for 80P80 and 160 MHz bandwidths

* spectral scan support for QCN9074

* support for calibration data files per radio

* support for calibration data via eeprom

* support for rx decapsulation offload (data frames in 802.3 format)

* support channel 2 in 6 GHz band

ath10k

* include frame time stamp in beacon and probe response frames

wcn36xx

* enable Idle Mode Power Save (IMPS) to reduce power consumption during idle
====================
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 5a98dcf5 b3fcf9c5
...@@ -20,7 +20,7 @@ MODULE_DESCRIPTION("Broadcom's specific AMBA driver"); ...@@ -20,7 +20,7 @@ MODULE_DESCRIPTION("Broadcom's specific AMBA driver");
MODULE_LICENSE("GPL"); MODULE_LICENSE("GPL");
/* contains the number the next bus should get. */ /* contains the number the next bus should get. */
static unsigned int bcma_bus_next_num = 0; static unsigned int bcma_bus_next_num;
/* bcma_buses_mutex locks the bcma_bus_next_num */ /* bcma_buses_mutex locks the bcma_bus_next_num */
static DEFINE_MUTEX(bcma_buses_mutex); static DEFINE_MUTEX(bcma_buses_mutex);
......
...@@ -1772,9 +1772,8 @@ static const struct usb_device_id ar5523_id_table[] = { ...@@ -1772,9 +1772,8 @@ static const struct usb_device_id ar5523_id_table[] = {
AR5523_DEVICE_UG(0x0846, 0x5f00), /* Netgear / WPN111 */ AR5523_DEVICE_UG(0x0846, 0x5f00), /* Netgear / WPN111 */
AR5523_DEVICE_UG(0x083a, 0x4506), /* SMC / EZ Connect AR5523_DEVICE_UG(0x083a, 0x4506), /* SMC / EZ Connect
SMCWUSBT-G2 */ SMCWUSBT-G2 */
AR5523_DEVICE_UG(0x157e, 0x3006), /* Umedia / AR5523_1 */ AR5523_DEVICE_UG(0x157e, 0x3006), /* Umedia / AR5523_1, TEW444UBEU*/
AR5523_DEVICE_UX(0x157e, 0x3205), /* Umedia / AR5523_2 */ AR5523_DEVICE_UX(0x157e, 0x3205), /* Umedia / AR5523_2 */
AR5523_DEVICE_UG(0x157e, 0x3006), /* Umedia / TEW444UBEU */
AR5523_DEVICE_UG(0x1435, 0x0826), /* Wistronneweb / AR5523_1 */ AR5523_DEVICE_UG(0x1435, 0x0826), /* Wistronneweb / AR5523_1 */
AR5523_DEVICE_UX(0x1435, 0x0828), /* Wistronneweb / AR5523_2 */ AR5523_DEVICE_UX(0x1435, 0x0828), /* Wistronneweb / AR5523_2 */
AR5523_DEVICE_UG(0x0cde, 0x0012), /* Zcom / AR5523 */ AR5523_DEVICE_UG(0x0cde, 0x0012), /* Zcom / AR5523 */
......
...@@ -993,8 +993,12 @@ static void ath10k_mac_vif_beacon_cleanup(struct ath10k_vif *arvif) ...@@ -993,8 +993,12 @@ static void ath10k_mac_vif_beacon_cleanup(struct ath10k_vif *arvif)
ath10k_mac_vif_beacon_free(arvif); ath10k_mac_vif_beacon_free(arvif);
if (arvif->beacon_buf) { if (arvif->beacon_buf) {
dma_free_coherent(ar->dev, IEEE80211_MAX_FRAME_LEN, if (ar->bus_param.dev_type == ATH10K_DEV_TYPE_HL)
arvif->beacon_buf, arvif->beacon_paddr); kfree(arvif->beacon_buf);
else
dma_free_coherent(ar->dev, IEEE80211_MAX_FRAME_LEN,
arvif->beacon_buf,
arvif->beacon_paddr);
arvif->beacon_buf = NULL; arvif->beacon_buf = NULL;
} }
} }
...@@ -5576,10 +5580,17 @@ static int ath10k_add_interface(struct ieee80211_hw *hw, ...@@ -5576,10 +5580,17 @@ static int ath10k_add_interface(struct ieee80211_hw *hw,
if (vif->type == NL80211_IFTYPE_ADHOC || if (vif->type == NL80211_IFTYPE_ADHOC ||
vif->type == NL80211_IFTYPE_MESH_POINT || vif->type == NL80211_IFTYPE_MESH_POINT ||
vif->type == NL80211_IFTYPE_AP) { vif->type == NL80211_IFTYPE_AP) {
arvif->beacon_buf = dma_alloc_coherent(ar->dev, if (ar->bus_param.dev_type == ATH10K_DEV_TYPE_HL) {
IEEE80211_MAX_FRAME_LEN, arvif->beacon_buf = kmalloc(IEEE80211_MAX_FRAME_LEN,
&arvif->beacon_paddr, GFP_KERNEL);
GFP_ATOMIC); arvif->beacon_paddr = (dma_addr_t)arvif->beacon_buf;
} else {
arvif->beacon_buf =
dma_alloc_coherent(ar->dev,
IEEE80211_MAX_FRAME_LEN,
&arvif->beacon_paddr,
GFP_ATOMIC);
}
if (!arvif->beacon_buf) { if (!arvif->beacon_buf) {
ret = -ENOMEM; ret = -ENOMEM;
ath10k_warn(ar, "failed to allocate beacon buffer: %d\n", ath10k_warn(ar, "failed to allocate beacon buffer: %d\n",
...@@ -5794,8 +5805,12 @@ static int ath10k_add_interface(struct ieee80211_hw *hw, ...@@ -5794,8 +5805,12 @@ static int ath10k_add_interface(struct ieee80211_hw *hw,
err: err:
if (arvif->beacon_buf) { if (arvif->beacon_buf) {
dma_free_coherent(ar->dev, IEEE80211_MAX_FRAME_LEN, if (ar->bus_param.dev_type == ATH10K_DEV_TYPE_HL)
arvif->beacon_buf, arvif->beacon_paddr); kfree(arvif->beacon_buf);
else
dma_free_coherent(ar->dev, IEEE80211_MAX_FRAME_LEN,
arvif->beacon_buf,
arvif->beacon_paddr);
arvif->beacon_buf = NULL; arvif->beacon_buf = NULL;
} }
......
...@@ -1363,8 +1363,11 @@ static void ath10k_rx_indication_async_work(struct work_struct *work) ...@@ -1363,8 +1363,11 @@ static void ath10k_rx_indication_async_work(struct work_struct *work)
ep->ep_ops.ep_rx_complete(ar, skb); ep->ep_ops.ep_rx_complete(ar, skb);
} }
if (test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags)) if (test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags)) {
local_bh_disable();
napi_schedule(&ar->napi); napi_schedule(&ar->napi);
local_bh_enable();
}
} }
static int ath10k_sdio_read_rtc_state(struct ath10k_sdio *ar_sdio, unsigned char *state) static int ath10k_sdio_read_rtc_state(struct ath10k_sdio *ar_sdio, unsigned char *state)
......
...@@ -2610,6 +2610,10 @@ int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb) ...@@ -2610,6 +2610,10 @@ int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb)
if (ieee80211_is_beacon(hdr->frame_control)) if (ieee80211_is_beacon(hdr->frame_control))
ath10k_mac_handle_beacon(ar, skb); ath10k_mac_handle_beacon(ar, skb);
if (ieee80211_is_beacon(hdr->frame_control) ||
ieee80211_is_probe_resp(hdr->frame_control))
status->boottime_ns = ktime_get_boottime_ns();
ath10k_dbg(ar, ATH10K_DBG_MGMT, ath10k_dbg(ar, ATH10K_DBG_MGMT,
"event mgmt rx skb %pK len %d ftype %02x stype %02x\n", "event mgmt rx skb %pK len %d ftype %02x stype %02x\n",
skb, skb->len, skb, skb->len,
......
...@@ -37,7 +37,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = { ...@@ -37,7 +37,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.fw = { .fw = {
.dir = "IPQ8074/hw2.0", .dir = "IPQ8074/hw2.0",
.board_size = 256 * 1024, .board_size = 256 * 1024,
.cal_size = 256 * 1024, .cal_offset = 128 * 1024,
}, },
.max_radios = 3, .max_radios = 3,
.bdf_addr = 0x4B0C0000, .bdf_addr = 0x4B0C0000,
...@@ -59,7 +59,17 @@ static const struct ath11k_hw_params ath11k_hw_params[] = { ...@@ -59,7 +59,17 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.vdev_start_delay = false, .vdev_start_delay = false,
.htt_peer_map_v2 = true, .htt_peer_map_v2 = true,
.tcl_0_only = false, .tcl_0_only = false,
.spectral_fft_sz = 2,
.spectral = {
.fft_sz = 2,
/* HW bug, expected BIN size is 2 bytes but HW report as 4 bytes.
* so added pad size as 2 bytes to compensate the BIN size
*/
.fft_pad_sz = 2,
.summary_pad_sz = 0,
.fft_hdr_len = 16,
.max_fft_bins = 512,
},
.interface_modes = BIT(NL80211_IFTYPE_STATION) | .interface_modes = BIT(NL80211_IFTYPE_STATION) |
BIT(NL80211_IFTYPE_AP) | BIT(NL80211_IFTYPE_AP) |
...@@ -78,7 +88,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = { ...@@ -78,7 +88,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.fw = { .fw = {
.dir = "IPQ6018/hw1.0", .dir = "IPQ6018/hw1.0",
.board_size = 256 * 1024, .board_size = 256 * 1024,
.cal_size = 256 * 1024, .cal_offset = 128 * 1024,
}, },
.max_radios = 2, .max_radios = 2,
.bdf_addr = 0x4ABC0000, .bdf_addr = 0x4ABC0000,
...@@ -100,7 +110,14 @@ static const struct ath11k_hw_params ath11k_hw_params[] = { ...@@ -100,7 +110,14 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.vdev_start_delay = false, .vdev_start_delay = false,
.htt_peer_map_v2 = true, .htt_peer_map_v2 = true,
.tcl_0_only = false, .tcl_0_only = false,
.spectral_fft_sz = 4,
.spectral = {
.fft_sz = 4,
.fft_pad_sz = 0,
.summary_pad_sz = 0,
.fft_hdr_len = 16,
.max_fft_bins = 512,
},
.interface_modes = BIT(NL80211_IFTYPE_STATION) | .interface_modes = BIT(NL80211_IFTYPE_STATION) |
BIT(NL80211_IFTYPE_AP) | BIT(NL80211_IFTYPE_AP) |
...@@ -119,7 +136,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = { ...@@ -119,7 +136,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.fw = { .fw = {
.dir = "QCA6390/hw2.0", .dir = "QCA6390/hw2.0",
.board_size = 256 * 1024, .board_size = 256 * 1024,
.cal_size = 256 * 1024, .cal_offset = 128 * 1024,
}, },
.max_radios = 3, .max_radios = 3,
.bdf_addr = 0x4B0C0000, .bdf_addr = 0x4B0C0000,
...@@ -141,7 +158,14 @@ static const struct ath11k_hw_params ath11k_hw_params[] = { ...@@ -141,7 +158,14 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.vdev_start_delay = true, .vdev_start_delay = true,
.htt_peer_map_v2 = false, .htt_peer_map_v2 = false,
.tcl_0_only = true, .tcl_0_only = true,
.spectral_fft_sz = 0,
.spectral = {
.fft_sz = 0,
.fft_pad_sz = 0,
.summary_pad_sz = 0,
.fft_hdr_len = 0,
.max_fft_bins = 0,
},
.interface_modes = BIT(NL80211_IFTYPE_STATION) | .interface_modes = BIT(NL80211_IFTYPE_STATION) |
BIT(NL80211_IFTYPE_AP), BIT(NL80211_IFTYPE_AP),
...@@ -159,7 +183,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = { ...@@ -159,7 +183,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.fw = { .fw = {
.dir = "QCN9074/hw1.0", .dir = "QCN9074/hw1.0",
.board_size = 256 * 1024, .board_size = 256 * 1024,
.cal_size = 256 * 1024, .cal_offset = 128 * 1024,
}, },
.max_radios = 1, .max_radios = 1,
.single_pdev_only = false, .single_pdev_only = false,
...@@ -180,6 +204,15 @@ static const struct ath11k_hw_params ath11k_hw_params[] = { ...@@ -180,6 +204,15 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.vdev_start_delay = false, .vdev_start_delay = false,
.htt_peer_map_v2 = true, .htt_peer_map_v2 = true,
.tcl_0_only = false, .tcl_0_only = false,
.spectral = {
.fft_sz = 2,
.fft_pad_sz = 0,
.summary_pad_sz = 16,
.fft_hdr_len = 24,
.max_fft_bins = 1024,
},
.interface_modes = BIT(NL80211_IFTYPE_STATION) | .interface_modes = BIT(NL80211_IFTYPE_STATION) |
BIT(NL80211_IFTYPE_AP) | BIT(NL80211_IFTYPE_AP) |
BIT(NL80211_IFTYPE_MESH_POINT), BIT(NL80211_IFTYPE_MESH_POINT),
...@@ -197,7 +230,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = { ...@@ -197,7 +230,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.fw = { .fw = {
.dir = "WCN6855/hw2.0", .dir = "WCN6855/hw2.0",
.board_size = 256 * 1024, .board_size = 256 * 1024,
.cal_size = 256 * 1024, .cal_offset = 128 * 1024,
}, },
.max_radios = 3, .max_radios = 3,
.bdf_addr = 0x4B0C0000, .bdf_addr = 0x4B0C0000,
...@@ -219,7 +252,14 @@ static const struct ath11k_hw_params ath11k_hw_params[] = { ...@@ -219,7 +252,14 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.vdev_start_delay = true, .vdev_start_delay = true,
.htt_peer_map_v2 = false, .htt_peer_map_v2 = false,
.tcl_0_only = true, .tcl_0_only = true,
.spectral_fft_sz = 0,
.spectral = {
.fft_sz = 0,
.fft_pad_sz = 0,
.summary_pad_sz = 0,
.fft_hdr_len = 0,
.max_fft_bins = 0,
},
.interface_modes = BIT(NL80211_IFTYPE_STATION) | .interface_modes = BIT(NL80211_IFTYPE_STATION) |
BIT(NL80211_IFTYPE_AP), BIT(NL80211_IFTYPE_AP),
......
...@@ -93,6 +93,8 @@ struct ath11k_skb_rxcb { ...@@ -93,6 +93,8 @@ struct ath11k_skb_rxcb {
bool is_first_msdu; bool is_first_msdu;
bool is_last_msdu; bool is_last_msdu;
bool is_continuation; bool is_continuation;
bool is_mcbc;
bool is_eapol;
struct hal_rx_desc *rx_desc; struct hal_rx_desc *rx_desc;
u8 err_rel_src; u8 err_rel_src;
u8 err_code; u8 err_code;
...@@ -100,6 +102,8 @@ struct ath11k_skb_rxcb { ...@@ -100,6 +102,8 @@ struct ath11k_skb_rxcb {
u8 unmapped; u8 unmapped;
u8 is_frag; u8 is_frag;
u8 tid; u8 tid;
u16 peer_id;
u16 seq_no;
}; };
enum ath11k_hw_rev { enum ath11k_hw_rev {
...@@ -193,7 +197,9 @@ enum ath11k_dev_flags { ...@@ -193,7 +197,9 @@ enum ath11k_dev_flags {
}; };
enum ath11k_monitor_flags { enum ath11k_monitor_flags {
ATH11K_FLAG_MONITOR_ENABLED, ATH11K_FLAG_MONITOR_CONF_ENABLED,
ATH11K_FLAG_MONITOR_STARTED,
ATH11K_FLAG_MONITOR_VDEV_CREATED,
}; };
struct ath11k_vif { struct ath11k_vif {
...@@ -362,6 +368,7 @@ struct ath11k_sta { ...@@ -362,6 +368,7 @@ struct ath11k_sta {
enum hal_pn_type pn_type; enum hal_pn_type pn_type;
struct work_struct update_wk; struct work_struct update_wk;
struct work_struct set_4addr_wk;
struct rate_info txrate; struct rate_info txrate;
struct rate_info last_txrate; struct rate_info last_txrate;
u64 rx_duration; u64 rx_duration;
...@@ -374,12 +381,15 @@ struct ath11k_sta { ...@@ -374,12 +381,15 @@ struct ath11k_sta {
/* protected by conf_mutex */ /* protected by conf_mutex */
bool aggr_mode; bool aggr_mode;
#endif #endif
bool use_4addr_set;
u16 tcl_metadata;
}; };
#define ATH11K_MIN_5G_FREQ 4150 #define ATH11K_MIN_5G_FREQ 4150
#define ATH11K_MIN_6G_FREQ 5945 #define ATH11K_MIN_6G_FREQ 5925
#define ATH11K_MAX_6G_FREQ 7115 #define ATH11K_MAX_6G_FREQ 7115
#define ATH11K_NUM_CHANS 100 #define ATH11K_NUM_CHANS 101
#define ATH11K_MAX_5G_CHAN 173 #define ATH11K_MAX_5G_CHAN 173
enum ath11k_state { enum ath11k_state {
...@@ -484,7 +494,6 @@ struct ath11k { ...@@ -484,7 +494,6 @@ struct ath11k {
u32 chan_tx_pwr; u32 chan_tx_pwr;
u32 num_stations; u32 num_stations;
u32 max_num_stations; u32 max_num_stations;
bool monitor_present;
/* To synchronize concurrent synchronous mac80211 callback operations, /* To synchronize concurrent synchronous mac80211 callback operations,
* concurrent debugfs configuration and concurrent FW statistics events. * concurrent debugfs configuration and concurrent FW statistics events.
*/ */
...@@ -559,6 +568,7 @@ struct ath11k { ...@@ -559,6 +568,7 @@ struct ath11k {
struct ath11k_per_peer_tx_stats cached_stats; struct ath11k_per_peer_tx_stats cached_stats;
u32 last_ppdu_id; u32 last_ppdu_id;
u32 cached_ppdu_id; u32 cached_ppdu_id;
int monitor_vdev_id;
#ifdef CONFIG_ATH11K_DEBUGFS #ifdef CONFIG_ATH11K_DEBUGFS
struct ath11k_debug debug; struct ath11k_debug debug;
#endif #endif
...@@ -591,6 +601,8 @@ struct ath11k_pdev_cap { ...@@ -591,6 +601,8 @@ struct ath11k_pdev_cap {
u32 tx_chain_mask_shift; u32 tx_chain_mask_shift;
u32 rx_chain_mask_shift; u32 rx_chain_mask_shift;
struct ath11k_band_cap band[NUM_NL80211_BANDS]; struct ath11k_band_cap band[NUM_NL80211_BANDS];
bool nss_ratio_enabled;
u8 nss_ratio_info;
}; };
struct ath11k_pdev { struct ath11k_pdev {
...@@ -794,12 +806,15 @@ struct ath11k_fw_stats_pdev { ...@@ -794,12 +806,15 @@ struct ath11k_fw_stats_pdev {
s32 hw_reaped; s32 hw_reaped;
/* Num underruns */ /* Num underruns */
s32 underrun; s32 underrun;
/* Num hw paused */
u32 hw_paused;
/* Num PPDUs cleaned up in TX abort */ /* Num PPDUs cleaned up in TX abort */
s32 tx_abort; s32 tx_abort;
/* Num MPDUs requeued by SW */ /* Num MPDUs requeued by SW */
s32 mpdus_requeued; s32 mpdus_requeued;
/* excessive retries */ /* excessive retries */
u32 tx_ko; u32 tx_ko;
u32 tx_xretry;
/* data hw rate code */ /* data hw rate code */
u32 data_rc; u32 data_rc;
/* Scheduler self triggers */ /* Scheduler self triggers */
...@@ -820,6 +835,30 @@ struct ath11k_fw_stats_pdev { ...@@ -820,6 +835,30 @@ struct ath11k_fw_stats_pdev {
u32 phy_underrun; u32 phy_underrun;
/* MPDU is more than txop limit */ /* MPDU is more than txop limit */
u32 txop_ovf; u32 txop_ovf;
/* Num sequences posted */
u32 seq_posted;
/* Num sequences failed in queueing */
u32 seq_failed_queueing;
/* Num sequences completed */
u32 seq_completed;
/* Num sequences restarted */
u32 seq_restarted;
/* Num of MU sequences posted */
u32 mu_seq_posted;
/* Num MPDUs flushed by SW, HWPAUSED, SW TXABORT
* (Reset,channel change)
*/
s32 mpdus_sw_flush;
/* Num MPDUs filtered by HW, all filter condition (TTL expired) */
s32 mpdus_hw_filter;
/* Num MPDUs truncated by PDG (TXOP, TBTT,
* PPDU_duration based on rate, dyn_bw)
*/
s32 mpdus_truncated;
/* Num MPDUs that was tried but didn't receive ACK or BA */
s32 mpdus_ack_failed;
/* Num MPDUs that was dropped du to expiry. */
s32 mpdus_expired;
/* PDEV RX stats */ /* PDEV RX stats */
/* Cnts any change in ring routing mid-ppdu */ /* Cnts any change in ring routing mid-ppdu */
...@@ -845,6 +884,8 @@ struct ath11k_fw_stats_pdev { ...@@ -845,6 +884,8 @@ struct ath11k_fw_stats_pdev {
s32 phy_err_drop; s32 phy_err_drop;
/* Number of mpdu errors - FCS, MIC, ENC etc. */ /* Number of mpdu errors - FCS, MIC, ENC etc. */
s32 mpdu_errs; s32 mpdu_errs;
/* Num overflow errors */
s32 rx_ovfl_errs;
}; };
struct ath11k_fw_stats_vdev { struct ath11k_fw_stats_vdev {
......
...@@ -8,8 +8,7 @@ ...@@ -8,8 +8,7 @@
static int ath11k_dbring_bufs_replenish(struct ath11k *ar, static int ath11k_dbring_bufs_replenish(struct ath11k *ar,
struct ath11k_dbring *ring, struct ath11k_dbring *ring,
struct ath11k_dbring_element *buff, struct ath11k_dbring_element *buff)
gfp_t gfp)
{ {
struct ath11k_base *ab = ar->ab; struct ath11k_base *ab = ar->ab;
struct hal_srng *srng; struct hal_srng *srng;
...@@ -35,7 +34,7 @@ static int ath11k_dbring_bufs_replenish(struct ath11k *ar, ...@@ -35,7 +34,7 @@ static int ath11k_dbring_bufs_replenish(struct ath11k *ar,
goto err; goto err;
spin_lock_bh(&ring->idr_lock); spin_lock_bh(&ring->idr_lock);
buf_id = idr_alloc(&ring->bufs_idr, buff, 0, ring->bufs_max, gfp); buf_id = idr_alloc(&ring->bufs_idr, buff, 0, ring->bufs_max, GFP_ATOMIC);
spin_unlock_bh(&ring->idr_lock); spin_unlock_bh(&ring->idr_lock);
if (buf_id < 0) { if (buf_id < 0) {
ret = -ENOBUFS; ret = -ENOBUFS;
...@@ -72,8 +71,7 @@ static int ath11k_dbring_bufs_replenish(struct ath11k *ar, ...@@ -72,8 +71,7 @@ static int ath11k_dbring_bufs_replenish(struct ath11k *ar,
} }
static int ath11k_dbring_fill_bufs(struct ath11k *ar, static int ath11k_dbring_fill_bufs(struct ath11k *ar,
struct ath11k_dbring *ring, struct ath11k_dbring *ring)
gfp_t gfp)
{ {
struct ath11k_dbring_element *buff; struct ath11k_dbring_element *buff;
struct hal_srng *srng; struct hal_srng *srng;
...@@ -92,11 +90,11 @@ static int ath11k_dbring_fill_bufs(struct ath11k *ar, ...@@ -92,11 +90,11 @@ static int ath11k_dbring_fill_bufs(struct ath11k *ar,
size = sizeof(*buff) + ring->buf_sz + align - 1; size = sizeof(*buff) + ring->buf_sz + align - 1;
while (num_remain > 0) { while (num_remain > 0) {
buff = kzalloc(size, gfp); buff = kzalloc(size, GFP_ATOMIC);
if (!buff) if (!buff)
break; break;
ret = ath11k_dbring_bufs_replenish(ar, ring, buff, gfp); ret = ath11k_dbring_bufs_replenish(ar, ring, buff);
if (ret) { if (ret) {
ath11k_warn(ar->ab, "failed to replenish db ring num_remain %d req_ent %d\n", ath11k_warn(ar->ab, "failed to replenish db ring num_remain %d req_ent %d\n",
num_remain, req_entries); num_remain, req_entries);
...@@ -176,7 +174,7 @@ int ath11k_dbring_buf_setup(struct ath11k *ar, ...@@ -176,7 +174,7 @@ int ath11k_dbring_buf_setup(struct ath11k *ar,
ring->hp_addr = ath11k_hal_srng_get_hp_addr(ar->ab, srng); ring->hp_addr = ath11k_hal_srng_get_hp_addr(ar->ab, srng);
ring->tp_addr = ath11k_hal_srng_get_tp_addr(ar->ab, srng); ring->tp_addr = ath11k_hal_srng_get_tp_addr(ar->ab, srng);
ret = ath11k_dbring_fill_bufs(ar, ring, GFP_KERNEL); ret = ath11k_dbring_fill_bufs(ar, ring);
return ret; return ret;
} }
...@@ -322,7 +320,7 @@ int ath11k_dbring_buffer_release_event(struct ath11k_base *ab, ...@@ -322,7 +320,7 @@ int ath11k_dbring_buffer_release_event(struct ath11k_base *ab,
} }
memset(buff, 0, size); memset(buff, 0, size);
ath11k_dbring_bufs_replenish(ar, ring, buff, GFP_ATOMIC); ath11k_dbring_bufs_replenish(ar, ring, buff);
} }
spin_unlock_bh(&srng->lock); spin_unlock_bh(&srng->lock);
......
...@@ -902,7 +902,7 @@ static ssize_t ath11k_write_pktlog_filter(struct file *file, ...@@ -902,7 +902,7 @@ static ssize_t ath11k_write_pktlog_filter(struct file *file,
struct htt_rx_ring_tlv_filter tlv_filter = {0}; struct htt_rx_ring_tlv_filter tlv_filter = {0};
u32 rx_filter = 0, ring_id, filter, mode; u32 rx_filter = 0, ring_id, filter, mode;
u8 buf[128] = {0}; u8 buf[128] = {0};
int i, ret; int i, ret, rx_buf_sz = 0;
ssize_t rc; ssize_t rc;
mutex_lock(&ar->conf_mutex); mutex_lock(&ar->conf_mutex);
...@@ -940,6 +940,17 @@ static ssize_t ath11k_write_pktlog_filter(struct file *file, ...@@ -940,6 +940,17 @@ static ssize_t ath11k_write_pktlog_filter(struct file *file,
} }
} }
/* Clear rx filter set for monitor mode and rx status */
for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {
ring_id = ar->dp.rx_mon_status_refill_ring[i].refill_buf_ring.ring_id;
ret = ath11k_dp_tx_htt_rx_filter_setup(ar->ab, ring_id, ar->dp.mac_id,
HAL_RXDMA_MONITOR_STATUS,
rx_buf_sz, &tlv_filter);
if (ret) {
ath11k_warn(ar->ab, "failed to set rx filter for monitor status ring\n");
goto out;
}
}
#define HTT_RX_FILTER_TLV_LITE_MODE \ #define HTT_RX_FILTER_TLV_LITE_MODE \
(HTT_RX_FILTER_TLV_FLAGS_PPDU_START | \ (HTT_RX_FILTER_TLV_FLAGS_PPDU_START | \
HTT_RX_FILTER_TLV_FLAGS_PPDU_END | \ HTT_RX_FILTER_TLV_FLAGS_PPDU_END | \
...@@ -955,6 +966,7 @@ static ssize_t ath11k_write_pktlog_filter(struct file *file, ...@@ -955,6 +966,7 @@ static ssize_t ath11k_write_pktlog_filter(struct file *file,
HTT_RX_FILTER_TLV_FLAGS_MPDU_END | HTT_RX_FILTER_TLV_FLAGS_MPDU_END |
HTT_RX_FILTER_TLV_FLAGS_PACKET_HEADER | HTT_RX_FILTER_TLV_FLAGS_PACKET_HEADER |
HTT_RX_FILTER_TLV_FLAGS_ATTENTION; HTT_RX_FILTER_TLV_FLAGS_ATTENTION;
rx_buf_sz = DP_RX_BUFFER_SIZE;
} else if (mode == ATH11K_PKTLOG_MODE_LITE) { } else if (mode == ATH11K_PKTLOG_MODE_LITE) {
ret = ath11k_dp_tx_htt_h2t_ppdu_stats_req(ar, ret = ath11k_dp_tx_htt_h2t_ppdu_stats_req(ar,
HTT_PPDU_STATS_TAG_PKTLOG); HTT_PPDU_STATS_TAG_PKTLOG);
...@@ -964,7 +976,12 @@ static ssize_t ath11k_write_pktlog_filter(struct file *file, ...@@ -964,7 +976,12 @@ static ssize_t ath11k_write_pktlog_filter(struct file *file,
} }
rx_filter = HTT_RX_FILTER_TLV_LITE_MODE; rx_filter = HTT_RX_FILTER_TLV_LITE_MODE;
rx_buf_sz = DP_RX_BUFFER_SIZE_LITE;
} else { } else {
rx_buf_sz = DP_RX_BUFFER_SIZE;
tlv_filter = ath11k_mac_mon_status_filter_default;
rx_filter = tlv_filter.rx_filter;
ret = ath11k_dp_tx_htt_h2t_ppdu_stats_req(ar, ret = ath11k_dp_tx_htt_h2t_ppdu_stats_req(ar,
HTT_PPDU_STATS_TAG_DEFAULT); HTT_PPDU_STATS_TAG_DEFAULT);
if (ret) { if (ret) {
...@@ -988,7 +1005,7 @@ static ssize_t ath11k_write_pktlog_filter(struct file *file, ...@@ -988,7 +1005,7 @@ static ssize_t ath11k_write_pktlog_filter(struct file *file,
ret = ath11k_dp_tx_htt_rx_filter_setup(ab, ring_id, ret = ath11k_dp_tx_htt_rx_filter_setup(ab, ring_id,
ar->dp.mac_id + i, ar->dp.mac_id + i,
HAL_RXDMA_MONITOR_STATUS, HAL_RXDMA_MONITOR_STATUS,
DP_RX_BUFFER_SIZE, &tlv_filter); rx_buf_sz, &tlv_filter);
if (ret) { if (ret) {
ath11k_warn(ab, "failed to set rx filter for monitor status ring\n"); ath11k_warn(ab, "failed to set rx filter for monitor status ring\n");
...@@ -996,8 +1013,8 @@ static ssize_t ath11k_write_pktlog_filter(struct file *file, ...@@ -996,8 +1013,8 @@ static ssize_t ath11k_write_pktlog_filter(struct file *file,
} }
} }
ath11k_dbg(ab, ATH11K_DBG_WMI, "pktlog filter %d mode %s\n", ath11k_info(ab, "pktlog mode %s\n",
filter, ((mode == ATH11K_PKTLOG_MODE_FULL) ? "full" : "lite")); ((mode == ATH11K_PKTLOG_MODE_FULL) ? "full" : "lite"));
ar->debug.pktlog_filter = filter; ar->debug.pktlog_filter = filter;
ar->debug.pktlog_mode = mode; ar->debug.pktlog_mode = mode;
......
...@@ -38,6 +38,10 @@ enum ath11k_dbg_htt_ext_stats_type { ...@@ -38,6 +38,10 @@ enum ath11k_dbg_htt_ext_stats_type {
ATH11K_DBG_HTT_EXT_STATS_TX_SOUNDING_INFO = 22, ATH11K_DBG_HTT_EXT_STATS_TX_SOUNDING_INFO = 22,
ATH11K_DBG_HTT_EXT_STATS_PDEV_OBSS_PD_STATS = 23, ATH11K_DBG_HTT_EXT_STATS_PDEV_OBSS_PD_STATS = 23,
ATH11K_DBG_HTT_EXT_STATS_RING_BACKPRESSURE_STATS = 24, ATH11K_DBG_HTT_EXT_STATS_RING_BACKPRESSURE_STATS = 24,
ATH11K_DBG_HTT_EXT_STATS_PEER_CTRL_PATH_TXRX_STATS = 29,
ATH11K_DBG_HTT_EXT_STATS_PDEV_TX_RATE_TXBF_STATS = 31,
ATH11K_DBG_HTT_EXT_STATS_TXBF_OFDMA = 32,
ATH11K_DBG_HTT_EXT_PHY_COUNTERS_AND_PHY_STATS = 37,
/* keep this last */ /* keep this last */
ATH11K_DBG_HTT_NUM_EXT_STATS, ATH11K_DBG_HTT_NUM_EXT_STATS,
......
...@@ -419,15 +419,21 @@ ath11k_dbg_sta_open_htt_peer_stats(struct inode *inode, struct file *file) ...@@ -419,15 +419,21 @@ ath11k_dbg_sta_open_htt_peer_stats(struct inode *inode, struct file *file)
struct ath11k_sta *arsta = (struct ath11k_sta *)sta->drv_priv; struct ath11k_sta *arsta = (struct ath11k_sta *)sta->drv_priv;
struct ath11k *ar = arsta->arvif->ar; struct ath11k *ar = arsta->arvif->ar;
struct debug_htt_stats_req *stats_req; struct debug_htt_stats_req *stats_req;
int type = ar->debug.htt_stats.type;
int ret; int ret;
if ((type != ATH11K_DBG_HTT_EXT_STATS_PEER_INFO &&
type != ATH11K_DBG_HTT_EXT_STATS_PEER_CTRL_PATH_TXRX_STATS) ||
type == ATH11K_DBG_HTT_EXT_STATS_RESET)
return -EPERM;
stats_req = vzalloc(sizeof(*stats_req) + ATH11K_HTT_STATS_BUF_SIZE); stats_req = vzalloc(sizeof(*stats_req) + ATH11K_HTT_STATS_BUF_SIZE);
if (!stats_req) if (!stats_req)
return -ENOMEM; return -ENOMEM;
mutex_lock(&ar->conf_mutex); mutex_lock(&ar->conf_mutex);
ar->debug.htt_stats.stats_req = stats_req; ar->debug.htt_stats.stats_req = stats_req;
stats_req->type = ATH11K_DBG_HTT_EXT_STATS_PEER_INFO; stats_req->type = type;
memcpy(stats_req->peer_addr, sta->addr, ETH_ALEN); memcpy(stats_req->peer_addr, sta->addr, ETH_ALEN);
ret = ath11k_debugfs_htt_stats_req(ar); ret = ath11k_debugfs_htt_stats_req(ar);
mutex_unlock(&ar->conf_mutex); mutex_unlock(&ar->conf_mutex);
......
...@@ -195,6 +195,7 @@ struct ath11k_pdev_dp { ...@@ -195,6 +195,7 @@ struct ath11k_pdev_dp {
#define DP_RXDMA_MONITOR_DESC_RING_SIZE 4096 #define DP_RXDMA_MONITOR_DESC_RING_SIZE 4096
#define DP_RX_BUFFER_SIZE 2048 #define DP_RX_BUFFER_SIZE 2048
#define DP_RX_BUFFER_SIZE_LITE 1024
#define DP_RX_BUFFER_ALIGN_SIZE 128 #define DP_RX_BUFFER_ALIGN_SIZE 128
#define DP_RXDMA_BUF_COOKIE_BUF_ID GENMASK(17, 0) #define DP_RXDMA_BUF_COOKIE_BUF_ID GENMASK(17, 0)
...@@ -1592,6 +1593,13 @@ struct ath11k_htt_extd_stats_msg { ...@@ -1592,6 +1593,13 @@ struct ath11k_htt_extd_stats_msg {
u8 data[0]; u8 data[0];
} __packed; } __packed;
#define HTT_MAC_ADDR_L32_0 GENMASK(7, 0)
#define HTT_MAC_ADDR_L32_1 GENMASK(15, 8)
#define HTT_MAC_ADDR_L32_2 GENMASK(23, 16)
#define HTT_MAC_ADDR_L32_3 GENMASK(31, 24)
#define HTT_MAC_ADDR_H16_0 GENMASK(7, 0)
#define HTT_MAC_ADDR_H16_1 GENMASK(15, 8)
struct htt_mac_addr { struct htt_mac_addr {
u32 mac_addr_l32; u32 mac_addr_l32;
u32 mac_addr_h16; u32 mac_addr_h16;
......
This diff is collapsed.
...@@ -78,7 +78,7 @@ enum hal_encrypt_type ath11k_dp_tx_get_encrypt_type(u32 cipher) ...@@ -78,7 +78,7 @@ enum hal_encrypt_type ath11k_dp_tx_get_encrypt_type(u32 cipher)
} }
int ath11k_dp_tx(struct ath11k *ar, struct ath11k_vif *arvif, int ath11k_dp_tx(struct ath11k *ar, struct ath11k_vif *arvif,
struct sk_buff *skb) struct ath11k_sta *arsta, struct sk_buff *skb)
{ {
struct ath11k_base *ab = ar->ab; struct ath11k_base *ab = ar->ab;
struct ath11k_dp *dp = &ab->dp; struct ath11k_dp *dp = &ab->dp;
...@@ -145,7 +145,15 @@ int ath11k_dp_tx(struct ath11k *ar, struct ath11k_vif *arvif, ...@@ -145,7 +145,15 @@ int ath11k_dp_tx(struct ath11k *ar, struct ath11k_vif *arvif,
FIELD_PREP(DP_TX_DESC_ID_MSDU_ID, ret) | FIELD_PREP(DP_TX_DESC_ID_MSDU_ID, ret) |
FIELD_PREP(DP_TX_DESC_ID_POOL_ID, pool_id); FIELD_PREP(DP_TX_DESC_ID_POOL_ID, pool_id);
ti.encap_type = ath11k_dp_tx_get_encap_type(arvif, skb); ti.encap_type = ath11k_dp_tx_get_encap_type(arvif, skb);
ti.meta_data_flags = arvif->tcl_metadata;
if (ieee80211_has_a4(hdr->frame_control) &&
is_multicast_ether_addr(hdr->addr3) && arsta &&
arsta->use_4addr_set) {
ti.meta_data_flags = arsta->tcl_metadata;
ti.flags0 |= FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_TO_FW, 1);
} else {
ti.meta_data_flags = arvif->tcl_metadata;
}
if (ti.encap_type == HAL_TCL_ENCAP_TYPE_RAW) { if (ti.encap_type == HAL_TCL_ENCAP_TYPE_RAW) {
if (skb_cb->flags & ATH11K_SKB_CIPHER_SET) { if (skb_cb->flags & ATH11K_SKB_CIPHER_SET) {
...@@ -614,6 +622,9 @@ int ath11k_dp_tx_send_reo_cmd(struct ath11k_base *ab, struct dp_rx_tid *rx_tid, ...@@ -614,6 +622,9 @@ int ath11k_dp_tx_send_reo_cmd(struct ath11k_base *ab, struct dp_rx_tid *rx_tid,
struct hal_srng *cmd_ring; struct hal_srng *cmd_ring;
int cmd_num; int cmd_num;
if (test_bit(ATH11K_FLAG_CRASH_FLUSH, &ab->dev_flags))
return -ESHUTDOWN;
cmd_ring = &ab->hal.srng_list[dp->reo_cmd_ring.ring_id]; cmd_ring = &ab->hal.srng_list[dp->reo_cmd_ring.ring_id];
cmd_num = ath11k_hal_reo_cmd_send(ab, cmd_ring, type, cmd); cmd_num = ath11k_hal_reo_cmd_send(ab, cmd_ring, type, cmd);
...@@ -1068,12 +1079,16 @@ int ath11k_dp_tx_htt_monitor_mode_ring_config(struct ath11k *ar, bool reset) ...@@ -1068,12 +1079,16 @@ int ath11k_dp_tx_htt_monitor_mode_ring_config(struct ath11k *ar, bool reset)
for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) { for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {
ring_id = dp->rx_mon_status_refill_ring[i].refill_buf_ring.ring_id; ring_id = dp->rx_mon_status_refill_ring[i].refill_buf_ring.ring_id;
if (!reset) if (!reset) {
tlv_filter.rx_filter = tlv_filter.rx_filter =
HTT_RX_MON_FILTER_TLV_FLAGS_MON_STATUS_RING; HTT_RX_MON_FILTER_TLV_FLAGS_MON_STATUS_RING;
else } else {
tlv_filter = ath11k_mac_mon_status_filter_default; tlv_filter = ath11k_mac_mon_status_filter_default;
if (ath11k_debugfs_is_extd_rx_stats_enabled(ar))
tlv_filter.rx_filter = ath11k_debugfs_rx_filter(ar);
}
ret = ath11k_dp_tx_htt_rx_filter_setup(ab, ring_id, ret = ath11k_dp_tx_htt_rx_filter_setup(ab, ring_id,
dp->mac_id + i, dp->mac_id + i,
HAL_RXDMA_MONITOR_STATUS, HAL_RXDMA_MONITOR_STATUS,
......
...@@ -17,7 +17,7 @@ struct ath11k_dp_htt_wbm_tx_status { ...@@ -17,7 +17,7 @@ struct ath11k_dp_htt_wbm_tx_status {
int ath11k_dp_tx_htt_h2t_ver_req_msg(struct ath11k_base *ab); int ath11k_dp_tx_htt_h2t_ver_req_msg(struct ath11k_base *ab);
int ath11k_dp_tx(struct ath11k *ar, struct ath11k_vif *arvif, int ath11k_dp_tx(struct ath11k *ar, struct ath11k_vif *arvif,
struct sk_buff *skb); struct ath11k_sta *arsta, struct sk_buff *skb);
void ath11k_dp_tx_completion_handler(struct ath11k_base *ab, int ring_id); void ath11k_dp_tx_completion_handler(struct ath11k_base *ab, int ring_id);
int ath11k_dp_tx_send_reo_cmd(struct ath11k_base *ab, struct dp_rx_tid *rx_tid, int ath11k_dp_tx_send_reo_cmd(struct ath11k_base *ab, struct dp_rx_tid *rx_tid,
enum hal_reo_cmd_type type, enum hal_reo_cmd_type type,
......
...@@ -496,6 +496,8 @@ struct hal_tlv_hdr { ...@@ -496,6 +496,8 @@ struct hal_tlv_hdr {
#define RX_MPDU_DESC_INFO0_DA_IDX_TIMEOUT BIT(29) #define RX_MPDU_DESC_INFO0_DA_IDX_TIMEOUT BIT(29)
#define RX_MPDU_DESC_INFO0_RAW_MPDU BIT(30) #define RX_MPDU_DESC_INFO0_RAW_MPDU BIT(30)
#define RX_MPDU_DESC_META_DATA_PEER_ID GENMASK(15, 0)
struct rx_mpdu_desc { struct rx_mpdu_desc {
u32 info0; /* %RX_MPDU_DESC_INFO */ u32 info0; /* %RX_MPDU_DESC_INFO */
u32 meta_data; u32 meta_data;
......
...@@ -97,6 +97,7 @@ static void ath11k_init_wmi_config_qca6390(struct ath11k_base *ab, ...@@ -97,6 +97,7 @@ static void ath11k_init_wmi_config_qca6390(struct ath11k_base *ab,
config->num_multicast_filter_entries = 0x20; config->num_multicast_filter_entries = 0x20;
config->num_wow_filters = 0x16; config->num_wow_filters = 0x16;
config->num_keep_alive_pattern = 0; config->num_keep_alive_pattern = 0;
config->flag1 |= WMI_RSRC_CFG_FLAG1_BSS_CHANNEL_INFO_64;
} }
static void ath11k_hw_ipq8074_reo_setup(struct ath11k_base *ab) static void ath11k_hw_ipq8074_reo_setup(struct ath11k_base *ab)
...@@ -197,6 +198,7 @@ static void ath11k_init_wmi_config_ipq8074(struct ath11k_base *ab, ...@@ -197,6 +198,7 @@ static void ath11k_init_wmi_config_ipq8074(struct ath11k_base *ab,
config->peer_map_unmap_v2_support = 1; config->peer_map_unmap_v2_support = 1;
config->twt_ap_pdev_count = ab->num_radios; config->twt_ap_pdev_count = ab->num_radios;
config->twt_ap_sta_count = 1000; config->twt_ap_sta_count = 1000;
config->flag1 |= WMI_RSRC_CFG_FLAG1_BSS_CHANNEL_INFO_64;
} }
static int ath11k_hw_mac_id_to_pdev_id_ipq8074(struct ath11k_hw_params *hw, static int ath11k_hw_mac_id_to_pdev_id_ipq8074(struct ath11k_hw_params *hw,
...@@ -372,6 +374,17 @@ static void ath11k_hw_ipq8074_rx_desc_set_msdu_len(struct hal_rx_desc *desc, u16 ...@@ -372,6 +374,17 @@ static void ath11k_hw_ipq8074_rx_desc_set_msdu_len(struct hal_rx_desc *desc, u16
desc->u.ipq8074.msdu_start.info1 = __cpu_to_le32(info); desc->u.ipq8074.msdu_start.info1 = __cpu_to_le32(info);
} }
static bool ath11k_hw_ipq8074_rx_desc_mac_addr2_valid(struct hal_rx_desc *desc)
{
return __le32_to_cpu(desc->u.ipq8074.mpdu_start.info1) &
RX_MPDU_START_INFO1_MAC_ADDR2_VALID;
}
static u8 *ath11k_hw_ipq8074_rx_desc_mpdu_start_addr2(struct hal_rx_desc *desc)
{
return desc->u.ipq8074.mpdu_start.addr2;
}
static static
struct rx_attention *ath11k_hw_ipq8074_rx_desc_get_attention(struct hal_rx_desc *desc) struct rx_attention *ath11k_hw_ipq8074_rx_desc_get_attention(struct hal_rx_desc *desc)
{ {
...@@ -543,6 +556,17 @@ static u8 *ath11k_hw_qcn9074_rx_desc_get_msdu_payload(struct hal_rx_desc *desc) ...@@ -543,6 +556,17 @@ static u8 *ath11k_hw_qcn9074_rx_desc_get_msdu_payload(struct hal_rx_desc *desc)
return &desc->u.qcn9074.msdu_payload[0]; return &desc->u.qcn9074.msdu_payload[0];
} }
static bool ath11k_hw_ipq9074_rx_desc_mac_addr2_valid(struct hal_rx_desc *desc)
{
return __le32_to_cpu(desc->u.qcn9074.mpdu_start.info11) &
RX_MPDU_START_INFO11_MAC_ADDR2_VALID;
}
static u8 *ath11k_hw_ipq9074_rx_desc_mpdu_start_addr2(struct hal_rx_desc *desc)
{
return desc->u.qcn9074.mpdu_start.addr2;
}
static bool ath11k_hw_wcn6855_rx_desc_get_first_msdu(struct hal_rx_desc *desc) static bool ath11k_hw_wcn6855_rx_desc_get_first_msdu(struct hal_rx_desc *desc)
{ {
return !!FIELD_GET(RX_MSDU_END_INFO2_FIRST_MSDU_WCN6855, return !!FIELD_GET(RX_MSDU_END_INFO2_FIRST_MSDU_WCN6855,
...@@ -703,6 +727,17 @@ static u8 *ath11k_hw_wcn6855_rx_desc_get_msdu_payload(struct hal_rx_desc *desc) ...@@ -703,6 +727,17 @@ static u8 *ath11k_hw_wcn6855_rx_desc_get_msdu_payload(struct hal_rx_desc *desc)
return &desc->u.wcn6855.msdu_payload[0]; return &desc->u.wcn6855.msdu_payload[0];
} }
static bool ath11k_hw_wcn6855_rx_desc_mac_addr2_valid(struct hal_rx_desc *desc)
{
return __le32_to_cpu(desc->u.wcn6855.mpdu_start.info1) &
RX_MPDU_START_INFO1_MAC_ADDR2_VALID;
}
static u8 *ath11k_hw_wcn6855_rx_desc_mpdu_start_addr2(struct hal_rx_desc *desc)
{
return desc->u.wcn6855.mpdu_start.addr2;
}
static void ath11k_hw_wcn6855_reo_setup(struct ath11k_base *ab) static void ath11k_hw_wcn6855_reo_setup(struct ath11k_base *ab)
{ {
u32 reo_base = HAL_SEQ_WCSS_UMAC_REO_REG; u32 reo_base = HAL_SEQ_WCSS_UMAC_REO_REG;
...@@ -799,6 +834,8 @@ const struct ath11k_hw_ops ipq8074_ops = { ...@@ -799,6 +834,8 @@ const struct ath11k_hw_ops ipq8074_ops = {
.rx_desc_get_msdu_payload = ath11k_hw_ipq8074_rx_desc_get_msdu_payload, .rx_desc_get_msdu_payload = ath11k_hw_ipq8074_rx_desc_get_msdu_payload,
.reo_setup = ath11k_hw_ipq8074_reo_setup, .reo_setup = ath11k_hw_ipq8074_reo_setup,
.mpdu_info_get_peerid = ath11k_hw_ipq8074_mpdu_info_get_peerid, .mpdu_info_get_peerid = ath11k_hw_ipq8074_mpdu_info_get_peerid,
.rx_desc_mac_addr2_valid = ath11k_hw_ipq8074_rx_desc_mac_addr2_valid,
.rx_desc_mpdu_start_addr2 = ath11k_hw_ipq8074_rx_desc_mpdu_start_addr2,
}; };
const struct ath11k_hw_ops ipq6018_ops = { const struct ath11k_hw_ops ipq6018_ops = {
...@@ -835,6 +872,8 @@ const struct ath11k_hw_ops ipq6018_ops = { ...@@ -835,6 +872,8 @@ const struct ath11k_hw_ops ipq6018_ops = {
.rx_desc_get_msdu_payload = ath11k_hw_ipq8074_rx_desc_get_msdu_payload, .rx_desc_get_msdu_payload = ath11k_hw_ipq8074_rx_desc_get_msdu_payload,
.reo_setup = ath11k_hw_ipq8074_reo_setup, .reo_setup = ath11k_hw_ipq8074_reo_setup,
.mpdu_info_get_peerid = ath11k_hw_ipq8074_mpdu_info_get_peerid, .mpdu_info_get_peerid = ath11k_hw_ipq8074_mpdu_info_get_peerid,
.rx_desc_mac_addr2_valid = ath11k_hw_ipq8074_rx_desc_mac_addr2_valid,
.rx_desc_mpdu_start_addr2 = ath11k_hw_ipq8074_rx_desc_mpdu_start_addr2,
}; };
const struct ath11k_hw_ops qca6390_ops = { const struct ath11k_hw_ops qca6390_ops = {
...@@ -871,6 +910,8 @@ const struct ath11k_hw_ops qca6390_ops = { ...@@ -871,6 +910,8 @@ const struct ath11k_hw_ops qca6390_ops = {
.rx_desc_get_msdu_payload = ath11k_hw_ipq8074_rx_desc_get_msdu_payload, .rx_desc_get_msdu_payload = ath11k_hw_ipq8074_rx_desc_get_msdu_payload,
.reo_setup = ath11k_hw_ipq8074_reo_setup, .reo_setup = ath11k_hw_ipq8074_reo_setup,
.mpdu_info_get_peerid = ath11k_hw_ipq8074_mpdu_info_get_peerid, .mpdu_info_get_peerid = ath11k_hw_ipq8074_mpdu_info_get_peerid,
.rx_desc_mac_addr2_valid = ath11k_hw_ipq8074_rx_desc_mac_addr2_valid,
.rx_desc_mpdu_start_addr2 = ath11k_hw_ipq8074_rx_desc_mpdu_start_addr2,
}; };
const struct ath11k_hw_ops qcn9074_ops = { const struct ath11k_hw_ops qcn9074_ops = {
...@@ -907,6 +948,8 @@ const struct ath11k_hw_ops qcn9074_ops = { ...@@ -907,6 +948,8 @@ const struct ath11k_hw_ops qcn9074_ops = {
.rx_desc_get_msdu_payload = ath11k_hw_qcn9074_rx_desc_get_msdu_payload, .rx_desc_get_msdu_payload = ath11k_hw_qcn9074_rx_desc_get_msdu_payload,
.reo_setup = ath11k_hw_ipq8074_reo_setup, .reo_setup = ath11k_hw_ipq8074_reo_setup,
.mpdu_info_get_peerid = ath11k_hw_ipq8074_mpdu_info_get_peerid, .mpdu_info_get_peerid = ath11k_hw_ipq8074_mpdu_info_get_peerid,
.rx_desc_mac_addr2_valid = ath11k_hw_ipq9074_rx_desc_mac_addr2_valid,
.rx_desc_mpdu_start_addr2 = ath11k_hw_ipq9074_rx_desc_mpdu_start_addr2,
}; };
const struct ath11k_hw_ops wcn6855_ops = { const struct ath11k_hw_ops wcn6855_ops = {
...@@ -943,6 +986,8 @@ const struct ath11k_hw_ops wcn6855_ops = { ...@@ -943,6 +986,8 @@ const struct ath11k_hw_ops wcn6855_ops = {
.rx_desc_get_msdu_payload = ath11k_hw_wcn6855_rx_desc_get_msdu_payload, .rx_desc_get_msdu_payload = ath11k_hw_wcn6855_rx_desc_get_msdu_payload,
.reo_setup = ath11k_hw_wcn6855_reo_setup, .reo_setup = ath11k_hw_wcn6855_reo_setup,
.mpdu_info_get_peerid = ath11k_hw_wcn6855_mpdu_info_get_peerid, .mpdu_info_get_peerid = ath11k_hw_wcn6855_mpdu_info_get_peerid,
.rx_desc_mac_addr2_valid = ath11k_hw_wcn6855_rx_desc_mac_addr2_valid,
.rx_desc_mpdu_start_addr2 = ath11k_hw_wcn6855_rx_desc_mpdu_start_addr2,
}; };
#define ATH11K_TX_RING_MASK_0 0x1 #define ATH11K_TX_RING_MASK_0 0x1
......
...@@ -128,7 +128,7 @@ struct ath11k_hw_params { ...@@ -128,7 +128,7 @@ struct ath11k_hw_params {
struct { struct {
const char *dir; const char *dir;
size_t board_size; size_t board_size;
size_t cal_size; size_t cal_offset;
} fw; } fw;
const struct ath11k_hw_ops *hw_ops; const struct ath11k_hw_ops *hw_ops;
...@@ -153,7 +153,14 @@ struct ath11k_hw_params { ...@@ -153,7 +153,14 @@ struct ath11k_hw_params {
bool vdev_start_delay; bool vdev_start_delay;
bool htt_peer_map_v2; bool htt_peer_map_v2;
bool tcl_0_only; bool tcl_0_only;
u8 spectral_fft_sz;
struct {
u8 fft_sz;
u8 fft_pad_sz;
u8 summary_pad_sz;
u8 fft_hdr_len;
u16 max_fft_bins;
} spectral;
u16 interface_modes; u16 interface_modes;
bool supports_monitor; bool supports_monitor;
...@@ -202,6 +209,8 @@ struct ath11k_hw_ops { ...@@ -202,6 +209,8 @@ struct ath11k_hw_ops {
u8 *(*rx_desc_get_msdu_payload)(struct hal_rx_desc *desc); u8 *(*rx_desc_get_msdu_payload)(struct hal_rx_desc *desc);
void (*reo_setup)(struct ath11k_base *ab); void (*reo_setup)(struct ath11k_base *ab);
u16 (*mpdu_info_get_peerid)(u8 *tlv_data); u16 (*mpdu_info_get_peerid)(u8 *tlv_data);
bool (*rx_desc_mac_addr2_valid)(struct hal_rx_desc *desc);
u8* (*rx_desc_mpdu_start_addr2)(struct hal_rx_desc *desc);
}; };
extern const struct ath11k_hw_ops ipq8074_ops; extern const struct ath11k_hw_ops ipq8074_ops;
......
This diff is collapsed.
...@@ -115,6 +115,9 @@ struct ath11k_generic_iter { ...@@ -115,6 +115,9 @@ struct ath11k_generic_iter {
#define WMI_MAX_SPATIAL_STREAM 3 #define WMI_MAX_SPATIAL_STREAM 3
#define ATH11K_CHAN_WIDTH_NUM 8 #define ATH11K_CHAN_WIDTH_NUM 8
#define ATH11K_BW_NSS_MAP_ENABLE BIT(31)
#define ATH11K_PEER_RX_NSS_160MHZ GENMASK(2, 0)
#define ATH11K_PEER_RX_NSS_80_80MHZ GENMASK(5, 3)
#define ATH11K_OBSS_PD_MAX_THRESHOLD -82 #define ATH11K_OBSS_PD_MAX_THRESHOLD -82
#define ATH11K_OBSS_PD_NON_SRG_MAX_THRESHOLD -62 #define ATH11K_OBSS_PD_NON_SRG_MAX_THRESHOLD -62
......
...@@ -430,6 +430,8 @@ static void ath11k_pci_force_wake(struct ath11k_base *ab) ...@@ -430,6 +430,8 @@ static void ath11k_pci_force_wake(struct ath11k_base *ab)
static void ath11k_pci_sw_reset(struct ath11k_base *ab, bool power_on) static void ath11k_pci_sw_reset(struct ath11k_base *ab, bool power_on)
{ {
mdelay(100);
if (power_on) { if (power_on) {
ath11k_pci_enable_ltssm(ab); ath11k_pci_enable_ltssm(ab);
ath11k_pci_clear_all_intrs(ab); ath11k_pci_clear_all_intrs(ab);
...@@ -439,9 +441,9 @@ static void ath11k_pci_sw_reset(struct ath11k_base *ab, bool power_on) ...@@ -439,9 +441,9 @@ static void ath11k_pci_sw_reset(struct ath11k_base *ab, bool power_on)
} }
ath11k_mhi_clear_vector(ab); ath11k_mhi_clear_vector(ab);
ath11k_pci_clear_dbg_registers(ab);
ath11k_pci_soc_global_reset(ab); ath11k_pci_soc_global_reset(ab);
ath11k_mhi_set_mhictrl_reset(ab); ath11k_mhi_set_mhictrl_reset(ab);
ath11k_pci_clear_dbg_registers(ab);
} }
int ath11k_pci_get_msi_irq(struct device *dev, unsigned int vector) int ath11k_pci_get_msi_irq(struct device *dev, unsigned int vector)
......
...@@ -251,6 +251,7 @@ int ath11k_peer_create(struct ath11k *ar, struct ath11k_vif *arvif, ...@@ -251,6 +251,7 @@ int ath11k_peer_create(struct ath11k *ar, struct ath11k_vif *arvif,
struct ieee80211_sta *sta, struct peer_create_params *param) struct ieee80211_sta *sta, struct peer_create_params *param)
{ {
struct ath11k_peer *peer; struct ath11k_peer *peer;
struct ath11k_sta *arsta;
int ret; int ret;
lockdep_assert_held(&ar->conf_mutex); lockdep_assert_held(&ar->conf_mutex);
...@@ -319,6 +320,16 @@ int ath11k_peer_create(struct ath11k *ar, struct ath11k_vif *arvif, ...@@ -319,6 +320,16 @@ int ath11k_peer_create(struct ath11k *ar, struct ath11k_vif *arvif,
peer->sec_type = HAL_ENCRYPT_TYPE_OPEN; peer->sec_type = HAL_ENCRYPT_TYPE_OPEN;
peer->sec_type_grp = HAL_ENCRYPT_TYPE_OPEN; peer->sec_type_grp = HAL_ENCRYPT_TYPE_OPEN;
if (sta) {
arsta = (struct ath11k_sta *)sta->drv_priv;
arsta->tcl_metadata |= FIELD_PREP(HTT_TCL_META_DATA_TYPE, 0) |
FIELD_PREP(HTT_TCL_META_DATA_PEER_ID,
peer->peer_id);
/* set HTT extension valid bit to 0 by default */
arsta->tcl_metadata &= ~HTT_TCL_META_DATA_VALID_HTT;
}
ar->num_peers++; ar->num_peers++;
spin_unlock_bh(&ar->ab->base_lock); spin_unlock_bh(&ar->ab->base_lock);
......
This diff is collapsed.
...@@ -10,11 +10,9 @@ ...@@ -10,11 +10,9 @@
#include <linux/soc/qcom/qmi.h> #include <linux/soc/qcom/qmi.h>
#define ATH11K_HOST_VERSION_STRING "WIN" #define ATH11K_HOST_VERSION_STRING "WIN"
#define ATH11K_QMI_WLANFW_TIMEOUT_MS 5000 #define ATH11K_QMI_WLANFW_TIMEOUT_MS 10000
#define ATH11K_QMI_MAX_BDF_FILE_NAME_SIZE 64 #define ATH11K_QMI_MAX_BDF_FILE_NAME_SIZE 64
#define ATH11K_QMI_CALDB_ADDRESS 0x4BA00000 #define ATH11K_QMI_CALDB_ADDRESS 0x4BA00000
#define ATH11K_QMI_BDF_MAX_SIZE (256 * 1024)
#define ATH11K_QMI_CALDATA_OFFSET (128 * 1024)
#define ATH11K_QMI_WLANFW_MAX_BUILD_ID_LEN_V01 128 #define ATH11K_QMI_WLANFW_MAX_BUILD_ID_LEN_V01 128
#define ATH11K_QMI_WLFW_SERVICE_ID_V01 0x45 #define ATH11K_QMI_WLFW_SERVICE_ID_V01 0x45
#define ATH11K_QMI_WLFW_SERVICE_VERS_V01 0x01 #define ATH11K_QMI_WLFW_SERVICE_VERS_V01 0x01
...@@ -44,6 +42,7 @@ struct ath11k_base; ...@@ -44,6 +42,7 @@ struct ath11k_base;
enum ath11k_qmi_file_type { enum ath11k_qmi_file_type {
ATH11K_QMI_FILE_TYPE_BDF_GOLDEN, ATH11K_QMI_FILE_TYPE_BDF_GOLDEN,
ATH11K_QMI_FILE_TYPE_CALDATA, ATH11K_QMI_FILE_TYPE_CALDATA,
ATH11K_QMI_FILE_TYPE_EEPROM,
ATH11K_QMI_MAX_FILE_TYPE, ATH11K_QMI_MAX_FILE_TYPE,
}; };
...@@ -104,6 +103,7 @@ struct target_info { ...@@ -104,6 +103,7 @@ struct target_info {
u32 board_id; u32 board_id;
u32 soc_id; u32 soc_id;
u32 fw_version; u32 fw_version;
u32 eeprom_caldata;
char fw_build_timestamp[ATH11K_QMI_WLANFW_MAX_TIMESTAMP_LEN_V01 + 1]; char fw_build_timestamp[ATH11K_QMI_WLANFW_MAX_TIMESTAMP_LEN_V01 + 1];
char fw_build_id[ATH11K_QMI_WLANFW_MAX_BUILD_ID_LEN_V01 + 1]; char fw_build_id[ATH11K_QMI_WLANFW_MAX_BUILD_ID_LEN_V01 + 1];
char bdf_ext[ATH11K_QMI_BDF_EXT_STR_LENGTH]; char bdf_ext[ATH11K_QMI_BDF_EXT_STR_LENGTH];
...@@ -135,7 +135,7 @@ struct ath11k_qmi { ...@@ -135,7 +135,7 @@ struct ath11k_qmi {
wait_queue_head_t cold_boot_waitq; wait_queue_head_t cold_boot_waitq;
}; };
#define QMI_WLANFW_HOST_CAP_REQ_MSG_V01_MAX_LEN 189 #define QMI_WLANFW_HOST_CAP_REQ_MSG_V01_MAX_LEN 261
#define QMI_WLANFW_HOST_CAP_REQ_V01 0x0034 #define QMI_WLANFW_HOST_CAP_REQ_V01 0x0034
#define QMI_WLANFW_HOST_CAP_RESP_MSG_V01_MAX_LEN 7 #define QMI_WLANFW_HOST_CAP_RESP_MSG_V01_MAX_LEN 7
#define QMI_WLFW_HOST_CAP_RESP_V01 0x0034 #define QMI_WLFW_HOST_CAP_RESP_V01 0x0034
...@@ -285,7 +285,7 @@ struct qmi_wlanfw_fw_cold_cal_done_ind_msg_v01 { ...@@ -285,7 +285,7 @@ struct qmi_wlanfw_fw_cold_cal_done_ind_msg_v01 {
}; };
#define QMI_WLANFW_CAP_REQ_MSG_V01_MAX_LEN 0 #define QMI_WLANFW_CAP_REQ_MSG_V01_MAX_LEN 0
#define QMI_WLANFW_CAP_RESP_MSG_V01_MAX_LEN 207 #define QMI_WLANFW_CAP_RESP_MSG_V01_MAX_LEN 235
#define QMI_WLANFW_CAP_REQ_V01 0x0024 #define QMI_WLANFW_CAP_REQ_V01 0x0024
#define QMI_WLANFW_CAP_RESP_V01 0x0024 #define QMI_WLANFW_CAP_RESP_V01 0x0024
...@@ -366,6 +366,14 @@ struct qmi_wlanfw_cap_resp_msg_v01 { ...@@ -366,6 +366,14 @@ struct qmi_wlanfw_cap_resp_msg_v01 {
char fw_build_id[ATH11K_QMI_WLANFW_MAX_BUILD_ID_LEN_V01 + 1]; char fw_build_id[ATH11K_QMI_WLANFW_MAX_BUILD_ID_LEN_V01 + 1];
u8 num_macs_valid; u8 num_macs_valid;
u8 num_macs; u8 num_macs;
u8 voltage_mv_valid;
u32 voltage_mv;
u8 time_freq_hz_valid;
u32 time_freq_hz;
u8 otp_version_valid;
u32 otp_version;
u8 eeprom_read_timeout_valid;
u32 eeprom_read_timeout;
}; };
struct qmi_wlanfw_cap_req_msg_v01 { struct qmi_wlanfw_cap_req_msg_v01 {
......
...@@ -97,7 +97,6 @@ int ath11k_reg_update_chan_list(struct ath11k *ar) ...@@ -97,7 +97,6 @@ int ath11k_reg_update_chan_list(struct ath11k *ar)
struct channel_param *ch; struct channel_param *ch;
enum nl80211_band band; enum nl80211_band band;
int num_channels = 0; int num_channels = 0;
int params_len;
int i, ret; int i, ret;
bands = hw->wiphy->bands; bands = hw->wiphy->bands;
...@@ -117,10 +116,8 @@ int ath11k_reg_update_chan_list(struct ath11k *ar) ...@@ -117,10 +116,8 @@ int ath11k_reg_update_chan_list(struct ath11k *ar)
if (WARN_ON(!num_channels)) if (WARN_ON(!num_channels))
return -EINVAL; return -EINVAL;
params_len = sizeof(struct scan_chan_list_params) + params = kzalloc(struct_size(params, ch_param, num_channels),
num_channels * sizeof(struct channel_param); GFP_KERNEL);
params = kzalloc(params_len, GFP_KERNEL);
if (!params) if (!params)
return -ENOMEM; return -ENOMEM;
...@@ -198,7 +195,7 @@ static void ath11k_copy_regd(struct ieee80211_regdomain *regd_orig, ...@@ -198,7 +195,7 @@ static void ath11k_copy_regd(struct ieee80211_regdomain *regd_orig,
sizeof(struct ieee80211_reg_rule)); sizeof(struct ieee80211_reg_rule));
} }
int ath11k_regd_update(struct ath11k *ar, bool init) int ath11k_regd_update(struct ath11k *ar)
{ {
struct ieee80211_regdomain *regd, *regd_copy = NULL; struct ieee80211_regdomain *regd, *regd_copy = NULL;
int ret, regd_len, pdev_id; int ret, regd_len, pdev_id;
...@@ -209,7 +206,10 @@ int ath11k_regd_update(struct ath11k *ar, bool init) ...@@ -209,7 +206,10 @@ int ath11k_regd_update(struct ath11k *ar, bool init)
spin_lock_bh(&ab->base_lock); spin_lock_bh(&ab->base_lock);
if (init) { /* Prefer the latest regd update over default if it's available */
if (ab->new_regd[pdev_id]) {
regd = ab->new_regd[pdev_id];
} else {
/* Apply the regd received during init through /* Apply the regd received during init through
* WMI_REG_CHAN_LIST_CC event. In case of failure to * WMI_REG_CHAN_LIST_CC event. In case of failure to
* receive the regd, initialize with a default world * receive the regd, initialize with a default world
...@@ -222,8 +222,6 @@ int ath11k_regd_update(struct ath11k *ar, bool init) ...@@ -222,8 +222,6 @@ int ath11k_regd_update(struct ath11k *ar, bool init)
"failed to receive default regd during init\n"); "failed to receive default regd during init\n");
regd = (struct ieee80211_regdomain *)&ath11k_world_regd; regd = (struct ieee80211_regdomain *)&ath11k_world_regd;
} }
} else {
regd = ab->new_regd[pdev_id];
} }
if (!regd) { if (!regd) {
...@@ -683,7 +681,7 @@ void ath11k_regd_update_work(struct work_struct *work) ...@@ -683,7 +681,7 @@ void ath11k_regd_update_work(struct work_struct *work)
regd_update_work); regd_update_work);
int ret; int ret;
ret = ath11k_regd_update(ar, false); ret = ath11k_regd_update(ar);
if (ret) { if (ret) {
/* Firmware has already moved to the new regd. We need /* Firmware has already moved to the new regd. We need
* to maintain channel consistency across FW, Host driver * to maintain channel consistency across FW, Host driver
......
...@@ -31,6 +31,6 @@ void ath11k_regd_update_work(struct work_struct *work); ...@@ -31,6 +31,6 @@ void ath11k_regd_update_work(struct work_struct *work);
struct ieee80211_regdomain * struct ieee80211_regdomain *
ath11k_reg_build_regd(struct ath11k_base *ab, ath11k_reg_build_regd(struct ath11k_base *ab,
struct cur_regulatory_info *reg_info, bool intersect); struct cur_regulatory_info *reg_info, bool intersect);
int ath11k_regd_update(struct ath11k *ar, bool init); int ath11k_regd_update(struct ath11k *ar);
int ath11k_reg_update_chan_list(struct ath11k *ar); int ath11k_reg_update_chan_list(struct ath11k *ar);
#endif #endif
...@@ -11,22 +11,20 @@ ...@@ -11,22 +11,20 @@
#define ATH11K_SPECTRAL_EVENT_TIMEOUT_MS 1 #define ATH11K_SPECTRAL_EVENT_TIMEOUT_MS 1
#define ATH11K_SPECTRAL_DWORD_SIZE 4 #define ATH11K_SPECTRAL_DWORD_SIZE 4
/* HW bug, expected BIN size is 2 bytes but HW report as 4 bytes */ #define ATH11K_SPECTRAL_MIN_BINS 32
#define ATH11K_SPECTRAL_BIN_SIZE 4 #define ATH11K_SPECTRAL_MIN_IB_BINS (ATH11K_SPECTRAL_MIN_BINS >> 1)
#define ATH11K_SPECTRAL_ATH11K_MIN_BINS 64 #define ATH11K_SPECTRAL_MAX_IB_BINS(x) ((x)->hw_params.spectral.max_fft_bins >> 1)
#define ATH11K_SPECTRAL_ATH11K_MIN_IB_BINS 32
#define ATH11K_SPECTRAL_ATH11K_MAX_IB_BINS 256
#define ATH11K_SPECTRAL_SCAN_COUNT_MAX 4095 #define ATH11K_SPECTRAL_SCAN_COUNT_MAX 4095
/* Max channel computed by sum of 2g and 5g band channels */ /* Max channel computed by sum of 2g and 5g band channels */
#define ATH11K_SPECTRAL_TOTAL_CHANNEL 41 #define ATH11K_SPECTRAL_TOTAL_CHANNEL 41
#define ATH11K_SPECTRAL_SAMPLES_PER_CHANNEL 70 #define ATH11K_SPECTRAL_SAMPLES_PER_CHANNEL 70
#define ATH11K_SPECTRAL_PER_SAMPLE_SIZE (sizeof(struct fft_sample_ath11k) + \ #define ATH11K_SPECTRAL_PER_SAMPLE_SIZE(x) (sizeof(struct fft_sample_ath11k) + \
ATH11K_SPECTRAL_ATH11K_MAX_IB_BINS) ATH11K_SPECTRAL_MAX_IB_BINS(x))
#define ATH11K_SPECTRAL_TOTAL_SAMPLE (ATH11K_SPECTRAL_TOTAL_CHANNEL * \ #define ATH11K_SPECTRAL_TOTAL_SAMPLE (ATH11K_SPECTRAL_TOTAL_CHANNEL * \
ATH11K_SPECTRAL_SAMPLES_PER_CHANNEL) ATH11K_SPECTRAL_SAMPLES_PER_CHANNEL)
#define ATH11K_SPECTRAL_SUB_BUFF_SIZE ATH11K_SPECTRAL_PER_SAMPLE_SIZE #define ATH11K_SPECTRAL_SUB_BUFF_SIZE(x) ATH11K_SPECTRAL_PER_SAMPLE_SIZE(x)
#define ATH11K_SPECTRAL_NUM_SUB_BUF ATH11K_SPECTRAL_TOTAL_SAMPLE #define ATH11K_SPECTRAL_NUM_SUB_BUF ATH11K_SPECTRAL_TOTAL_SAMPLE
#define ATH11K_SPECTRAL_20MHZ 20 #define ATH11K_SPECTRAL_20MHZ 20
...@@ -444,8 +442,8 @@ static ssize_t ath11k_write_file_spectral_bins(struct file *file, ...@@ -444,8 +442,8 @@ static ssize_t ath11k_write_file_spectral_bins(struct file *file,
if (kstrtoul(buf, 0, &val)) if (kstrtoul(buf, 0, &val))
return -EINVAL; return -EINVAL;
if (val < ATH11K_SPECTRAL_ATH11K_MIN_BINS || if (val < ATH11K_SPECTRAL_MIN_BINS ||
val > SPECTRAL_ATH11K_MAX_NUM_BINS) val > ar->ab->hw_params.spectral.max_fft_bins)
return -EINVAL; return -EINVAL;
if (!is_power_of_2(val)) if (!is_power_of_2(val))
...@@ -581,12 +579,12 @@ int ath11k_spectral_process_fft(struct ath11k *ar, ...@@ -581,12 +579,12 @@ int ath11k_spectral_process_fft(struct ath11k *ar,
struct spectral_tlv *tlv; struct spectral_tlv *tlv;
int tlv_len, bin_len, num_bins; int tlv_len, bin_len, num_bins;
u16 length, freq; u16 length, freq;
u8 chan_width_mhz; u8 chan_width_mhz, bin_sz;
int ret; int ret;
lockdep_assert_held(&ar->spectral.lock); lockdep_assert_held(&ar->spectral.lock);
if (!ab->hw_params.spectral_fft_sz) { if (!ab->hw_params.spectral.fft_sz) {
ath11k_warn(ab, "invalid bin size type for hw rev %d\n", ath11k_warn(ab, "invalid bin size type for hw rev %d\n",
ab->hw_rev); ab->hw_rev);
return -EINVAL; return -EINVAL;
...@@ -596,7 +594,7 @@ int ath11k_spectral_process_fft(struct ath11k *ar, ...@@ -596,7 +594,7 @@ int ath11k_spectral_process_fft(struct ath11k *ar,
tlv_len = FIELD_GET(SPECTRAL_TLV_HDR_LEN, __le32_to_cpu(tlv->header)); tlv_len = FIELD_GET(SPECTRAL_TLV_HDR_LEN, __le32_to_cpu(tlv->header));
/* convert Dword into bytes */ /* convert Dword into bytes */
tlv_len *= ATH11K_SPECTRAL_DWORD_SIZE; tlv_len *= ATH11K_SPECTRAL_DWORD_SIZE;
bin_len = tlv_len - (sizeof(*fft_report) - sizeof(*tlv)); bin_len = tlv_len - ab->hw_params.spectral.fft_hdr_len;
if (data_len < (bin_len + sizeof(*fft_report))) { if (data_len < (bin_len + sizeof(*fft_report))) {
ath11k_warn(ab, "mismatch in expected bin len %d and data len %d\n", ath11k_warn(ab, "mismatch in expected bin len %d and data len %d\n",
...@@ -604,12 +602,13 @@ int ath11k_spectral_process_fft(struct ath11k *ar, ...@@ -604,12 +602,13 @@ int ath11k_spectral_process_fft(struct ath11k *ar,
return -EINVAL; return -EINVAL;
} }
num_bins = bin_len / ATH11K_SPECTRAL_BIN_SIZE; bin_sz = ab->hw_params.spectral.fft_sz + ab->hw_params.spectral.fft_pad_sz;
num_bins = bin_len / bin_sz;
/* Only In-band bins are useful to user for visualize */ /* Only In-band bins are useful to user for visualize */
num_bins >>= 1; num_bins >>= 1;
if (num_bins < ATH11K_SPECTRAL_ATH11K_MIN_IB_BINS || if (num_bins < ATH11K_SPECTRAL_MIN_IB_BINS ||
num_bins > ATH11K_SPECTRAL_ATH11K_MAX_IB_BINS || num_bins > ATH11K_SPECTRAL_MAX_IB_BINS(ab) ||
!is_power_of_2(num_bins)) { !is_power_of_2(num_bins)) {
ath11k_warn(ab, "Invalid num of bins %d\n", num_bins); ath11k_warn(ab, "Invalid num of bins %d\n", num_bins);
return -EINVAL; return -EINVAL;
...@@ -654,7 +653,7 @@ int ath11k_spectral_process_fft(struct ath11k *ar, ...@@ -654,7 +653,7 @@ int ath11k_spectral_process_fft(struct ath11k *ar,
fft_sample->freq2 = __cpu_to_be16(freq); fft_sample->freq2 = __cpu_to_be16(freq);
ath11k_spectral_parse_fft(fft_sample->data, fft_report->bins, num_bins, ath11k_spectral_parse_fft(fft_sample->data, fft_report->bins, num_bins,
ab->hw_params.spectral_fft_sz); ab->hw_params.spectral.fft_sz);
fft_sample->max_exp = ath11k_spectral_get_max_exp(fft_sample->max_index, fft_sample->max_exp = ath11k_spectral_get_max_exp(fft_sample->max_index,
search.peak_mag, search.peak_mag,
...@@ -690,7 +689,7 @@ static int ath11k_spectral_process_data(struct ath11k *ar, ...@@ -690,7 +689,7 @@ static int ath11k_spectral_process_data(struct ath11k *ar,
goto unlock; goto unlock;
} }
sample_sz = sizeof(*fft_sample) + ATH11K_SPECTRAL_ATH11K_MAX_IB_BINS; sample_sz = sizeof(*fft_sample) + ATH11K_SPECTRAL_MAX_IB_BINS(ab);
fft_sample = kmalloc(sample_sz, GFP_ATOMIC); fft_sample = kmalloc(sample_sz, GFP_ATOMIC);
if (!fft_sample) { if (!fft_sample) {
ret = -ENOBUFS; ret = -ENOBUFS;
...@@ -738,7 +737,8 @@ static int ath11k_spectral_process_data(struct ath11k *ar, ...@@ -738,7 +737,8 @@ static int ath11k_spectral_process_data(struct ath11k *ar,
* is 4 DWORD size (16 bytes). * is 4 DWORD size (16 bytes).
* Need to remove this workaround once HW bug fixed * Need to remove this workaround once HW bug fixed
*/ */
tlv_len = sizeof(*summary) - sizeof(*tlv); tlv_len = sizeof(*summary) - sizeof(*tlv) +
ab->hw_params.spectral.summary_pad_sz;
if (tlv_len < (sizeof(*summary) - sizeof(*tlv))) { if (tlv_len < (sizeof(*summary) - sizeof(*tlv))) {
ath11k_warn(ab, "failed to parse spectral summary at bytes %d tlv_len:%d\n", ath11k_warn(ab, "failed to parse spectral summary at bytes %d tlv_len:%d\n",
...@@ -901,7 +901,7 @@ static inline int ath11k_spectral_debug_register(struct ath11k *ar) ...@@ -901,7 +901,7 @@ static inline int ath11k_spectral_debug_register(struct ath11k *ar)
ar->spectral.rfs_scan = relay_open("spectral_scan", ar->spectral.rfs_scan = relay_open("spectral_scan",
ar->debug.debugfs_pdev, ar->debug.debugfs_pdev,
ATH11K_SPECTRAL_SUB_BUFF_SIZE, ATH11K_SPECTRAL_SUB_BUFF_SIZE(ar->ab),
ATH11K_SPECTRAL_NUM_SUB_BUF, ATH11K_SPECTRAL_NUM_SUB_BUF,
&rfs_scan_cb, NULL); &rfs_scan_cb, NULL);
if (!ar->spectral.rfs_scan) { if (!ar->spectral.rfs_scan) {
...@@ -962,7 +962,7 @@ int ath11k_spectral_init(struct ath11k_base *ab) ...@@ -962,7 +962,7 @@ int ath11k_spectral_init(struct ath11k_base *ab)
ab->wmi_ab.svc_map)) ab->wmi_ab.svc_map))
return 0; return 0;
if (!ab->hw_params.spectral_fft_sz) if (!ab->hw_params.spectral.fft_sz)
return 0; return 0;
for (i = 0; i < ab->num_radios; i++) { for (i = 0; i < ab->num_radios; i++) {
......
...@@ -79,14 +79,15 @@ TRACE_EVENT(ath11k_htt_ppdu_stats, ...@@ -79,14 +79,15 @@ TRACE_EVENT(ath11k_htt_ppdu_stats,
); );
TRACE_EVENT(ath11k_htt_rxdesc, TRACE_EVENT(ath11k_htt_rxdesc,
TP_PROTO(struct ath11k *ar, const void *data, size_t len), TP_PROTO(struct ath11k *ar, const void *data, size_t log_type, size_t len),
TP_ARGS(ar, data, len), TP_ARGS(ar, data, log_type, len),
TP_STRUCT__entry( TP_STRUCT__entry(
__string(device, dev_name(ar->ab->dev)) __string(device, dev_name(ar->ab->dev))
__string(driver, dev_driver_string(ar->ab->dev)) __string(driver, dev_driver_string(ar->ab->dev))
__field(u16, len) __field(u16, len)
__field(u16, log_type)
__dynamic_array(u8, rxdesc, len) __dynamic_array(u8, rxdesc, len)
), ),
...@@ -94,14 +95,16 @@ TRACE_EVENT(ath11k_htt_rxdesc, ...@@ -94,14 +95,16 @@ TRACE_EVENT(ath11k_htt_rxdesc,
__assign_str(device, dev_name(ar->ab->dev)); __assign_str(device, dev_name(ar->ab->dev));
__assign_str(driver, dev_driver_string(ar->ab->dev)); __assign_str(driver, dev_driver_string(ar->ab->dev));
__entry->len = len; __entry->len = len;
__entry->log_type = log_type;
memcpy(__get_dynamic_array(rxdesc), data, len); memcpy(__get_dynamic_array(rxdesc), data, len);
), ),
TP_printk( TP_printk(
"%s %s rxdesc len %d", "%s %s rxdesc len %d type %d",
__get_str(driver), __get_str(driver),
__get_str(device), __get_str(device),
__entry->len __entry->len,
__entry->log_type
) )
); );
......
This diff is collapsed.
...@@ -119,6 +119,22 @@ enum { ...@@ -119,6 +119,22 @@ enum {
WMI_HOST_WLAN_2G_5G_CAP = 0x3, WMI_HOST_WLAN_2G_5G_CAP = 0x3,
}; };
/* Parameters used for WMI_VDEV_PARAM_AUTORATE_MISC_CFG command.
* Used only for HE auto rate mode.
*/
enum {
/* HE LTF related configuration */
WMI_HE_AUTORATE_LTF_1X = BIT(0),
WMI_HE_AUTORATE_LTF_2X = BIT(1),
WMI_HE_AUTORATE_LTF_4X = BIT(2),
/* HE GI related configuration */
WMI_AUTORATE_400NS_GI = BIT(8),
WMI_AUTORATE_800NS_GI = BIT(9),
WMI_AUTORATE_1600NS_GI = BIT(10),
WMI_AUTORATE_3200NS_GI = BIT(11),
};
/* /*
* wmi command groups. * wmi command groups.
*/ */
...@@ -647,6 +663,9 @@ enum wmi_tlv_event_id { ...@@ -647,6 +663,9 @@ enum wmi_tlv_event_id {
WMI_PEER_RESERVED9_EVENTID, WMI_PEER_RESERVED9_EVENTID,
WMI_PEER_RESERVED10_EVENTID, WMI_PEER_RESERVED10_EVENTID,
WMI_PEER_OPER_MODE_CHANGE_EVENTID, WMI_PEER_OPER_MODE_CHANGE_EVENTID,
WMI_PEER_TX_PN_RESPONSE_EVENTID,
WMI_PEER_CFR_CAPTURE_EVENTID,
WMI_PEER_CREATE_CONF_EVENTID,
WMI_MGMT_RX_EVENTID = WMI_TLV_CMD(WMI_GRP_MGMT), WMI_MGMT_RX_EVENTID = WMI_TLV_CMD(WMI_GRP_MGMT),
WMI_HOST_SWBA_EVENTID, WMI_HOST_SWBA_EVENTID,
WMI_TBTTOFFSET_UPDATE_EVENTID, WMI_TBTTOFFSET_UPDATE_EVENTID,
...@@ -1044,7 +1063,9 @@ enum wmi_tlv_vdev_param { ...@@ -1044,7 +1063,9 @@ enum wmi_tlv_vdev_param {
WMI_VDEV_PARAM_HE_RANGE_EXT, WMI_VDEV_PARAM_HE_RANGE_EXT,
WMI_VDEV_PARAM_ENABLE_BCAST_PROBE_RESPONSE, WMI_VDEV_PARAM_ENABLE_BCAST_PROBE_RESPONSE,
WMI_VDEV_PARAM_FILS_MAX_CHANNEL_GUARD_TIME, WMI_VDEV_PARAM_FILS_MAX_CHANNEL_GUARD_TIME,
WMI_VDEV_PARAM_HE_LTF = 0x74,
WMI_VDEV_PARAM_BA_MODE = 0x7e, WMI_VDEV_PARAM_BA_MODE = 0x7e,
WMI_VDEV_PARAM_AUTORATE_MISC_CFG = 0x80,
WMI_VDEV_PARAM_SET_HE_SOUNDING_MODE = 0x87, WMI_VDEV_PARAM_SET_HE_SOUNDING_MODE = 0x87,
WMI_VDEV_PARAM_6GHZ_PARAMS = 0x99, WMI_VDEV_PARAM_6GHZ_PARAMS = 0x99,
WMI_VDEV_PARAM_PROTOTYPE = 0x8000, WMI_VDEV_PARAM_PROTOTYPE = 0x8000,
...@@ -2128,6 +2149,24 @@ enum wmi_direct_buffer_module { ...@@ -2128,6 +2149,24 @@ enum wmi_direct_buffer_module {
WMI_DIRECT_BUF_MAX WMI_DIRECT_BUF_MAX
}; };
/* enum wmi_nss_ratio - NSS ratio received from FW during service ready ext
* event
* WMI_NSS_RATIO_1BY2_NSS -Max nss of 160MHz is equals to half of the max nss
* of 80MHz
* WMI_NSS_RATIO_3BY4_NSS - Max nss of 160MHz is equals to 3/4 of the max nss
* of 80MHz
* WMI_NSS_RATIO_1_NSS - Max nss of 160MHz is equals to the max nss of 80MHz
* WMI_NSS_RATIO_2_NSS - Max nss of 160MHz is equals to two times the max
* nss of 80MHz
*/
enum wmi_nss_ratio {
WMI_NSS_RATIO_1BY2_NSS = 0x0,
WMI_NSS_RATIO_3BY4_NSS = 0x1,
WMI_NSS_RATIO_1_NSS = 0x2,
WMI_NSS_RATIO_2_NSS = 0x3,
};
struct wmi_host_pdev_band_to_mac { struct wmi_host_pdev_band_to_mac {
u32 pdev_id; u32 pdev_id;
u32 start_freq; u32 start_freq;
...@@ -2244,6 +2283,8 @@ struct wmi_init_cmd { ...@@ -2244,6 +2283,8 @@ struct wmi_init_cmd {
u32 num_host_mem_chunks; u32 num_host_mem_chunks;
} __packed; } __packed;
#define WMI_RSRC_CFG_FLAG1_BSS_CHANNEL_INFO_64 BIT(5)
struct wmi_resource_config { struct wmi_resource_config {
u32 tlv_header; u32 tlv_header;
u32 num_vdevs; u32 num_vdevs;
...@@ -2370,6 +2411,12 @@ struct wmi_hw_mode_capabilities { ...@@ -2370,6 +2411,12 @@ struct wmi_hw_mode_capabilities {
} __packed; } __packed;
#define WMI_MAX_HECAP_PHY_SIZE (3) #define WMI_MAX_HECAP_PHY_SIZE (3)
#define WMI_NSS_RATIO_ENABLE_DISABLE_BITPOS BIT(0)
#define WMI_NSS_RATIO_ENABLE_DISABLE_GET(_val) \
FIELD_GET(WMI_NSS_RATIO_ENABLE_DISABLE_BITPOS, _val)
#define WMI_NSS_RATIO_INFO_BITPOS GENMASK(4, 1)
#define WMI_NSS_RATIO_INFO_GET(_val) \
FIELD_GET(WMI_NSS_RATIO_INFO_BITPOS, _val)
struct wmi_mac_phy_capabilities { struct wmi_mac_phy_capabilities {
u32 hw_mode_id; u32 hw_mode_id;
...@@ -2403,6 +2450,12 @@ struct wmi_mac_phy_capabilities { ...@@ -2403,6 +2450,12 @@ struct wmi_mac_phy_capabilities {
u32 he_cap_info_2g_ext; u32 he_cap_info_2g_ext;
u32 he_cap_info_5g_ext; u32 he_cap_info_5g_ext;
u32 he_cap_info_internal; u32 he_cap_info_internal;
u32 wireless_modes;
u32 low_2ghz_chan_freq;
u32 high_2ghz_chan_freq;
u32 low_5ghz_chan_freq;
u32 high_5ghz_chan_freq;
u32 nss_ratio;
} __packed; } __packed;
struct wmi_hal_reg_capabilities_ext { struct wmi_hal_reg_capabilities_ext {
...@@ -2527,6 +2580,7 @@ struct wmi_vdev_down_cmd { ...@@ -2527,6 +2580,7 @@ struct wmi_vdev_down_cmd {
#define WMI_VDEV_START_HIDDEN_SSID BIT(0) #define WMI_VDEV_START_HIDDEN_SSID BIT(0)
#define WMI_VDEV_START_PMF_ENABLED BIT(1) #define WMI_VDEV_START_PMF_ENABLED BIT(1)
#define WMI_VDEV_START_LDPC_RX_ENABLED BIT(3) #define WMI_VDEV_START_LDPC_RX_ENABLED BIT(3)
#define WMI_VDEV_START_HW_ENCRYPTION_DISABLED BIT(4)
struct wmi_ssid { struct wmi_ssid {
u32 ssid_len; u32 ssid_len;
...@@ -2960,6 +3014,7 @@ struct wmi_pdev_bss_chan_info_req_cmd { ...@@ -2960,6 +3014,7 @@ struct wmi_pdev_bss_chan_info_req_cmd {
u32 tlv_header; u32 tlv_header;
/* ref wmi_bss_chan_info_req_type */ /* ref wmi_bss_chan_info_req_type */
u32 req_type; u32 req_type;
u32 pdev_id;
} __packed; } __packed;
struct wmi_ap_ps_peer_cmd { struct wmi_ap_ps_peer_cmd {
...@@ -3608,7 +3663,7 @@ struct wmi_stop_scan_cmd { ...@@ -3608,7 +3663,7 @@ struct wmi_stop_scan_cmd {
struct scan_chan_list_params { struct scan_chan_list_params {
u32 pdev_id; u32 pdev_id;
u16 nallchans; u16 nallchans;
struct channel_param ch_param[1]; struct channel_param ch_param[];
}; };
struct wmi_scan_chan_list_cmd { struct wmi_scan_chan_list_cmd {
...@@ -3917,7 +3972,11 @@ struct wmi_vht_rate_set { ...@@ -3917,7 +3972,11 @@ struct wmi_vht_rate_set {
struct wmi_he_rate_set { struct wmi_he_rate_set {
u32 tlv_header; u32 tlv_header;
/* MCS at which the peer can receive */
u32 rx_mcs_set; u32 rx_mcs_set;
/* MCS at which the peer can transmit */
u32 tx_mcs_set; u32 tx_mcs_set;
} __packed; } __packed;
...@@ -4056,7 +4115,6 @@ struct wmi_vdev_stopped_event { ...@@ -4056,7 +4115,6 @@ struct wmi_vdev_stopped_event {
} __packed; } __packed;
struct wmi_pdev_bss_chan_info_event { struct wmi_pdev_bss_chan_info_event {
u32 pdev_id;
u32 freq; /* Units in MHz */ u32 freq; /* Units in MHz */
u32 noise_floor; /* units are dBm */ u32 noise_floor; /* units are dBm */
/* rx clear - how often the channel was unused */ /* rx clear - how often the channel was unused */
...@@ -4074,6 +4132,7 @@ struct wmi_pdev_bss_chan_info_event { ...@@ -4074,6 +4132,7 @@ struct wmi_pdev_bss_chan_info_event {
/*rx_cycle cnt for my bss in 64bits format */ /*rx_cycle cnt for my bss in 64bits format */
u32 rx_bss_cycle_count_low; u32 rx_bss_cycle_count_low;
u32 rx_bss_cycle_count_high; u32 rx_bss_cycle_count_high;
u32 pdev_id;
} __packed; } __packed;
#define WMI_VDEV_INSTALL_KEY_COMPL_STATUS_SUCCESS 0 #define WMI_VDEV_INSTALL_KEY_COMPL_STATUS_SUCCESS 0
...@@ -4168,6 +4227,9 @@ struct wmi_pdev_stats_tx { ...@@ -4168,6 +4227,9 @@ struct wmi_pdev_stats_tx {
/* Num underruns */ /* Num underruns */
s32 underrun; s32 underrun;
/* Num hw paused */
u32 hw_paused;
/* Num PPDUs cleaned up in TX abort */ /* Num PPDUs cleaned up in TX abort */
s32 tx_abort; s32 tx_abort;
...@@ -4177,6 +4239,8 @@ struct wmi_pdev_stats_tx { ...@@ -4177,6 +4239,8 @@ struct wmi_pdev_stats_tx {
/* excessive retries */ /* excessive retries */
u32 tx_ko; u32 tx_ko;
u32 tx_xretry;
/* data hw rate code */ /* data hw rate code */
u32 data_rc; u32 data_rc;
...@@ -4206,6 +4270,40 @@ struct wmi_pdev_stats_tx { ...@@ -4206,6 +4270,40 @@ struct wmi_pdev_stats_tx {
/* MPDU is more than txop limit */ /* MPDU is more than txop limit */
u32 txop_ovf; u32 txop_ovf;
/* Num sequences posted */
u32 seq_posted;
/* Num sequences failed in queueing */
u32 seq_failed_queueing;
/* Num sequences completed */
u32 seq_completed;
/* Num sequences restarted */
u32 seq_restarted;
/* Num of MU sequences posted */
u32 mu_seq_posted;
/* Num MPDUs flushed by SW, HWPAUSED, SW TXABORT
* (Reset,channel change)
*/
s32 mpdus_sw_flush;
/* Num MPDUs filtered by HW, all filter condition (TTL expired) */
s32 mpdus_hw_filter;
/* Num MPDUs truncated by PDG (TXOP, TBTT,
* PPDU_duration based on rate, dyn_bw)
*/
s32 mpdus_truncated;
/* Num MPDUs that was tried but didn't receive ACK or BA */
s32 mpdus_ack_failed;
/* Num MPDUs that was dropped du to expiry. */
s32 mpdus_expired;
} __packed; } __packed;
struct wmi_pdev_stats_rx { struct wmi_pdev_stats_rx {
...@@ -4240,6 +4338,9 @@ struct wmi_pdev_stats_rx { ...@@ -4240,6 +4338,9 @@ struct wmi_pdev_stats_rx {
/* Number of mpdu errors - FCS, MIC, ENC etc. */ /* Number of mpdu errors - FCS, MIC, ENC etc. */
s32 mpdu_errs; s32 mpdu_errs;
/* Num overflow errors */
s32 rx_ovfl_errs;
} __packed; } __packed;
struct wmi_pdev_stats { struct wmi_pdev_stats {
...@@ -5014,7 +5115,7 @@ struct target_resource_config { ...@@ -5014,7 +5115,7 @@ struct target_resource_config {
u32 vo_minfree; u32 vo_minfree;
u32 rx_batchmode; u32 rx_batchmode;
u32 tt_support; u32 tt_support;
u32 atf_config; u32 flag1;
u32 iphdr_pad_config; u32 iphdr_pad_config;
u32 qwrap_config:16, u32 qwrap_config:16,
alloc_frag_desc_for_data_pkt:16; alloc_frag_desc_for_data_pkt:16;
......
...@@ -135,13 +135,23 @@ static bool ath9k_hw_nvram_read_firmware(const struct firmware *eeprom_blob, ...@@ -135,13 +135,23 @@ static bool ath9k_hw_nvram_read_firmware(const struct firmware *eeprom_blob,
offset, data); offset, data);
} }
static bool ath9k_hw_nvram_read_nvmem(struct ath_hw *ah, off_t offset,
u16 *data)
{
return ath9k_hw_nvram_read_array(ah->nvmem_blob,
ah->nvmem_blob_len / sizeof(u16),
offset, data);
}
bool ath9k_hw_nvram_read(struct ath_hw *ah, u32 off, u16 *data) bool ath9k_hw_nvram_read(struct ath_hw *ah, u32 off, u16 *data)
{ {
struct ath_common *common = ath9k_hw_common(ah); struct ath_common *common = ath9k_hw_common(ah);
struct ath9k_platform_data *pdata = ah->dev->platform_data; struct ath9k_platform_data *pdata = ah->dev->platform_data;
bool ret; bool ret;
if (ah->eeprom_blob) if (ah->nvmem_blob)
ret = ath9k_hw_nvram_read_nvmem(ah, off, data);
else if (ah->eeprom_blob)
ret = ath9k_hw_nvram_read_firmware(ah->eeprom_blob, off, data); ret = ath9k_hw_nvram_read_firmware(ah->eeprom_blob, off, data);
else if (pdata && !pdata->use_eeprom) else if (pdata && !pdata->use_eeprom)
ret = ath9k_hw_nvram_read_pdata(pdata, off, data); ret = ath9k_hw_nvram_read_pdata(pdata, off, data);
......
...@@ -977,6 +977,8 @@ struct ath_hw { ...@@ -977,6 +977,8 @@ struct ath_hw {
bool disable_5ghz; bool disable_5ghz;
const struct firmware *eeprom_blob; const struct firmware *eeprom_blob;
u16 *nvmem_blob; /* devres managed */
size_t nvmem_blob_len;
struct ath_dynack dynack; struct ath_dynack dynack;
......
This diff is collapsed.
...@@ -24,7 +24,6 @@ ...@@ -24,7 +24,6 @@
* could be acquired so far. * could be acquired so far.
*/ */
#define SPECTRAL_ATH10K_MAX_NUM_BINS 256 #define SPECTRAL_ATH10K_MAX_NUM_BINS 256
#define SPECTRAL_ATH11K_MAX_NUM_BINS 512
/* FFT sample format given to userspace via debugfs. /* FFT sample format given to userspace via debugfs.
* *
......
...@@ -120,7 +120,7 @@ static ssize_t write_file_dump(struct file *file, ...@@ -120,7 +120,7 @@ static ssize_t write_file_dump(struct file *file,
if (begin == NULL) if (begin == NULL)
break; break;
if (kstrtou32(begin, 0, &arg[i]) != 0) if (kstrtos32(begin, 0, &arg[i]) != 0)
break; break;
} }
......
...@@ -3384,11 +3384,11 @@ struct tl_hal_flush_ac_rsp_msg { ...@@ -3384,11 +3384,11 @@ struct tl_hal_flush_ac_rsp_msg {
struct wcn36xx_hal_enter_imps_req_msg { struct wcn36xx_hal_enter_imps_req_msg {
struct wcn36xx_hal_msg_header header; struct wcn36xx_hal_msg_header header;
}; } __packed;
struct wcn36xx_hal_exit_imps_req { struct wcn36xx_hal_exit_imps_req_msg {
struct wcn36xx_hal_msg_header header; struct wcn36xx_hal_msg_header header;
}; } __packed;
struct wcn36xx_hal_enter_bmps_req_msg { struct wcn36xx_hal_enter_bmps_req_msg {
struct wcn36xx_hal_msg_header header; struct wcn36xx_hal_msg_header header;
......
...@@ -432,6 +432,13 @@ static int wcn36xx_config(struct ieee80211_hw *hw, u32 changed) ...@@ -432,6 +432,13 @@ static int wcn36xx_config(struct ieee80211_hw *hw, u32 changed)
if (changed & IEEE80211_CONF_CHANGE_PS) if (changed & IEEE80211_CONF_CHANGE_PS)
wcn36xx_change_ps(wcn, hw->conf.flags & IEEE80211_CONF_PS); wcn36xx_change_ps(wcn, hw->conf.flags & IEEE80211_CONF_PS);
if (changed & IEEE80211_CONF_CHANGE_IDLE) {
if (hw->conf.flags & IEEE80211_CONF_IDLE)
wcn36xx_smd_enter_imps(wcn);
else
wcn36xx_smd_exit_imps(wcn);
}
mutex_unlock(&wcn->conf_mutex); mutex_unlock(&wcn->conf_mutex);
return 0; return 0;
...@@ -569,12 +576,14 @@ static int wcn36xx_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, ...@@ -569,12 +576,14 @@ static int wcn36xx_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
if (IEEE80211_KEY_FLAG_PAIRWISE & key_conf->flags) { if (IEEE80211_KEY_FLAG_PAIRWISE & key_conf->flags) {
sta_priv->is_data_encrypted = true; sta_priv->is_data_encrypted = true;
/* Reconfigure bss with encrypt_type */ /* Reconfigure bss with encrypt_type */
if (NL80211_IFTYPE_STATION == vif->type) if (NL80211_IFTYPE_STATION == vif->type) {
wcn36xx_smd_config_bss(wcn, wcn36xx_smd_config_bss(wcn,
vif, vif,
sta, sta,
sta->addr, sta->addr,
true); true);
wcn36xx_smd_config_sta(wcn, vif, sta);
}
wcn36xx_smd_set_stakey(wcn, wcn36xx_smd_set_stakey(wcn,
vif_priv->encrypt_type, vif_priv->encrypt_type,
......
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment