Commit 457e7466 authored by Lorenzo Bianconi's avatar Lorenzo Bianconi Committed by Stephen Boyd

clk: en7523: Add en_clk_soc_data data structure

Introduce en_clk_soc_data data structure in order to define multiple
clk_ops for each supported SoC. This is a preliminary patch to
introduce EN7581 clock support.
Tested-by: default avatarZhengping Zhang <zhengping.zhang@airoha.com>
Signed-off-by: default avatarLorenzo Bianconi <lorenzo@kernel.org>
Link: https://lore.kernel.org/r/562a0da8d7874a02a324687c152c87a1549924bd.1712399981.git.lorenzo@kernel.orgSigned-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent 0a382be0
...@@ -3,8 +3,8 @@ ...@@ -3,8 +3,8 @@
#include <linux/delay.h> #include <linux/delay.h>
#include <linux/clk-provider.h> #include <linux/clk-provider.h>
#include <linux/io.h> #include <linux/io.h>
#include <linux/of.h>
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include <linux/property.h>
#include <dt-bindings/clock/en7523-clk.h> #include <dt-bindings/clock/en7523-clk.h>
#define REG_PCI_CONTROL 0x88 #define REG_PCI_CONTROL 0x88
...@@ -47,6 +47,10 @@ struct en_clk_gate { ...@@ -47,6 +47,10 @@ struct en_clk_gate {
struct clk_hw hw; struct clk_hw hw;
}; };
struct en_clk_soc_data {
const struct clk_ops pcie_ops;
};
static const u32 gsw_base[] = { 400000000, 500000000 }; static const u32 gsw_base[] = { 400000000, 500000000 };
static const u32 emi_base[] = { 333000000, 400000000 }; static const u32 emi_base[] = { 333000000, 400000000 };
static const u32 bus_base[] = { 500000000, 540000000 }; static const u32 bus_base[] = { 500000000, 540000000 };
...@@ -145,11 +149,6 @@ static const struct en_clk_desc en7523_base_clks[] = { ...@@ -145,11 +149,6 @@ static const struct en_clk_desc en7523_base_clks[] = {
} }
}; };
static const struct of_device_id of_match_clk_en7523[] = {
{ .compatible = "airoha,en7523-scu", },
{ /* sentinel */ }
};
static unsigned int en7523_get_base_rate(void __iomem *base, unsigned int i) static unsigned int en7523_get_base_rate(void __iomem *base, unsigned int i)
{ {
const struct en_clk_desc *desc = &en7523_base_clks[i]; const struct en_clk_desc *desc = &en7523_base_clks[i];
...@@ -247,14 +246,10 @@ static void en7523_pci_unprepare(struct clk_hw *hw) ...@@ -247,14 +246,10 @@ static void en7523_pci_unprepare(struct clk_hw *hw)
static struct clk_hw *en7523_register_pcie_clk(struct device *dev, static struct clk_hw *en7523_register_pcie_clk(struct device *dev,
void __iomem *np_base) void __iomem *np_base)
{ {
static const struct clk_ops pcie_gate_ops = { const struct en_clk_soc_data *soc_data = device_get_match_data(dev);
.is_enabled = en7523_pci_is_enabled,
.prepare = en7523_pci_prepare,
.unprepare = en7523_pci_unprepare,
};
struct clk_init_data init = { struct clk_init_data init = {
.name = "pcie", .name = "pcie",
.ops = &pcie_gate_ops, .ops = &soc_data->pcie_ops,
}; };
struct en_clk_gate *cg; struct en_clk_gate *cg;
...@@ -264,7 +259,7 @@ static struct clk_hw *en7523_register_pcie_clk(struct device *dev, ...@@ -264,7 +259,7 @@ static struct clk_hw *en7523_register_pcie_clk(struct device *dev,
cg->base = np_base; cg->base = np_base;
cg->hw.init = &init; cg->hw.init = &init;
en7523_pci_unprepare(&cg->hw); init.ops->unprepare(&cg->hw);
if (clk_hw_register(dev, &cg->hw)) if (clk_hw_register(dev, &cg->hw))
return NULL; return NULL;
...@@ -333,6 +328,19 @@ static int en7523_clk_probe(struct platform_device *pdev) ...@@ -333,6 +328,19 @@ static int en7523_clk_probe(struct platform_device *pdev)
return r; return r;
} }
static const struct en_clk_soc_data en7523_data = {
.pcie_ops = {
.is_enabled = en7523_pci_is_enabled,
.prepare = en7523_pci_prepare,
.unprepare = en7523_pci_unprepare,
},
};
static const struct of_device_id of_match_clk_en7523[] = {
{ .compatible = "airoha,en7523-scu", .data = &en7523_data },
{ /* sentinel */ }
};
static struct platform_driver clk_en7523_drv = { static struct platform_driver clk_en7523_drv = {
.probe = en7523_clk_probe, .probe = en7523_clk_probe,
.driver = { .driver = {
......
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