ARM: dts: exynos: Add DT nodes for PRNG in Exynos5 SoCs

Add nodes for Pseudo Random Number Generator in dts files describing
Exynos5 chips.
Signed-off-by: Łukasz Stelmach <l.stelmach@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>

arch/arm/boot/dts/exynos5.dtsi

@@ -211,6 +211,11 @@ sss: sss@10830000 {
 			interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
 		};
 
+		prng: rng@10830400 {
+		      compatible = "samsung,exynos5250-prng";
+		      reg = <0x10830400 0x200>;
+		};
+
 		g2d: g2d@10850000 {
 			compatible = "samsung,exynos5250-g2d";
 			reg = <0x10850000 0x1000>;

arch/arm/boot/dts/exynos5250.dtsi

@@ -1061,6 +1061,11 @@ &i2c_3 {
 	pinctrl-0 = <&i2c3_bus>;
 };
 
+&prng {
+	clocks = <&clock CLK_SSS>;
+	clock-names = "secss";
+};
+
 &pwm {
 	clocks = <&clock CLK_PWM>;
 	clock-names = "timers";

arch/arm/boot/dts/exynos5410.dtsi

@@ -333,6 +333,11 @@ &mct {
 	clock-names = "fin_pll", "mct";
 };
 
+&prng {
+	clocks = <&clock CLK_SSS>;
+	clock-names = "secss";
+};
+
 &pwm {
 	clocks = <&clock CLK_PWM>;
 	clock-names = "timers";

arch/arm/boot/dts/exynos5420.dtsi

@@ -1429,6 +1429,11 @@ &mct {
 	clock-names = "fin_pll", "mct";
 };
 
+&prng {
+	clocks = <&clock CLK_SSS>;
+	clock-names = "secss";
+};
+
 &pwm {
 	clocks = <&clock CLK_PWM>;
 	clock-names = "timers";