Commit 4662d6e8 authored by Pierre Gondois's avatar Pierre Gondois Committed by Geert Uytterhoeven

arm64: dts: renesas: rzg2l: Add missing cache-level properties

The DeviceTree Specification v0.3 specifies that the cache node
'cache-level' property is 'required'.  Cf. s3.8 Multi-level and Shared
Cache Nodes.

Update the Device Trees accordingly.
Signed-off-by: default avatarPierre Gondois <pierre.gondois@arm.com>
Link: https://lore.kernel.org/r/20221107155825.1644604-19-pierre.gondois@arm.com
[geert: Update description]
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 40a6dd7b
......@@ -31,6 +31,7 @@ L3_CA55: cache-controller-0 {
compatible = "cache";
cache-unified;
cache-size = <0x40000>;
cache-level = <3>;
};
};
......
......@@ -109,6 +109,7 @@ L3_CA55: cache-controller-0 {
compatible = "cache";
cache-unified;
cache-size = <0x40000>;
cache-level = <3>;
};
};
......
......@@ -109,6 +109,7 @@ L3_CA55: cache-controller-0 {
compatible = "cache";
cache-unified;
cache-size = <0x40000>;
cache-level = <3>;
};
};
......
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