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Commit 4717a36f authored by Matthias Schiffer's avatar Matthias Schiffer Committed by Nishanth Menon
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arm64: dts: ti: Add TQ-Systems TQMa64XxL SoM and MBaX4XxL carrier board Device Trees 

The TQMa64XxL is an LGA SoM based on the TI AM64x SoC family. Add DTS(I)
for the AM642 (2x Cortex-A53) variant and its combination with our
MBaX4XxL carrier board.
Signed-off-by: default avatarMatthias Schiffer <matthias.schiffer@ew.tq-group.com>
Link: https://lore.kernel.org/r/2a635428c73b5ab0fe793e558db6b5d88edccf8c.1690463382.git.matthias.schiffer@ew.tq-group.comSigned-off-by: default avatarNishanth Menon <nm@ti.com>
parent ee1ada53
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arch/arm64/boot/dts/ti/Makefile
View file @ 4717a36f
......@@ -27,6 +27,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am62a7-sk.dtb
dtb-$(CONFIG_ARCH_K3) += k3-am642-evm.dtb
dtb-$(CONFIG_ARCH_K3) += k3-am642-phyboard-electra-rdk.dtb
dtb-$(CONFIG_ARCH_K3) += k3-am642-sk.dtb
dtb-$(CONFIG_ARCH_K3) += k3-am642-tqma64xxl-mbax4xxl.dtb
# Boards with AM65x SoC
k3-am654-gp-evm-dtbs := k3-am654-base-board.dtb k3-am654-base-board-rocktech-rk101-panel.dtbo
......
arch/arm64/boot/dts/ti/k3-am642-tqma64xxl-mbax4xxl.dts 0 → 100644
View file @ 4717a36f
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arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi 0 → 100644
View file @ 4717a36f
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
* Copyright (c) 2022-2023 TQ-Systems GmbH <linux@ew.tq-group.com>, D-82229 Seefeld, Germany.
*/
#include "k3-am642.dtsi"
/ {
aliases {
i2c0 = &main_i2c0;
mmc0 = &sdhci0;
spi0 = &ospi0;
};
memory@80000000 {
device_type = "memory";
/* 1G RAM - default variant */
reg = <0x00000000 0x80000000 0x00000000 0x40000000>;
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
secure_ddr: optee@9e800000 {
reg = <0x00 0x9e800000 0x00 0x01800000>;
alignment = <0x1000>;
no-map;
};
main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa0000000 0x00 0x100000>;
no-map;
};
main_r5fss0_core0_memory_region: r5f-memory@a0100000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa0100000 0x00 0xf00000>;
no-map;
};
main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa1000000 0x00 0x100000>;
no-map;
};
main_r5fss0_core1_memory_region: r5f-memory@a1100000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa1100000 0x00 0xf00000>;
no-map;
};
main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a2000000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa2000000 0x00 0x100000>;
no-map;
};
main_r5fss1_core0_memory_region: r5f-memory@a2100000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa2100000 0x00 0xf00000>;
no-map;
};
main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a3000000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa3000000 0x00 0x100000>;
no-map;
};
main_r5fss1_core1_memory_region: r5f-memory@a3100000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa3100000 0x00 0xf00000>;
no-map;
};
rtos_ipc_memory_region: ipc-memories@a5000000 {
reg = <0x00 0xa5000000 0x00 0x00800000>;
alignment = <0x1000>;
no-map;
};
};
};
&main_i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&main_i2c0_pins>;
clock-frequency = <400000>;
status = "okay";
tmp1075: temperature-sensor@4a {
compatible = "ti,tmp1075";
reg = <0x4a>;
};
eeprom0: eeprom@50 {
compatible = "st,24c02", "atmel,24c02";
reg = <0x50>;
pagesize = <16>;
read-only;
};
pcf85063: rtc@51 {
compatible = "nxp,pcf85063a";
reg = <0x51>;
quartz-load-femtofarads = <12500>;
};
eeprom1: eeprom@54 {
compatible = "st,24c64", "atmel,24c64";
reg = <0x54>;
pagesize = <32>;
};
};
&mailbox0_cluster2 {
status = "okay";
mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
ti,mbox-rx = <0 0 2>;
ti,mbox-tx = <1 0 2>;
};
mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
ti,mbox-rx = <2 0 2>;
ti,mbox-tx = <3 0 2>;
};
};
&mailbox0_cluster4 {
status = "okay";
mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
ti,mbox-rx = <0 0 2>;
ti,mbox-tx = <1 0 2>;
};
mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
ti,mbox-rx = <2 0 2>;
ti,mbox-tx = <3 0 2>;
};
};
&mailbox0_cluster6 {
status = "okay";
mbox_m4_0: mbox-m4-0 {
ti,mbox-rx = <0 0 2>;
ti,mbox-tx = <1 0 2>;
};
};
&main_r5fss0_core0 {
mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>;
memory-region = <&main_r5fss0_core0_dma_memory_region>,
<&main_r5fss0_core0_memory_region>;
};
&main_r5fss0_core1 {
mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>;
memory-region = <&main_r5fss0_core1_dma_memory_region>,
<&main_r5fss0_core1_memory_region>;
};
&main_r5fss1_core0 {
mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>;
memory-region = <&main_r5fss1_core0_dma_memory_region>,
<&main_r5fss1_core0_memory_region>;
};
&main_r5fss1_core1 {
mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>;
memory-region = <&main_r5fss1_core1_dma_memory_region>,
<&main_r5fss1_core1_memory_region>;
};
&ospi0 {
pinctrl-names = "default";
pinctrl-0 = <&ospi0_pins>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-tx-bus-width = <8>;
spi-rx-bus-width = <8>;
spi-max-frequency = <84000000>;
cdns,tshsl-ns = <60>;
cdns,tsd2d-ns = <60>;
cdns,tchsh-ns = <60>;
cdns,tslch-ns = <60>;
cdns,read-delay = <2>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/* Filled by bootloader */
};
};
};
&sdhci0 {
non-removable;
disable-wp;
no-sdio;
no-sd;
ti,driver-strength-ohm = <50>;
};
&main_pmx0 {
main_i2c0_pins: main-i2c0-pins {
pinctrl-single,pins = <
/* (A18) I2C0_SCL */
AM64X_IOPAD(0x0260, PIN_INPUT_PULLUP, 0)
/* (B18) I2C0_SDA */
AM64X_IOPAD(0x0264, PIN_INPUT_PULLUP, 0)
>;
};
ospi0_pins: ospi0-pins {
pinctrl-single,pins = <
/* (N20) OSPI0_CLK */
AM64X_IOPAD(0x0000, PIN_OUTPUT, 0)
/* (L19) OSPI0_CSn0 */
AM64X_IOPAD(0x002c, PIN_OUTPUT, 0)
/* (M19) OSPI0_D0 */
AM64X_IOPAD(0x000c, PIN_INPUT, 0)
/* (M18) OSPI0_D1 */
AM64X_IOPAD(0x0010, PIN_INPUT, 0)
/* (M20) OSPI0_D2 */
AM64X_IOPAD(0x0014, PIN_INPUT, 0)
/* (M21) OSPI0_D3 */
AM64X_IOPAD(0x0018, PIN_INPUT, 0)
/* (P21) OSPI0_D4 */
AM64X_IOPAD(0x001c, PIN_INPUT, 0)
/* (P20) OSPI0_D5 */
AM64X_IOPAD(0x0020, PIN_INPUT, 0)
/* (N18) OSPI0_D6 */
AM64X_IOPAD(0x0024, PIN_INPUT, 0)
/* (M17) OSPI0_D7 */
AM64X_IOPAD(0x0028, PIN_INPUT, 0)
/* (N19) OSPI0_DQS */
AM64X_IOPAD(0x0008, PIN_INPUT, 0)
>;
};
};
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