Commit 478d338b authored by Alex Deucher's avatar Alex Deucher

drm/amdgpu/discovery: handle UMC harvesting in IP discovery

Check the harvesting table to determing if any UMC blocks have
been harvested.
Acked-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent a2efebf1
...@@ -436,7 +436,8 @@ static void amdgpu_discovery_read_harvest_bit_per_ip(struct amdgpu_device *adev, ...@@ -436,7 +436,8 @@ static void amdgpu_discovery_read_harvest_bit_per_ip(struct amdgpu_device *adev,
} }
static void amdgpu_discovery_read_from_harvest_table(struct amdgpu_device *adev, static void amdgpu_discovery_read_from_harvest_table(struct amdgpu_device *adev,
uint32_t *vcn_harvest_count) uint32_t *vcn_harvest_count,
uint32_t *umc_harvest_count)
{ {
struct binary_header *bhdr; struct binary_header *bhdr;
struct harvest_table *harvest_info; struct harvest_table *harvest_info;
...@@ -460,6 +461,9 @@ static void amdgpu_discovery_read_from_harvest_table(struct amdgpu_device *adev, ...@@ -460,6 +461,9 @@ static void amdgpu_discovery_read_from_harvest_table(struct amdgpu_device *adev,
case DMU_HWID: case DMU_HWID:
adev->harvest_ip_mask |= AMD_HARVEST_IP_DMU_MASK; adev->harvest_ip_mask |= AMD_HARVEST_IP_DMU_MASK;
break; break;
case UMC_HWID:
(*umc_harvest_count)++;
break;
default: default:
break; break;
} }
...@@ -1126,6 +1130,7 @@ int amdgpu_discovery_get_ip_version(struct amdgpu_device *adev, int hw_id, int n ...@@ -1126,6 +1130,7 @@ int amdgpu_discovery_get_ip_version(struct amdgpu_device *adev, int hw_id, int n
void amdgpu_discovery_harvest_ip(struct amdgpu_device *adev) void amdgpu_discovery_harvest_ip(struct amdgpu_device *adev)
{ {
int vcn_harvest_count = 0; int vcn_harvest_count = 0;
int umc_harvest_count = 0;
/* /*
* Harvest table does not fit Navi1x and legacy GPUs, * Harvest table does not fit Navi1x and legacy GPUs,
...@@ -1144,7 +1149,8 @@ void amdgpu_discovery_harvest_ip(struct amdgpu_device *adev) ...@@ -1144,7 +1149,8 @@ void amdgpu_discovery_harvest_ip(struct amdgpu_device *adev)
&vcn_harvest_count); &vcn_harvest_count);
} else { } else {
amdgpu_discovery_read_from_harvest_table(adev, amdgpu_discovery_read_from_harvest_table(adev,
&vcn_harvest_count); &vcn_harvest_count,
&umc_harvest_count);
} }
amdgpu_discovery_harvest_config_quirk(adev); amdgpu_discovery_harvest_config_quirk(adev);
...@@ -1153,6 +1159,10 @@ void amdgpu_discovery_harvest_ip(struct amdgpu_device *adev) ...@@ -1153,6 +1159,10 @@ void amdgpu_discovery_harvest_ip(struct amdgpu_device *adev)
adev->harvest_ip_mask |= AMD_HARVEST_IP_VCN_MASK; adev->harvest_ip_mask |= AMD_HARVEST_IP_VCN_MASK;
adev->harvest_ip_mask |= AMD_HARVEST_IP_JPEG_MASK; adev->harvest_ip_mask |= AMD_HARVEST_IP_JPEG_MASK;
} }
if (umc_harvest_count < adev->gmc.num_umc) {
adev->gmc.num_umc -= umc_harvest_count;
}
} }
union gc_info { union gc_info {
......
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