Commit 47a1685f authored by Dinh Nguyen's avatar Dinh Nguyen Committed by Greg Kroah-Hartman

usb: dwc2/s3c-hsotg: move s3c-hsotg into dwc2 directory

Moves the s3c-hsotg driver into the dwc2 directory and uses the
dwc2 defines in hw.h. Renames s3c-hsotg.c to gadget.c.

NOTE: You can build both host and peripheral as a dynamically
linked module, but be aware that if you insmod dwc2_gadget, then
rmmod it, then insmod dwc2 and dwc2_platform for host mode, this
will not work. As the step to rmmod dwc2_gadget.ko will turn off
the clock to the USB IP. The dwc2 host driver currently does not
look to turn on a clock yet. A patch to fix that will be coming
soon.
Signed-off-by: default avatarDinh Nguyen <dinguyen@altera.com>
[ jh,rb - For gadget part only: ]
Tested-by: default avatarJingoo Han <jg1.han@samsung.com>
Tested-by: default avatarRobert Baldyga <r.baldyga@samsung.com>
[ pz: Folded Kconfig/Makefile changes, which were originally in
  a separate patch, into this one, to avoid a build breakage.
  Modified Kconfig/Makefile changes a bit. Tested host part only. ]
Signed-off-by: default avatarPaul Zimmerman <paulz@synopsys.com>
Acked-by: default avatarFelipe Balbi <balbi@ti.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 6ab53324
config USB_DWC2
tristate "DesignWare USB2 DRD Core Support"
bool "DesignWare USB2 DRD Core Support"
depends on USB
help
Say Y or M here if your system has a Dual Role HighSpeed
USB controller based on the DesignWare HSOTG IP Core.
Say Y here if your system has a Dual Role Hi-Speed USB
controller based on the DesignWare HSOTG IP Core.
If you choose to build this driver as dynamically linked
modules, the core module will be called dwc2.ko, the
PCI bus interface module (if you have a PCI bus system)
will be called dwc2_pci.ko and the platform interface module
(for controllers directly connected to the CPU) will be called
dwc2_platform.ko.
For host mode, if you choose to build the driver as dynamically
linked modules, the core module will be called dwc2.ko, the PCI
bus interface module (if you have a PCI bus system) will be
called dwc2_pci.ko, and the platform interface module (for
controllers directly connected to the CPU) will be called
dwc2_platform.ko. For gadget mode, there will be a single
module called dwc2_gadget.ko.
NOTE: This driver at present only implements the Host mode
of the controller. The existing s3c-hsotg driver supports
Peripheral mode, but only for the Samsung S3C platforms.
There are plans to merge the s3c-hsotg driver with this
driver in the near future to create a dual-role driver.
NOTE: The s3c-hsotg driver is now renamed to dwc2_gadget. The
host and gadget drivers are still currently separate drivers.
There are plans to merge the dwc2_gadget driver with the dwc2
host driver in the near future to create a dual-role driver.
if USB_DWC2
config USB_DWC2_HOST
tristate "Host only mode"
depends on USB
help
The Designware USB2.0 high-speed host controller
integrated into many SoCs.
config USB_DWC2_PLATFORM
bool "DWC2 Platform"
depends on USB_DWC2_HOST
default USB_DWC2_HOST
help
The Designware USB2.0 platform interface module for
controllers directly connected to the CPU. This is only
used for host mode.
config USB_DWC2_PCI
bool "DWC2 PCI"
depends on USB_DWC2_HOST && PCI
default USB_DWC2_HOST
help
The Designware USB2.0 PCI interface module for controllers
connected to a PCI bus. This is only used for host mode.
comment "Gadget mode requires USB Gadget support to be enabled"
config USB_DWC2_PERIPHERAL
tristate "Gadget only mode"
depends on USB_GADGET
help
The Designware USB2.0 high-speed gadget controller
integrated into many SoCs.
config USB_DWC2_DEBUG
bool "Enable Debugging Messages"
help
......
ccflags-$(CONFIG_USB_DWC2_DEBUG) += -DDEBUG
ccflags-$(CONFIG_USB_DWC2_VERBOSE) += -DVERBOSE_DEBUG
obj-$(CONFIG_USB_DWC2) += dwc2.o
dwc2-y += core.o core_intr.o
# NOTE: This driver at present only implements the Host mode
# of the controller. The existing s3c-hsotg driver supports
# Peripheral mode, but only for the Samsung S3C platforms.
# There are plans to merge the s3c-hsotg driver with this
# driver in the near future to create a dual-role driver. Once
# that is done, Host mode will become an optional feature that
# is selected with a config option.
obj-$(CONFIG_USB_DWC2_HOST) += dwc2.o
dwc2-y := core.o core_intr.o
dwc2-y += hcd.o hcd_intr.o
dwc2-y += hcd_queue.o hcd_ddma.o
ifneq ($(CONFIG_PCI),)
obj-$(CONFIG_USB_DWC2) += dwc2_pci.o
# NOTE: The previous s3c-hsotg peripheral mode only driver has been moved to
# this location and renamed gadget.c. When building for dynamically linked
# modules, dwc2_gadget.ko will get built for peripheral mode. For host mode,
# the core module will be dwc2.ko, the PCI bus interface module will called
# dwc2_pci.ko and the platform interface module will be called dwc2_platform.ko.
# At present the host and gadget driver will be separate drivers, but there
# are plans in the near future to create a dual-role driver.
ifneq ($(CONFIG_USB_DWC2_PCI),)
obj-$(CONFIG_USB_DWC2_HOST) += dwc2_pci.o
dwc2_pci-y := pci.o
endif
ifneq ($(CONFIG_USB_DWC2_PLATFORM),)
obj-$(CONFIG_USB_DWC2_HOST) += dwc2_platform.o
dwc2_platform-y := platform.o
endif
obj-$(CONFIG_USB_DWC2) += dwc2_platform.o
dwc2_pci-y += pci.o
dwc2_platform-y += platform.o
obj-$(CONFIG_USB_DWC2_PERIPHERAL) += dwc2_gadget.o
dwc2_gadget-y := gadget.o
......@@ -300,12 +300,6 @@ config USB_PXA27X
dynamically linked module called "pxa27x_udc" and force all
gadget drivers to also be dynamically linked.
config USB_S3C_HSOTG
tristate "Designware/S3C HS/OtG USB Device controller"
help
The Designware USB2.0 high-speed gadget controller
integrated into many SoCs.
config USB_S3C2410
tristate "S3C2410 USB Device Controller"
depends on ARCH_S3C24XX
......
......@@ -26,7 +26,6 @@ fsl_usb2_udc-$(CONFIG_ARCH_MXC) += fsl_mxc_udc.o
obj-$(CONFIG_USB_M66592) += m66592-udc.o
obj-$(CONFIG_USB_R8A66597) += r8a66597-udc.o
obj-$(CONFIG_USB_FSL_QE) += fsl_qe_udc.o
obj-$(CONFIG_USB_S3C_HSOTG) += s3c-hsotg.o
obj-$(CONFIG_USB_S3C_HSUDC) += s3c-hsudc.o
obj-$(CONFIG_USB_LPC32XX) += lpc32xx_udc.o
obj-$(CONFIG_USB_EG20T) += pch_udc.o
......
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