Commit 48ac0b58 authored by Linus Walleij's avatar Linus Walleij Committed by David S. Miller

net: ethernet: ixp4xx: Add DT bindings

This adds device tree bindings for the IXP4xx ethernet
controller with optional MDIO bridge.

Cc: Zoltan HERPAI <wigyori@uid0.hu>
Cc: Raylynn Knight <rayknight@me.com>
Cc: devicetree@vger.kernel.org
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 9c68011b
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
# Copyright 2018 Linaro Ltd.
%YAML 1.2
---
$id: "http://devicetree.org/schemas/net/intel,ixp4xx-ethernet.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: Intel IXP4xx ethernet
allOf:
- $ref: "ethernet-controller.yaml#"
maintainers:
- Linus Walleij <linus.walleij@linaro.org>
description: |
The Intel IXP4xx ethernet makes use of the IXP4xx NPE (Network
Processing Engine) and the IXP4xx Queue Manager to process
the ethernet frames. It can optionally contain an MDIO bus to
talk to PHYs.
properties:
compatible:
const: intel,ixp4xx-ethernet
reg:
maxItems: 1
description: Ethernet MMIO address range
queue-rx:
$ref: '/schemas/types.yaml#/definitions/phandle-array'
maxItems: 1
description: phandle to the RX queue on the NPE
queue-txready:
$ref: '/schemas/types.yaml#/definitions/phandle-array'
maxItems: 1
description: phandle to the TX READY queue on the NPE
phy-mode: true
phy-handle: true
intel,npe-handle:
$ref: '/schemas/types.yaml#/definitions/phandle-array'
maxItems: 1
description: phandle to the NPE this ethernet instance is using
and the instance to use in the second cell
mdio:
type: object
$ref: "mdio.yaml#"
description: optional node for embedded MDIO controller
required:
- compatible
- reg
- queue-rx
- queue-txready
- intel,npe-handle
additionalProperties: false
examples:
- |
npe: npe@c8006000 {
compatible = "intel,ixp4xx-network-processing-engine";
reg = <0xc8006000 0x1000>, <0xc8007000 0x1000>, <0xc8008000 0x1000>;
};
ethernet@c8009000 {
compatible = "intel,ixp4xx-ethernet";
reg = <0xc8009000 0x1000>;
status = "disabled";
queue-rx = <&qmgr 4>;
queue-txready = <&qmgr 21>;
intel,npe-handle = <&npe 1>;
phy-mode = "rgmii";
phy-handle = <&phy1>;
};
ethernet@c800c000 {
compatible = "intel,ixp4xx-ethernet";
reg = <0xc800c000 0x1000>;
status = "disabled";
queue-rx = <&qmgr 3>;
queue-txready = <&qmgr 20>;
intel,npe-handle = <&npe 2>;
phy-mode = "rgmii";
phy-handle = <&phy2>;
mdio {
#address-cells = <1>;
#size-cells = <0>;
phy1: ethernet-phy@1 {
reg = <1>;
};
phy2: ethernet-phy@2 {
reg = <2>;
};
};
};
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