Commit 48ce3ed0 authored by Sean Christopherson's avatar Sean Christopherson

KVM: selftests: Add this_cpu_has() to query X86_FEATURE_* via cpuid()

Add this_cpu_has() to query an X86_FEATURE_* via cpuid(), i.e. to query a
feature from L1 (or L2) guest code.  Arbitrarily select the AMX test to
be the first user.
Signed-off-by: default avatarSean Christopherson <seanjc@google.com>
Link: https://lore.kernel.org/r/20220614200707.3315957-33-seanjc@google.com
parent 8fe09d6a
......@@ -161,7 +161,6 @@ struct kvm_x86_cpu_feature {
#define X86_FEATURE_KVM_MIGRATION_CONTROL KVM_X86_CPU_FEATURE(0x40000001, 0, EAX, 17)
/* CPUID.1.ECX */
#define CPUID_XSAVE (1ul << 26)
#define CPUID_OSXSAVE (1ul << 27)
/* Page table bitfield declarations */
......@@ -427,6 +426,17 @@ static inline void cpuid(uint32_t function,
return __cpuid(function, 0, eax, ebx, ecx, edx);
}
static inline bool this_cpu_has(struct kvm_x86_cpu_feature feature)
{
uint32_t gprs[4];
__cpuid(feature.function, feature.index,
&gprs[KVM_CPUID_EAX], &gprs[KVM_CPUID_EBX],
&gprs[KVM_CPUID_ECX], &gprs[KVM_CPUID_EDX]);
return gprs[feature.reg] & BIT(feature.bit);
}
#define SET_XMM(__var, __xmm) \
asm volatile("movq %0, %%"#__xmm : : "r"(__var) : #__xmm)
......
......@@ -120,13 +120,8 @@ static inline void __xsavec(struct xsave_data *data, uint64_t rfbm)
static inline void check_cpuid_xsave(void)
{
uint32_t eax, ebx, ecx, edx;
cpuid(1, &eax, &ebx, &ecx, &edx);
if (!(ecx & CPUID_XSAVE))
GUEST_ASSERT(!"cpuid: no CPU xsave support!");
if (!(ecx & CPUID_OSXSAVE))
GUEST_ASSERT(!"cpuid: no OS xsave support!");
GUEST_ASSERT(this_cpu_has(X86_FEATURE_XSAVE));
GUEST_ASSERT(this_cpu_has(X86_FEATURE_OSXSAVE));
}
static bool check_xsave_supports_xtile(void)
......
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