Commit 491e9d40 authored by Radhey Shyam Pandey's avatar Radhey Shyam Pandey Committed by Vinod Koul

dmaengine: xilinx_dma: Increase AXI DMA transaction segment count

Increase AXI DMA transaction segments count to ensure that even in
high load we always get a free segment in prepare descriptor for a
DMA_SLAVE transaction.
Signed-off-by: default avatarRadhey Shyam Pandey <radhey.shyam.pandey@amd.com>
Link: https://lore.kernel.org/r/1691387509-2113129-5-git-send-email-radhey.shyam.pandey@amd.comSigned-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent d8a3f65f
......@@ -178,7 +178,7 @@
#define XILINX_DMA_BD_SOP BIT(27)
#define XILINX_DMA_BD_EOP BIT(26)
#define XILINX_DMA_COALESCE_MAX 255
#define XILINX_DMA_NUM_DESCS 255
#define XILINX_DMA_NUM_DESCS 512
#define XILINX_DMA_NUM_APP_WORDS 5
/* AXI CDMA Specific Registers/Offsets */
......
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