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Commit 49c13ed0 authored by Linus Torvalds's avatar Linus Torvalds
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Merge tag 'soc-fixes-6.0-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc 

Pull ARM SoC fixes from Arnd Bergmann:
 "This should be the last set of bugfixes in the SoC tree:

   - Two fixes for Arm integrator, dealing with a regression caused by
     invalid DT properties combined with a change in dma address
     translation, and missing device_type annotations on the PCI bus

   - Fixes for drivers/reset/, addressing bugs in i.MX8MP, Sparx5 and
     NPCM8XX platforms

   - Bjorn Andersson's email address changes in the MAINTAINERS file

   - Multiple minor fixes to Qualcomm dts files, and a change to the
     remoteproc firmware filename that did not match the actual path in
     the linux-firmware package

   - Minor code fixes for the Allwinner/sunxi SRAM driver, and the
     broadcom STB Bus Interface Unit driver

   - A build fix for the sunplus sp7021 platform

   - Two dts fixes for TI OMAP family SoCs, addressing an extraneous
     usb4 device node and an incorrect DMA handle"

* tag 'soc-fixes-6.0-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  ARM: dts: integrator: Fix DMA ranges
  ARM: dts: integrator: Tag PCI host with device_type
  ARM: sunplus: fix serial console kconfig and build problems
  reset: npcm: fix iprst2 and iprst4 setting
  arm64: dts: qcom: sm8350: fix UFS PHY serdes size
  soc: bcm: brcmstb: biuctrl: Avoid double of_node_put()
  arm64: dts: qcom: sc8280xp-x13s: Update firmware location
  soc: sunxi: sram: Fix debugfs info for A64 SRAM C
  soc: sunxi: sram: Fix probe function ordering issues
  soc: sunxi: sram: Prevent the driver from being unbound
  soc: sunxi: sram: Actually claim SRAM regions
  ARM: dts: am5748: keep usb4_tm disabled
  reset: microchip-sparx5: issue a reset on startup
  reset: imx7: Fix the iMX8MP PCIe PHY PERST support
  MAINTAINERS: Update Bjorn's email address
  arm64: dts: qcom: sc7280: move USB wakeup-source property
  arm64: dts: qcom: thinkpad-x13s: Fix firmware location
  arm64: dts: qcom: sm8150: Fix fastrpc iommu values
  ARM: dts: am33xx: Fix MMCHS0 dma properties
parents 46452d37 7bea67a9
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.mailmap
View file @ 49c13ed0
......@@ -71,6 +71,9 @@ Ben M Cahill <ben.m.cahill@intel.com>
Ben Widawsky <bwidawsk@kernel.org> <ben@bwidawsk.net>
Ben Widawsky <bwidawsk@kernel.org> <ben.widawsky@intel.com>
Ben Widawsky <bwidawsk@kernel.org> <benjamin.widawsky@intel.com>
Bjorn Andersson <andersson@kernel.org> <bjorn@kryo.se>
Bjorn Andersson <andersson@kernel.org> <bjorn.andersson@linaro.org>
Bjorn Andersson <andersson@kernel.org> <bjorn.andersson@sonymobile.com>
Björn Steinbrink <B.Steinbrink@gmx.de>
Björn Töpel <bjorn@kernel.org> <bjorn.topel@gmail.com>
Björn Töpel <bjorn@kernel.org> <bjorn.topel@intel.com>
......
MAINTAINERS
View file @ 49c13ed0
......@@ -2579,7 +2579,7 @@ W: http://www.armlinux.org.uk/
ARM/QUALCOMM SUPPORT
M: Andy Gross <agross@kernel.org>
M: Bjorn Andersson <bjorn.andersson@linaro.org>
M: Bjorn Andersson <andersson@kernel.org>
R: Konrad Dybcio <konrad.dybcio@somainline.org>
L: linux-arm-msm@vger.kernel.org
S: Maintained
......@@ -8944,7 +8944,7 @@ F: include/linux/hw_random.h
HARDWARE SPINLOCK CORE
M: Ohad Ben-Cohen <ohad@wizery.com>
M: Bjorn Andersson <bjorn.andersson@linaro.org>
M: Bjorn Andersson <andersson@kernel.org>
R: Baolin Wang <baolin.wang7@gmail.com>
L: linux-remoteproc@vger.kernel.org
S: Maintained
......@@ -16126,7 +16126,7 @@ F: drivers/gpio/gpio-sama5d2-piobu.c
F: drivers/pinctrl/pinctrl-at91*
PIN CONTROLLER - QUALCOMM
M: Bjorn Andersson <bjorn.andersson@linaro.org>
M: Bjorn Andersson <andersson@kernel.org>
L: linux-arm-msm@vger.kernel.org
S: Maintained
F: Documentation/devicetree/bindings/pinctrl/qcom,*.txt
......@@ -16819,7 +16819,7 @@ F: Documentation/devicetree/bindings/media/*camss*
F: drivers/media/platform/qcom/camss/
QUALCOMM CLOCK DRIVERS
M: Bjorn Andersson <bjorn.andersson@linaro.org>
M: Bjorn Andersson <andersson@kernel.org>
L: linux-arm-msm@vger.kernel.org
S: Supported
T: git git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux.git
......@@ -17309,7 +17309,7 @@ S: Supported
F: fs/reiserfs/
REMOTE PROCESSOR (REMOTEPROC) SUBSYSTEM
M: Bjorn Andersson <bjorn.andersson@linaro.org>
M: Bjorn Andersson <andersson@kernel.org>
M: Mathieu Poirier <mathieu.poirier@linaro.org>
L: linux-remoteproc@vger.kernel.org
S: Maintained
......@@ -17322,7 +17322,7 @@ F: include/linux/remoteproc.h
F: include/linux/remoteproc/
REMOTE PROCESSOR MESSAGING (RPMSG) SUBSYSTEM
M: Bjorn Andersson <bjorn.andersson@linaro.org>
M: Bjorn Andersson <andersson@kernel.org>
M: Mathieu Poirier <mathieu.poirier@linaro.org>
L: linux-remoteproc@vger.kernel.org
S: Maintained
......
arch/arm/boot/dts/am33xx-l4.dtsi
View file @ 49c13ed0
......@@ -1502,8 +1502,7 @@ SYSC_OMAP2_SOFTRESET |
mmc1: mmc@0 {
compatible = "ti,am335-sdhci";
ti,needs-special-reset;
dmas = <&edma_xbar 24 0 0
&edma_xbar 25 0 0>;
dmas = <&edma 24 0>, <&edma 25 0>;
dma-names = "tx", "rx";
interrupts = <64>;
reg = <0x0 0x1000>;
......
arch/arm/boot/dts/am5748.dtsi
View file @ 49c13ed0
......@@ -25,6 +25,10 @@ &usb3_tm {
status = "disabled";
};
&usb4_tm {
status = "disabled";
};
&atl_tm {
status = "disabled";
};
arch/arm/boot/dts/integratorap-im-pd1.dts
View file @ 49c13ed0
......@@ -249,6 +249,7 @@ display@1000000 {
/* 640x480 16bpp @ 25.175MHz is 36827428 bytes/s */
max-memory-bandwidth = <40000000>;
memory-region = <&impd1_ram>;
dma-ranges;
port@0 {
#address-cells = <1>;
......
arch/arm/boot/dts/integratorap.dts
View file @ 49c13ed0
......@@ -160,6 +160,7 @@ pic: pic@14000000 {
pci: pciv3@62000000 {
compatible = "arm,integrator-ap-pci", "v3,v360epc-pci";
device_type = "pci";
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
......@@ -261,7 +262,7 @@ bus@c0000000 {
lm0: bus@c0000000 {
compatible = "simple-bus";
ranges = <0x00000000 0xc0000000 0x10000000>;
dma-ranges = <0x00000000 0x80000000 0x10000000>;
dma-ranges = <0x00000000 0xc0000000 0x10000000>;
reg = <0xc0000000 0x10000000>;
#address-cells = <1>;
#size-cells = <1>;
......@@ -269,7 +270,7 @@ lm0: bus@c0000000 {
lm1: bus@d0000000 {
compatible = "simple-bus";
ranges = <0x00000000 0xd0000000 0x10000000>;
dma-ranges = <0x00000000 0x80000000 0x10000000>;
dma-ranges = <0x00000000 0xd0000000 0x10000000>;
reg = <0xd0000000 0x10000000>;
#address-cells = <1>;
#size-cells = <1>;
......@@ -277,7 +278,7 @@ lm1: bus@d0000000 {
lm2: bus@e0000000 {
compatible = "simple-bus";
ranges = <0x00000000 0xe0000000 0x10000000>;
dma-ranges = <0x00000000 0x80000000 0x10000000>;
dma-ranges = <0x00000000 0xe0000000 0x10000000>;
reg = <0xe0000000 0x10000000>;
#address-cells = <1>;
#size-cells = <1>;
......@@ -285,7 +286,7 @@ lm2: bus@e0000000 {
lm3: bus@f0000000 {
compatible = "simple-bus";
ranges = <0x00000000 0xf0000000 0x10000000>;
dma-ranges = <0x00000000 0x80000000 0x10000000>;
dma-ranges = <0x00000000 0xf0000000 0x10000000>;
reg = <0xf0000000 0x10000000>;
#address-cells = <1>;
#size-cells = <1>;
......
arch/arm/mach-sunplus/Kconfig
View file @ 49c13ed0
......@@ -18,8 +18,8 @@ config SOC_SP7021
select ARM_PSCI
select PINCTRL
select PINCTRL_SPPCTL
select SERIAL_SUNPLUS
select SERIAL_SUNPLUS_CONSOLE
select SERIAL_SUNPLUS if TTY
select SERIAL_SUNPLUS_CONSOLE if TTY
help
Support for Sunplus SP7021 SoC. It is based on ARM 4-core
Cortex-A7 with various peripherals (e.g.: I2C, SPI, SDIO,
......
arch/arm64/boot/dts/qcom/sc7280.dtsi
View file @ 49c13ed0
......@@ -3374,6 +3374,8 @@ usb_1: usb@a6f8800 {
<&gem_noc MASTER_APPSS_PROC 0 &cnoc2 SLAVE_USB3_0 0>;
interconnect-names = "usb-ddr", "apps-usb";
wakeup-source;
usb_1_dwc3: usb@a600000 {
compatible = "snps,dwc3";
reg = <0 0x0a600000 0 0xe000>;
......@@ -3384,7 +3386,6 @@ usb_1_dwc3: usb@a600000 {
phys = <&usb_1_hsphy>, <&usb_1_ssphy>;
phy-names = "usb2-phy", "usb3-phy";
maximum-speed = "super-speed";
wakeup-source;
};
};
......
arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
View file @ 49c13ed0
......@@ -235,13 +235,13 @@ keyboard@68 {
};
&remoteproc_adsp {
firmware-name = "qcom/sc8280xp/qcadsp8280.mbn";
firmware-name = "qcom/sc8280xp/LENOVO/21BX/qcadsp8280.mbn";
status = "okay";
};
&remoteproc_nsp0 {
firmware-name = "qcom/sc8280xp/qccdsp8280.mbn";
firmware-name = "qcom/sc8280xp/LENOVO/21BX/qccdsp8280.mbn";
status = "okay";
};
......
arch/arm64/boot/dts/qcom/sm8150.dtsi
View file @ 49c13ed0
......@@ -3394,57 +3394,49 @@ fastrpc {
compute-cb@1 {
compatible = "qcom,fastrpc-compute-cb";
reg = <1>;
iommus = <&apps_smmu 0x1401 0x2040>,
<&apps_smmu 0x1421 0x0>,
<&apps_smmu 0x2001 0x420>,
<&apps_smmu 0x2041 0x0>;
iommus = <&apps_smmu 0x1001 0x0460>;
};
compute-cb@2 {
compatible = "qcom,fastrpc-compute-cb";
reg = <2>;
iommus = <&apps_smmu 0x2 0x3440>,
<&apps_smmu 0x22 0x3400>;
iommus = <&apps_smmu 0x1002 0x0460>;
};
compute-cb@3 {
compatible = "qcom,fastrpc-compute-cb";
reg = <3>;
iommus = <&apps_smmu 0x3 0x3440>,
<&apps_smmu 0x1423 0x0>,
<&apps_smmu 0x2023 0x0>;
iommus = <&apps_smmu 0x1003 0x0460>;
};
compute-cb@4 {
compatible = "qcom,fastrpc-compute-cb";
reg = <4>;
iommus = <&apps_smmu 0x4 0x3440>,
<&apps_smmu 0x24 0x3400>;
iommus = <&apps_smmu 0x1004 0x0460>;
};
compute-cb@5 {
compatible = "qcom,fastrpc-compute-cb";
reg = <5>;
iommus = <&apps_smmu 0x5 0x3440>,
<&apps_smmu 0x25 0x3400>;
iommus = <&apps_smmu 0x1005 0x0460>;
};
compute-cb@6 {
compatible = "qcom,fastrpc-compute-cb";
reg = <6>;
iommus = <&apps_smmu 0x6 0x3460>;
iommus = <&apps_smmu 0x1006 0x0460>;
};
compute-cb@7 {
compatible = "qcom,fastrpc-compute-cb";
reg = <7>;
iommus = <&apps_smmu 0x7 0x3460>;
iommus = <&apps_smmu 0x1007 0x0460>;
};
compute-cb@8 {
compatible = "qcom,fastrpc-compute-cb";
reg = <8>;
iommus = <&apps_smmu 0x8 0x3460>;
iommus = <&apps_smmu 0x1008 0x0460>;
};
/* note: secure cb9 in downstream */
......
arch/arm64/boot/dts/qcom/sm8350.dtsi
View file @ 49c13ed0
......@@ -2128,7 +2128,7 @@ ufs_mem_hc: ufshc@1d84000 {
ufs_mem_phy: phy@1d87000 {
compatible = "qcom,sm8350-qmp-ufs-phy";
reg = <0 0x01d87000 0 0xe10>;
reg = <0 0x01d87000 0 0x1c4>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
......
drivers/reset/reset-imx7.c
View file @ 49c13ed0
......@@ -329,6 +329,7 @@ static int imx8mp_reset_set(struct reset_controller_dev *rcdev,
break;
case IMX8MP_RESET_PCIE_CTRL_APPS_EN:
case IMX8MP_RESET_PCIEPHY_PERST:
value = assert ? 0 : bit;
break;
}
......
drivers/reset/reset-microchip-sparx5.c
View file @ 49c13ed0
......@@ -33,11 +33,8 @@ static struct regmap_config sparx5_reset_regmap_config = {
.reg_stride = 4,
};
static int sparx5_switch_reset(struct reset_controller_dev *rcdev,
unsigned long id)
static int sparx5_switch_reset(struct mchp_reset_context *ctx)
{
struct mchp_reset_context *ctx =
container_of(rcdev, struct mchp_reset_context, rcdev);
u32 val;
/* Make sure the core is PROTECTED from reset */
......@@ -54,8 +51,14 @@ static int sparx5_switch_reset(struct reset_controller_dev *rcdev,
1, 100);
}
static int sparx5_reset_noop(struct reset_controller_dev *rcdev,
unsigned long id)
{
return 0;
}
static const struct reset_control_ops sparx5_reset_ops = {
.reset = sparx5_switch_reset,
.reset = sparx5_reset_noop,
};
static int mchp_sparx5_map_syscon(struct platform_device *pdev, char *name,
......@@ -122,6 +125,11 @@ static int mchp_sparx5_reset_probe(struct platform_device *pdev)
ctx->rcdev.of_node = dn;
ctx->props = device_get_match_data(&pdev->dev);
/* Issue the reset very early, our actual reset callback is a noop. */
err = sparx5_switch_reset(ctx);
if (err)
return err;
return devm_reset_controller_register(&pdev->dev, &ctx->rcdev);
}
......@@ -163,6 +171,10 @@ static int __init mchp_sparx5_reset_init(void)
return platform_driver_register(&mchp_sparx5_reset_driver);
}
/*
* Because this is a global reset, keep this postcore_initcall() to issue the
* reset as early as possible during the kernel startup.
*/
postcore_initcall(mchp_sparx5_reset_init);
MODULE_DESCRIPTION("Microchip Sparx5 switch reset driver");
......
drivers/reset/reset-npcm.c
View file @ 49c13ed0
......@@ -291,7 +291,7 @@ static void npcm_usb_reset_npcm8xx(struct npcm_rc_data *rc)
iprst2 |= ipsrst2_bits;
iprst3 |= (ipsrst3_bits | NPCM_IPSRST3_USBPHY1 |
NPCM_IPSRST3_USBPHY2);
iprst2 |= ipsrst4_bits;
iprst4 |= ipsrst4_bits;
writel(iprst1, rc->base + NPCM_IPSRST1);
writel(iprst2, rc->base + NPCM_IPSRST2);
......
drivers/soc/bcm/brcmstb/biuctrl.c
View file @ 49c13ed0
......@@ -288,7 +288,6 @@ static int __init setup_hifcpubiuctrl_regs(struct device_node *np)
if (BRCM_ID(family_id) == 0x7260 && BRCM_REV(family_id) == 0)
cpubiuctrl_regs = b53_cpubiuctrl_no_wb_regs;
out:
of_node_put(np);
return ret;
}
......
drivers/soc/sunxi/sunxi_sram.c
View file @ 49c13ed0
......@@ -78,8 +78,8 @@ static struct sunxi_sram_desc sun4i_a10_sram_d = {
static struct sunxi_sram_desc sun50i_a64_sram_c = {
.data = SUNXI_SRAM_DATA("C", 0x4, 24, 1,
SUNXI_SRAM_MAP(0, 1, "cpu"),
SUNXI_SRAM_MAP(1, 0, "de2")),
SUNXI_SRAM_MAP(1, 0, "cpu"),
SUNXI_SRAM_MAP(0, 1, "de2")),
};
static const struct of_device_id sunxi_sram_dt_ids[] = {
......@@ -254,6 +254,7 @@ int sunxi_sram_claim(struct device *dev)
writel(val | ((device << sram_data->offset) & mask),
base + sram_data->reg);
sram_desc->claimed = true;
spin_unlock(&sram_lock);
return 0;
......@@ -329,11 +330,11 @@ static struct regmap_config sunxi_sram_emac_clock_regmap = {
.writeable_reg = sunxi_sram_regmap_accessible_reg,
};
static int sunxi_sram_probe(struct platform_device *pdev)
static int __init sunxi_sram_probe(struct platform_device *pdev)
{
struct dentry *d;
struct regmap *emac_clock;
const struct sunxi_sramc_variant *variant;
struct device *dev = &pdev->dev;
sram_dev = &pdev->dev;
......@@ -345,13 +346,6 @@ static int sunxi_sram_probe(struct platform_device *pdev)
if (IS_ERR(base))
return PTR_ERR(base);
of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev);
d = debugfs_create_file("sram", S_IRUGO, NULL, NULL,
&sunxi_sram_fops);
if (!d)
return -ENOMEM;
if (variant->num_emac_clocks > 0) {
emac_clock = devm_regmap_init_mmio(&pdev->dev, base,
&sunxi_sram_emac_clock_regmap);
......@@ -360,6 +354,10 @@ static int sunxi_sram_probe(struct platform_device *pdev)
return PTR_ERR(emac_clock);
}
of_platform_populate(dev->of_node, NULL, NULL, dev);
debugfs_create_file("sram", 0444, NULL, NULL, &sunxi_sram_fops);
return 0;
}
......@@ -409,9 +407,8 @@ static struct platform_driver sunxi_sram_driver = {
.name = "sunxi-sram",
.of_match_table = sunxi_sram_dt_match,
},
.probe = sunxi_sram_probe,
};
module_platform_driver(sunxi_sram_driver);
builtin_platform_driver_probe(sunxi_sram_driver, sunxi_sram_probe);
MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");
MODULE_DESCRIPTION("Allwinner sunXi SRAM Controller Driver");
......
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