Commit 4aef0ebc authored by Huang Rui's avatar Huang Rui Committed by Alex Deucher

drm/amdgpu: fix build error without x86 kconfig (v2)

This patch is to fix below build error while we are using the kconfig
without x86.

drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/vangogh_ppt.c: In function
'vangogh_get_smu_metrics_data':
drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/vangogh_ppt.c:300:10:
error: 'boot_cpu_data' undeclared (first use in this function); did you
mean 'boot_cpuid'?
  300 |          boot_cpu_data.x86_max_cores * sizeof(uint16_t));
      |          ^~~~~~~~~~~~~
      |          boot_cpuid
drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/vangogh_ppt.c: In function
'vangogh_read_sensor':
drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/vangogh_ppt.c:1320:11:
error: 'boot_cpu_data' undeclared (first use in this function); did you
mean 'boot_cpuid'?
 1320 |   *size = boot_cpu_data.x86_max_cores * sizeof(uint16_t);
      |           ^~~~~~~~~~~~~
      |           boot_cpuid
drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/vangogh_ppt.c: In function
'vangogh_od_edit_dpm_table':
drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/vangogh_ppt.c:1460:19:
error: 'boot_cpu_data' undeclared (first use in this function); did you
mean 'boot_cpuid'?
 1460 |   if (input[0] >= boot_cpu_data.x86_max_cores) {
      |                   ^~~~~~~~~~~~~
      |                   boot_cpuid

v2: fix #ifdef and add comment for APU only
Reported-by: default avatarStephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: default avatarHuang Rui <ray.huang@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent f4fb5595
...@@ -3633,12 +3633,12 @@ static void amdgpu_debugfs_prints_cpu_info(struct seq_file *m, ...@@ -3633,12 +3633,12 @@ static void amdgpu_debugfs_prints_cpu_info(struct seq_file *m,
int i; int i;
if (is_support_cclk_dpm(adev)) { if (is_support_cclk_dpm(adev)) {
p_val = kcalloc(boot_cpu_data.x86_max_cores, sizeof(uint16_t), p_val = kcalloc(adev->smu.cpu_core_num, sizeof(uint16_t),
GFP_KERNEL); GFP_KERNEL);
if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_CPU_CLK, if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_CPU_CLK,
(void *)p_val, &size)) { (void *)p_val, &size)) {
for (i = 0; i < boot_cpu_data.x86_max_cores; i++) for (i = 0; i < adev->smu.cpu_core_num; i++)
seq_printf(m, "\t%u MHz (CPU%d)\n", seq_printf(m, "\t%u MHz (CPU%d)\n",
*(p_val + i), i); *(p_val + i), i);
} }
......
...@@ -466,11 +466,13 @@ struct smu_context ...@@ -466,11 +466,13 @@ struct smu_context
uint32_t gfx_actual_hard_min_freq; uint32_t gfx_actual_hard_min_freq;
uint32_t gfx_actual_soft_max_freq; uint32_t gfx_actual_soft_max_freq;
/* APU only */
uint32_t cpu_default_soft_min_freq; uint32_t cpu_default_soft_min_freq;
uint32_t cpu_default_soft_max_freq; uint32_t cpu_default_soft_max_freq;
uint32_t cpu_actual_soft_min_freq; uint32_t cpu_actual_soft_min_freq;
uint32_t cpu_actual_soft_max_freq; uint32_t cpu_actual_soft_max_freq;
uint32_t cpu_core_id_select; uint32_t cpu_core_id_select;
uint16_t cpu_core_num;
}; };
struct i2c_adapter; struct i2c_adapter;
......
...@@ -297,7 +297,7 @@ static int vangogh_get_smu_metrics_data(struct smu_context *smu, ...@@ -297,7 +297,7 @@ static int vangogh_get_smu_metrics_data(struct smu_context *smu,
break; break;
case METRICS_AVERAGE_CPUCLK: case METRICS_AVERAGE_CPUCLK:
memcpy(value, &metrics->CoreFrequency[0], memcpy(value, &metrics->CoreFrequency[0],
boot_cpu_data.x86_max_cores * sizeof(uint16_t)); smu->cpu_core_num * sizeof(uint16_t));
break; break;
default: default:
*value = UINT_MAX; *value = UINT_MAX;
...@@ -335,6 +335,13 @@ static int vangogh_init_smc_tables(struct smu_context *smu) ...@@ -335,6 +335,13 @@ static int vangogh_init_smc_tables(struct smu_context *smu)
if (ret) if (ret)
return ret; return ret;
#ifdef CONFIG_X86
/* AMD x86 APU only */
smu->cpu_core_num = boot_cpu_data.x86_max_cores;
#else
smu->cpu_core_num = 4;
#endif
return smu_v11_0_init_smc_tables(smu); return smu_v11_0_init_smc_tables(smu);
} }
...@@ -1317,7 +1324,7 @@ static int vangogh_read_sensor(struct smu_context *smu, ...@@ -1317,7 +1324,7 @@ static int vangogh_read_sensor(struct smu_context *smu,
ret = vangogh_get_smu_metrics_data(smu, ret = vangogh_get_smu_metrics_data(smu,
METRICS_AVERAGE_CPUCLK, METRICS_AVERAGE_CPUCLK,
(uint32_t *)data); (uint32_t *)data);
*size = boot_cpu_data.x86_max_cores * sizeof(uint16_t); *size = smu->cpu_core_num * sizeof(uint16_t);
break; break;
default: default:
ret = -EOPNOTSUPP; ret = -EOPNOTSUPP;
...@@ -1457,9 +1464,9 @@ static int vangogh_od_edit_dpm_table(struct smu_context *smu, enum PP_OD_DPM_TAB ...@@ -1457,9 +1464,9 @@ static int vangogh_od_edit_dpm_table(struct smu_context *smu, enum PP_OD_DPM_TAB
dev_err(smu->adev->dev, "Input parameter number not correct (should be 4 for processor)\n"); dev_err(smu->adev->dev, "Input parameter number not correct (should be 4 for processor)\n");
return -EINVAL; return -EINVAL;
} }
if (input[0] >= boot_cpu_data.x86_max_cores) { if (input[0] >= smu->cpu_core_num) {
dev_err(smu->adev->dev, "core index is overflow, should be less than %d\n", dev_err(smu->adev->dev, "core index is overflow, should be less than %d\n",
boot_cpu_data.x86_max_cores); smu->cpu_core_num);
} }
smu->cpu_core_id_select = input[0]; smu->cpu_core_id_select = input[0];
if (input[1] == 0) { if (input[1] == 0) {
...@@ -1535,7 +1542,7 @@ static int vangogh_od_edit_dpm_table(struct smu_context *smu, enum PP_OD_DPM_TAB ...@@ -1535,7 +1542,7 @@ static int vangogh_od_edit_dpm_table(struct smu_context *smu, enum PP_OD_DPM_TAB
break; break;
} }
for (i = 0; i < boot_cpu_data.x86_max_cores; i++) { for (i = 0; i < smu->cpu_core_num; i++) {
ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_SetSoftMinCclk, ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_SetSoftMinCclk,
(i << 20) | smu->cpu_actual_soft_min_freq, (i << 20) | smu->cpu_actual_soft_min_freq,
NULL); NULL);
......
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