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Commit 4ba27f9b authored by Edward O'Callaghan's avatar Edward O'Callaghan Committed by Alex Deucher
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drivers/amdgpu: Use canonical boolean form in various predicates 

V.2: Fixup by hand to remove a few instances of redundant '()'
left over.

Found-by: Coccinelle
Signed-off-by: default avatarEdward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: default avatarTom St Denis <tom.stdenis@amd.com>
Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 5969a8c7
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Showing with 53 additions and 48 deletions
drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
View file @ 4ba27f9b
...@@ -1167,9 +1167,9 @@ static int cz_apply_state_adjust_rules(struct pp_hwmgr *hwmgr, ...@@ -1167,9 +1167,9 @@ static int cz_apply_state_adjust_rules(struct pp_hwmgr *hwmgr,
cz_ps->action = cz_current_ps->action; cz_ps->action = cz_current_ps->action;
if ((force_high == false) && (cz_ps->action == FORCE_HIGH)) if (!force_high && (cz_ps->action == FORCE_HIGH))
cz_ps->action = CANCEL_FORCE_HIGH; cz_ps->action = CANCEL_FORCE_HIGH;
else if ((force_high == true) && (cz_ps->action != FORCE_HIGH)) else if (force_high && (cz_ps->action != FORCE_HIGH))
cz_ps->action = FORCE_HIGH; cz_ps->action = FORCE_HIGH;
else else
cz_ps->action = DO_NOTHING; cz_ps->action = DO_NOTHING;
...@@ -1656,7 +1656,7 @@ static void cz_hw_print_display_cfg( ...@@ -1656,7 +1656,7 @@ static void cz_hw_print_display_cfg(
struct cz_hwmgr *hw_data = (struct cz_hwmgr *)(hwmgr->backend); struct cz_hwmgr *hw_data = (struct cz_hwmgr *)(hwmgr->backend);
uint32_t data = 0; uint32_t data = 0;
if (hw_data->cc6_settings.cc6_setting_changed == true) { if (hw_data->cc6_settings.cc6_setting_changed) {
hw_data->cc6_settings.cc6_setting_changed = false; hw_data->cc6_settings.cc6_setting_changed = false;
......
drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c
View file @ 4ba27f9b
...@@ -4389,8 +4389,9 @@ static int fiji_freeze_sclk_mclk_dpm(struct pp_hwmgr *hwmgr) ...@@ -4389,8 +4389,9 @@ static int fiji_freeze_sclk_mclk_dpm(struct pp_hwmgr *hwmgr)
if ((0 == data->sclk_dpm_key_disabled) && if ((0 == data->sclk_dpm_key_disabled) &&
(data->need_update_smu7_dpm_table & (data->need_update_smu7_dpm_table &
(DPMTABLE_OD_UPDATE_SCLK + DPMTABLE_UPDATE_SCLK))) { (DPMTABLE_OD_UPDATE_SCLK + DPMTABLE_UPDATE_SCLK))) {
PP_ASSERT_WITH_CODE(true == fiji_is_dpm_running(hwmgr), PP_ASSERT_WITH_CODE(fiji_is_dpm_running(hwmgr),
"Trying to freeze SCLK DPM when DPM is disabled",); "Trying to freeze SCLK DPM when DPM is disabled",
);
PP_ASSERT_WITH_CODE(0 == smum_send_msg_to_smc(hwmgr->smumgr, PP_ASSERT_WITH_CODE(0 == smum_send_msg_to_smc(hwmgr->smumgr,
PPSMC_MSG_SCLKDPM_FreezeLevel), PPSMC_MSG_SCLKDPM_FreezeLevel),
"Failed to freeze SCLK DPM during FreezeSclkMclkDPM Function!", "Failed to freeze SCLK DPM during FreezeSclkMclkDPM Function!",
...@@ -4400,8 +4401,9 @@ static int fiji_freeze_sclk_mclk_dpm(struct pp_hwmgr *hwmgr) ...@@ -4400,8 +4401,9 @@ static int fiji_freeze_sclk_mclk_dpm(struct pp_hwmgr *hwmgr)
if ((0 == data->mclk_dpm_key_disabled) && if ((0 == data->mclk_dpm_key_disabled) &&
(data->need_update_smu7_dpm_table & (data->need_update_smu7_dpm_table &
DPMTABLE_OD_UPDATE_MCLK)) { DPMTABLE_OD_UPDATE_MCLK)) {
PP_ASSERT_WITH_CODE(true == fiji_is_dpm_running(hwmgr), PP_ASSERT_WITH_CODE(fiji_is_dpm_running(hwmgr),
"Trying to freeze MCLK DPM when DPM is disabled",); "Trying to freeze MCLK DPM when DPM is disabled",
);
PP_ASSERT_WITH_CODE(0 == smum_send_msg_to_smc(hwmgr->smumgr, PP_ASSERT_WITH_CODE(0 == smum_send_msg_to_smc(hwmgr->smumgr,
PPSMC_MSG_MCLKDPM_FreezeLevel), PPSMC_MSG_MCLKDPM_FreezeLevel),
"Failed to freeze MCLK DPM during FreezeSclkMclkDPM Function!", "Failed to freeze MCLK DPM during FreezeSclkMclkDPM Function!",
...@@ -4850,8 +4852,9 @@ static int fiji_unfreeze_sclk_mclk_dpm(struct pp_hwmgr *hwmgr) ...@@ -4850,8 +4852,9 @@ static int fiji_unfreeze_sclk_mclk_dpm(struct pp_hwmgr *hwmgr)
(data->need_update_smu7_dpm_table & (data->need_update_smu7_dpm_table &
(DPMTABLE_OD_UPDATE_SCLK + DPMTABLE_UPDATE_SCLK))) { (DPMTABLE_OD_UPDATE_SCLK + DPMTABLE_UPDATE_SCLK))) {
PP_ASSERT_WITH_CODE(true == fiji_is_dpm_running(hwmgr), PP_ASSERT_WITH_CODE(fiji_is_dpm_running(hwmgr),
"Trying to Unfreeze SCLK DPM when DPM is disabled",); "Trying to Unfreeze SCLK DPM when DPM is disabled",
);
PP_ASSERT_WITH_CODE(0 == smum_send_msg_to_smc(hwmgr->smumgr, PP_ASSERT_WITH_CODE(0 == smum_send_msg_to_smc(hwmgr->smumgr,
PPSMC_MSG_SCLKDPM_UnfreezeLevel), PPSMC_MSG_SCLKDPM_UnfreezeLevel),
"Failed to unfreeze SCLK DPM during UnFreezeSclkMclkDPM Function!", "Failed to unfreeze SCLK DPM during UnFreezeSclkMclkDPM Function!",
...@@ -4861,8 +4864,9 @@ static int fiji_unfreeze_sclk_mclk_dpm(struct pp_hwmgr *hwmgr) ...@@ -4861,8 +4864,9 @@ static int fiji_unfreeze_sclk_mclk_dpm(struct pp_hwmgr *hwmgr)
if ((0 == data->mclk_dpm_key_disabled) && if ((0 == data->mclk_dpm_key_disabled) &&
(data->need_update_smu7_dpm_table & DPMTABLE_OD_UPDATE_MCLK)) { (data->need_update_smu7_dpm_table & DPMTABLE_OD_UPDATE_MCLK)) {
PP_ASSERT_WITH_CODE(true == fiji_is_dpm_running(hwmgr), PP_ASSERT_WITH_CODE(fiji_is_dpm_running(hwmgr),
"Trying to Unfreeze MCLK DPM when DPM is disabled",); "Trying to Unfreeze MCLK DPM when DPM is disabled",
);
PP_ASSERT_WITH_CODE(0 == smum_send_msg_to_smc(hwmgr->smumgr, PP_ASSERT_WITH_CODE(0 == smum_send_msg_to_smc(hwmgr->smumgr,
PPSMC_MSG_SCLKDPM_UnfreezeLevel), PPSMC_MSG_SCLKDPM_UnfreezeLevel),
"Failed to unfreeze MCLK DPM during UnFreezeSclkMclkDPM Function!", "Failed to unfreeze MCLK DPM during UnFreezeSclkMclkDPM Function!",
......
drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c
View file @ 4ba27f9b
...@@ -4149,8 +4149,8 @@ static int polaris10_freeze_sclk_mclk_dpm(struct pp_hwmgr *hwmgr) ...@@ -4149,8 +4149,8 @@ static int polaris10_freeze_sclk_mclk_dpm(struct pp_hwmgr *hwmgr)
if ((0 == data->sclk_dpm_key_disabled) && if ((0 == data->sclk_dpm_key_disabled) &&
(data->need_update_smu7_dpm_table & (data->need_update_smu7_dpm_table &
(DPMTABLE_OD_UPDATE_SCLK + DPMTABLE_UPDATE_SCLK))) { (DPMTABLE_OD_UPDATE_SCLK + DPMTABLE_UPDATE_SCLK))) {
PP_ASSERT_WITH_CODE(true == polaris10_is_dpm_running(hwmgr), PP_ASSERT_WITH_CODE(polaris10_is_dpm_running(hwmgr),
"Trying to freeze SCLK DPM when DPM is disabled", "Trying to freeze SCLK DPM when DPM is disabled",
); );
PP_ASSERT_WITH_CODE(0 == smum_send_msg_to_smc(hwmgr->smumgr, PP_ASSERT_WITH_CODE(0 == smum_send_msg_to_smc(hwmgr->smumgr,
PPSMC_MSG_SCLKDPM_FreezeLevel), PPSMC_MSG_SCLKDPM_FreezeLevel),
...@@ -4161,8 +4161,8 @@ static int polaris10_freeze_sclk_mclk_dpm(struct pp_hwmgr *hwmgr) ...@@ -4161,8 +4161,8 @@ static int polaris10_freeze_sclk_mclk_dpm(struct pp_hwmgr *hwmgr)
if ((0 == data->mclk_dpm_key_disabled) && if ((0 == data->mclk_dpm_key_disabled) &&
(data->need_update_smu7_dpm_table & (data->need_update_smu7_dpm_table &
DPMTABLE_OD_UPDATE_MCLK)) { DPMTABLE_OD_UPDATE_MCLK)) {
PP_ASSERT_WITH_CODE(true == polaris10_is_dpm_running(hwmgr), PP_ASSERT_WITH_CODE(polaris10_is_dpm_running(hwmgr),
"Trying to freeze MCLK DPM when DPM is disabled", "Trying to freeze MCLK DPM when DPM is disabled",
); );
PP_ASSERT_WITH_CODE(0 == smum_send_msg_to_smc(hwmgr->smumgr, PP_ASSERT_WITH_CODE(0 == smum_send_msg_to_smc(hwmgr->smumgr,
PPSMC_MSG_MCLKDPM_FreezeLevel), PPSMC_MSG_MCLKDPM_FreezeLevel),
...@@ -4552,8 +4552,8 @@ static int polaris10_unfreeze_sclk_mclk_dpm(struct pp_hwmgr *hwmgr) ...@@ -4552,8 +4552,8 @@ static int polaris10_unfreeze_sclk_mclk_dpm(struct pp_hwmgr *hwmgr)
(data->need_update_smu7_dpm_table & (data->need_update_smu7_dpm_table &
(DPMTABLE_OD_UPDATE_SCLK + DPMTABLE_UPDATE_SCLK))) { (DPMTABLE_OD_UPDATE_SCLK + DPMTABLE_UPDATE_SCLK))) {
PP_ASSERT_WITH_CODE(true == polaris10_is_dpm_running(hwmgr), PP_ASSERT_WITH_CODE(polaris10_is_dpm_running(hwmgr),
"Trying to Unfreeze SCLK DPM when DPM is disabled", "Trying to Unfreeze SCLK DPM when DPM is disabled",
); );
PP_ASSERT_WITH_CODE(0 == smum_send_msg_to_smc(hwmgr->smumgr, PP_ASSERT_WITH_CODE(0 == smum_send_msg_to_smc(hwmgr->smumgr,
PPSMC_MSG_SCLKDPM_UnfreezeLevel), PPSMC_MSG_SCLKDPM_UnfreezeLevel),
...@@ -4564,8 +4564,8 @@ static int polaris10_unfreeze_sclk_mclk_dpm(struct pp_hwmgr *hwmgr) ...@@ -4564,8 +4564,8 @@ static int polaris10_unfreeze_sclk_mclk_dpm(struct pp_hwmgr *hwmgr)
if ((0 == data->mclk_dpm_key_disabled) && if ((0 == data->mclk_dpm_key_disabled) &&
(data->need_update_smu7_dpm_table & DPMTABLE_OD_UPDATE_MCLK)) { (data->need_update_smu7_dpm_table & DPMTABLE_OD_UPDATE_MCLK)) {
PP_ASSERT_WITH_CODE(true == polaris10_is_dpm_running(hwmgr), PP_ASSERT_WITH_CODE(polaris10_is_dpm_running(hwmgr),
"Trying to Unfreeze MCLK DPM when DPM is disabled", "Trying to Unfreeze MCLK DPM when DPM is disabled",
); );
PP_ASSERT_WITH_CODE(0 == smum_send_msg_to_smc(hwmgr->smumgr, PP_ASSERT_WITH_CODE(0 == smum_send_msg_to_smc(hwmgr->smumgr,
PPSMC_MSG_SCLKDPM_UnfreezeLevel), PPSMC_MSG_SCLKDPM_UnfreezeLevel),
......
drivers/gpu/drm/amd/powerplay/hwmgr/pp_acpi.c
View file @ 4ba27f9b
...@@ -66,7 +66,7 @@ int acpi_pcie_perf_request(void *device, uint8_t perf_req, bool advertise) ...@@ -66,7 +66,7 @@ int acpi_pcie_perf_request(void *device, uint8_t perf_req, bool advertise)
int result; int result;
struct cgs_system_info info = {0}; struct cgs_system_info info = {0};
if( 0 != acpi_atcs_notify_pcie_device_ready(device)) if (acpi_atcs_notify_pcie_device_ready(device))
return -EINVAL; return -EINVAL;
info.size = sizeof(struct cgs_system_info); info.size = sizeof(struct cgs_system_info);
......
drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c
View file @ 4ba27f9b
...@@ -571,7 +571,7 @@ int tonga_disable_sclk_mclk_dpm(struct pp_hwmgr *hwmgr) ...@@ -571,7 +571,7 @@ int tonga_disable_sclk_mclk_dpm(struct pp_hwmgr *hwmgr)
if (0 == data->sclk_dpm_key_disabled) { if (0 == data->sclk_dpm_key_disabled) {
/* Checking if DPM is running. If we discover hang because of this, we should skip this message.*/ /* Checking if DPM is running. If we discover hang because of this, we should skip this message.*/
PP_ASSERT_WITH_CODE( PP_ASSERT_WITH_CODE(
(0 == tonga_is_dpm_running(hwmgr)), !tonga_is_dpm_running(hwmgr),
"Trying to Disable SCLK DPM when DPM is disabled", "Trying to Disable SCLK DPM when DPM is disabled",
return -1 return -1
); );
...@@ -587,7 +587,7 @@ int tonga_disable_sclk_mclk_dpm(struct pp_hwmgr *hwmgr) ...@@ -587,7 +587,7 @@ int tonga_disable_sclk_mclk_dpm(struct pp_hwmgr *hwmgr)
if (0 == data->mclk_dpm_key_disabled) { if (0 == data->mclk_dpm_key_disabled) {
/* Checking if DPM is running. If we discover hang because of this, we should skip this message. */ /* Checking if DPM is running. If we discover hang because of this, we should skip this message. */
PP_ASSERT_WITH_CODE( PP_ASSERT_WITH_CODE(
(0 == tonga_is_dpm_running(hwmgr)), !tonga_is_dpm_running(hwmgr),
"Trying to Disable MCLK DPM when DPM is disabled", "Trying to Disable MCLK DPM when DPM is disabled",
return -1 return -1
); );
...@@ -614,7 +614,7 @@ int tonga_stop_dpm(struct pp_hwmgr *hwmgr) ...@@ -614,7 +614,7 @@ int tonga_stop_dpm(struct pp_hwmgr *hwmgr)
if (0 == data->pcie_dpm_key_disabled) { if (0 == data->pcie_dpm_key_disabled) {
/* Checking if DPM is running. If we discover hang because of this, we should skip this message.*/ /* Checking if DPM is running. If we discover hang because of this, we should skip this message.*/
PP_ASSERT_WITH_CODE( PP_ASSERT_WITH_CODE(
(0 == tonga_is_dpm_running(hwmgr)), !tonga_is_dpm_running(hwmgr),
"Trying to Disable PCIE DPM when DPM is disabled", "Trying to Disable PCIE DPM when DPM is disabled",
return -1 return -1
); );
...@@ -630,7 +630,7 @@ int tonga_stop_dpm(struct pp_hwmgr *hwmgr) ...@@ -630,7 +630,7 @@ int tonga_stop_dpm(struct pp_hwmgr *hwmgr)
/* Checking if DPM is running. If we discover hang because of this, we should skip this message.*/ /* Checking if DPM is running. If we discover hang because of this, we should skip this message.*/
PP_ASSERT_WITH_CODE( PP_ASSERT_WITH_CODE(
(0 == tonga_is_dpm_running(hwmgr)), !tonga_is_dpm_running(hwmgr),
"Trying to Disable Voltage CNTL when DPM is disabled", "Trying to Disable Voltage CNTL when DPM is disabled",
return -1 return -1
); );
...@@ -688,8 +688,9 @@ int tonga_dpm_force_state(struct pp_hwmgr *hwmgr, uint32_t n) ...@@ -688,8 +688,9 @@ int tonga_dpm_force_state(struct pp_hwmgr *hwmgr, uint32_t n)
uint32_t level_mask = 1 << n; uint32_t level_mask = 1 << n;
/* Checking if DPM is running. If we discover hang because of this, we should skip this message. */ /* Checking if DPM is running. If we discover hang because of this, we should skip this message. */
PP_ASSERT_WITH_CODE(0 == tonga_is_dpm_running(hwmgr), PP_ASSERT_WITH_CODE(!tonga_is_dpm_running(hwmgr),
"Trying to force SCLK when DPM is disabled", return -1;); "Trying to force SCLK when DPM is disabled",
return -1;);
if (0 == data->sclk_dpm_key_disabled) if (0 == data->sclk_dpm_key_disabled)
return (0 == smum_send_msg_to_smc_with_parameter( return (0 == smum_send_msg_to_smc_with_parameter(
hwmgr->smumgr, hwmgr->smumgr,
...@@ -712,8 +713,9 @@ int tonga_dpm_force_state_mclk(struct pp_hwmgr *hwmgr, uint32_t n) ...@@ -712,8 +713,9 @@ int tonga_dpm_force_state_mclk(struct pp_hwmgr *hwmgr, uint32_t n)
uint32_t level_mask = 1 << n; uint32_t level_mask = 1 << n;
/* Checking if DPM is running. If we discover hang because of this, we should skip this message. */ /* Checking if DPM is running. If we discover hang because of this, we should skip this message. */
PP_ASSERT_WITH_CODE(0 == tonga_is_dpm_running(hwmgr), PP_ASSERT_WITH_CODE(!tonga_is_dpm_running(hwmgr),
"Trying to Force MCLK when DPM is disabled", return -1;); "Trying to Force MCLK when DPM is disabled",
return -1;);
if (0 == data->mclk_dpm_key_disabled) if (0 == data->mclk_dpm_key_disabled)
return (0 == smum_send_msg_to_smc_with_parameter( return (0 == smum_send_msg_to_smc_with_parameter(
hwmgr->smumgr, hwmgr->smumgr,
...@@ -735,8 +737,9 @@ int tonga_dpm_force_state_pcie(struct pp_hwmgr *hwmgr, uint32_t n) ...@@ -735,8 +737,9 @@ int tonga_dpm_force_state_pcie(struct pp_hwmgr *hwmgr, uint32_t n)
tonga_hwmgr *data = (tonga_hwmgr *)(hwmgr->backend); tonga_hwmgr *data = (tonga_hwmgr *)(hwmgr->backend);
/* Checking if DPM is running. If we discover hang because of this, we should skip this message.*/ /* Checking if DPM is running. If we discover hang because of this, we should skip this message.*/
PP_ASSERT_WITH_CODE(0 == tonga_is_dpm_running(hwmgr), PP_ASSERT_WITH_CODE(!tonga_is_dpm_running(hwmgr),
"Trying to Force PCIE level when DPM is disabled", return -1;); "Trying to Force PCIE level when DPM is disabled",
return -1;);
if (0 == data->pcie_dpm_key_disabled) if (0 == data->pcie_dpm_key_disabled)
return (0 == smum_send_msg_to_smc_with_parameter( return (0 == smum_send_msg_to_smc_with_parameter(
hwmgr->smumgr, hwmgr->smumgr,
...@@ -955,7 +958,7 @@ int tonga_check_for_dpm_running(struct pp_hwmgr *hwmgr) ...@@ -955,7 +958,7 @@ int tonga_check_for_dpm_running(struct pp_hwmgr *hwmgr)
* because we may have test scenarios that need us intentionly disable SCLK/MCLK DPM, * because we may have test scenarios that need us intentionly disable SCLK/MCLK DPM,
* whereas voltage control is a fundemental change that will not be disabled * whereas voltage control is a fundemental change that will not be disabled
*/ */
return (0 == tonga_is_dpm_running(hwmgr) ? 0 : 1); return (!tonga_is_dpm_running(hwmgr) ? 0 : 1);
} }
/** /**
...@@ -968,7 +971,7 @@ int tonga_check_for_dpm_stopped(struct pp_hwmgr *hwmgr) ...@@ -968,7 +971,7 @@ int tonga_check_for_dpm_stopped(struct pp_hwmgr *hwmgr)
{ {
tonga_hwmgr *data = (tonga_hwmgr *)(hwmgr->backend); tonga_hwmgr *data = (tonga_hwmgr *)(hwmgr->backend);
if (0 != tonga_is_dpm_running(hwmgr)) { if (tonga_is_dpm_running(hwmgr)) {
/* If HW Virtualization is enabled, dpm_table_start will not have a valid value */ /* If HW Virtualization is enabled, dpm_table_start will not have a valid value */
if (!data->dpm_table_start) { if (!data->dpm_table_start) {
return 1; return 1;
...@@ -2042,7 +2045,7 @@ static int tonga_populate_single_memory_level( ...@@ -2042,7 +2045,7 @@ static int tonga_populate_single_memory_level(
if ((data->mclk_stutter_mode_threshold != 0) && if ((data->mclk_stutter_mode_threshold != 0) &&
(memory_clock <= data->mclk_stutter_mode_threshold) && (memory_clock <= data->mclk_stutter_mode_threshold) &&
(data->is_uvd_enabled == 0) (!data->is_uvd_enabled)
&& (PHM_READ_FIELD(hwmgr->device, DPG_PIPE_STUTTER_CONTROL, STUTTER_ENABLE) & 0x1) && (PHM_READ_FIELD(hwmgr->device, DPG_PIPE_STUTTER_CONTROL, STUTTER_ENABLE) & 0x1)
&& (data->display_timing.num_existing_displays <= 2) && (data->display_timing.num_existing_displays <= 2)
&& (data->display_timing.num_existing_displays != 0)) && (data->display_timing.num_existing_displays != 0))
...@@ -3134,7 +3137,7 @@ int tonga_upload_dpm_level_enable_mask(struct pp_hwmgr *hwmgr) ...@@ -3134,7 +3137,7 @@ int tonga_upload_dpm_level_enable_mask(struct pp_hwmgr *hwmgr)
if (0 == data->sclk_dpm_key_disabled) { if (0 == data->sclk_dpm_key_disabled) {
/* Checking if DPM is running. If we discover hang because of this, we should skip this message.*/ /* Checking if DPM is running. If we discover hang because of this, we should skip this message.*/
if (0 != tonga_is_dpm_running(hwmgr)) if (tonga_is_dpm_running(hwmgr))
printk(KERN_ERR "[ powerplay ] Trying to set Enable Mask when DPM is disabled \n"); printk(KERN_ERR "[ powerplay ] Trying to set Enable Mask when DPM is disabled \n");
if (0 != data->dpm_level_enable_mask.sclk_dpm_enable_mask) { if (0 != data->dpm_level_enable_mask.sclk_dpm_enable_mask) {
...@@ -3149,7 +3152,7 @@ int tonga_upload_dpm_level_enable_mask(struct pp_hwmgr *hwmgr) ...@@ -3149,7 +3152,7 @@ int tonga_upload_dpm_level_enable_mask(struct pp_hwmgr *hwmgr)
if (0 == data->mclk_dpm_key_disabled) { if (0 == data->mclk_dpm_key_disabled) {
/* Checking if DPM is running. If we discover hang because of this, we should skip this message.*/ /* Checking if DPM is running. If we discover hang because of this, we should skip this message.*/
if (0 != tonga_is_dpm_running(hwmgr)) if (tonga_is_dpm_running(hwmgr))
printk(KERN_ERR "[ powerplay ] Trying to set Enable Mask when DPM is disabled \n"); printk(KERN_ERR "[ powerplay ] Trying to set Enable Mask when DPM is disabled \n");
if (0 != data->dpm_level_enable_mask.mclk_dpm_enable_mask) { if (0 != data->dpm_level_enable_mask.mclk_dpm_enable_mask) {
...@@ -3335,9 +3338,9 @@ int tonga_unforce_dpm_levels(struct pp_hwmgr *hwmgr) ...@@ -3335,9 +3338,9 @@ int tonga_unforce_dpm_levels(struct pp_hwmgr *hwmgr)
tonga_hwmgr *data = (tonga_hwmgr *)(hwmgr->backend); tonga_hwmgr *data = (tonga_hwmgr *)(hwmgr->backend);
int result = 1; int result = 1;
PP_ASSERT_WITH_CODE (0 == tonga_is_dpm_running(hwmgr), PP_ASSERT_WITH_CODE (!tonga_is_dpm_running(hwmgr),
"Trying to Unforce DPM when DPM is disabled. Returning without sending SMC message.", "Trying to Unforce DPM when DPM is disabled. Returning without sending SMC message.",
return result); return result);
if (0 == data->pcie_dpm_key_disabled) { if (0 == data->pcie_dpm_key_disabled) {
PP_ASSERT_WITH_CODE((0 == smum_send_msg_to_smc( PP_ASSERT_WITH_CODE((0 == smum_send_msg_to_smc(
...@@ -5308,9 +5311,8 @@ static int tonga_freeze_sclk_mclk_dpm(struct pp_hwmgr *hwmgr) ...@@ -5308,9 +5311,8 @@ static int tonga_freeze_sclk_mclk_dpm(struct pp_hwmgr *hwmgr)
if ((0 == data->sclk_dpm_key_disabled) && if ((0 == data->sclk_dpm_key_disabled) &&
(data->need_update_smu7_dpm_table & (data->need_update_smu7_dpm_table &
(DPMTABLE_OD_UPDATE_SCLK + DPMTABLE_UPDATE_SCLK))) { (DPMTABLE_OD_UPDATE_SCLK + DPMTABLE_UPDATE_SCLK))) {
PP_ASSERT_WITH_CODE( PP_ASSERT_WITH_CODE(!tonga_is_dpm_running(hwmgr),
0 == tonga_is_dpm_running(hwmgr), "Trying to freeze SCLK DPM when DPM is disabled",
"Trying to freeze SCLK DPM when DPM is disabled",
); );
PP_ASSERT_WITH_CODE( PP_ASSERT_WITH_CODE(
0 == smum_send_msg_to_smc(hwmgr->smumgr, 0 == smum_send_msg_to_smc(hwmgr->smumgr,
...@@ -5322,8 +5324,8 @@ static int tonga_freeze_sclk_mclk_dpm(struct pp_hwmgr *hwmgr) ...@@ -5322,8 +5324,8 @@ static int tonga_freeze_sclk_mclk_dpm(struct pp_hwmgr *hwmgr)
if ((0 == data->mclk_dpm_key_disabled) && if ((0 == data->mclk_dpm_key_disabled) &&
(data->need_update_smu7_dpm_table & (data->need_update_smu7_dpm_table &
DPMTABLE_OD_UPDATE_MCLK)) { DPMTABLE_OD_UPDATE_MCLK)) {
PP_ASSERT_WITH_CODE(0 == tonga_is_dpm_running(hwmgr), PP_ASSERT_WITH_CODE(!tonga_is_dpm_running(hwmgr),
"Trying to freeze MCLK DPM when DPM is disabled", "Trying to freeze MCLK DPM when DPM is disabled",
); );
PP_ASSERT_WITH_CODE( PP_ASSERT_WITH_CODE(
0 == smum_send_msg_to_smc(hwmgr->smumgr, 0 == smum_send_msg_to_smc(hwmgr->smumgr,
...@@ -5625,8 +5627,8 @@ static int tonga_unfreeze_sclk_mclk_dpm(struct pp_hwmgr *hwmgr) ...@@ -5625,8 +5627,8 @@ static int tonga_unfreeze_sclk_mclk_dpm(struct pp_hwmgr *hwmgr)
(data->need_update_smu7_dpm_table & (data->need_update_smu7_dpm_table &
(DPMTABLE_OD_UPDATE_SCLK + DPMTABLE_UPDATE_SCLK))) { (DPMTABLE_OD_UPDATE_SCLK + DPMTABLE_UPDATE_SCLK))) {
PP_ASSERT_WITH_CODE(0 == tonga_is_dpm_running(hwmgr), PP_ASSERT_WITH_CODE(!tonga_is_dpm_running(hwmgr),
"Trying to Unfreeze SCLK DPM when DPM is disabled", "Trying to Unfreeze SCLK DPM when DPM is disabled",
); );
PP_ASSERT_WITH_CODE( PP_ASSERT_WITH_CODE(
0 == smum_send_msg_to_smc(hwmgr->smumgr, 0 == smum_send_msg_to_smc(hwmgr->smumgr,
...@@ -5638,9 +5640,8 @@ static int tonga_unfreeze_sclk_mclk_dpm(struct pp_hwmgr *hwmgr) ...@@ -5638,9 +5640,8 @@ static int tonga_unfreeze_sclk_mclk_dpm(struct pp_hwmgr *hwmgr)
if ((0 == data->mclk_dpm_key_disabled) && if ((0 == data->mclk_dpm_key_disabled) &&
(data->need_update_smu7_dpm_table & DPMTABLE_OD_UPDATE_MCLK)) { (data->need_update_smu7_dpm_table & DPMTABLE_OD_UPDATE_MCLK)) {
PP_ASSERT_WITH_CODE( PP_ASSERT_WITH_CODE(!tonga_is_dpm_running(hwmgr),
0 == tonga_is_dpm_running(hwmgr), "Trying to Unfreeze MCLK DPM when DPM is disabled",
"Trying to Unfreeze MCLK DPM when DPM is disabled",
); );
PP_ASSERT_WITH_CODE( PP_ASSERT_WITH_CODE(
0 == smum_send_msg_to_smc(hwmgr->smumgr, 0 == smum_send_msg_to_smc(hwmgr->smumgr,
......
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