Commit 4bbb2b22 authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Vinod Koul

dt-bindings: phy: samsung,usb2-phy: convert to dtschema

Convert the Samsung SoC USB 2.0 PHY bindings to DT schema format.

Except the conversion, add also vbus-supply property which was already
used by the driver and DTS.
Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220129193646.372481-5-krzysztof.kozlowski@canonical.comSigned-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent e15db37f
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/phy/samsung,usb2-phy.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Samsung S5P/Exynos SoC USB 2.0 PHY
maintainers:
- Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
- Marek Szyprowski <m.szyprowski@samsung.com>
- Sylwester Nawrocki <s.nawrocki@samsung.com>
description: |
The first phandle argument in the PHY specifier identifies the PHY, its
meaning is compatible dependent. For the currently supported SoCs (Exynos4210
and Exynos4212) it is as follows::
0 - USB device ("device"),
1 - USB host ("host"),
2 - HSIC0 ("hsic0"),
3 - HSIC1 ("hsic1"),
Exynos3250 has only USB device phy available as phy 0.
Exynos4210 and Exynos4212 use mode switching and require that mode switch
register is supplied.
properties:
compatible:
enum:
- samsung,exynos3250-usb2-phy
- samsung,exynos4210-usb2-phy
- samsung,exynos4x12-usb2-phy
- samsung,exynos5250-usb2-phy
- samsung,exynos5420-usb2-phy
- samsung,s5pv210-usb2-phy
clocks:
items:
- description: PHY module gate clock.
- description: Reference rate clock of PHY module.
clock-names:
items:
- const: phy
- const: ref
"#phy-cells":
const: 1
reg:
maxItems: 1
samsung,pmureg-phandle:
$ref: /schemas/types.yaml#/definitions/phandle
description:
Phandle to PMU system controller interface.
samsung,sysreg-phandle:
$ref: /schemas/types.yaml#/definitions/phandle
description:
Phandle to system registers interface.
vbus-supply:
description:
VBUS power source.
required:
- compatible
- clocks
- clock-names
- "#phy-cells"
- reg
- samsung,pmureg-phandle
allOf:
- if:
properties:
compatible:
contains:
enum:
- samsung,exynos4x12-usb2-phy
- samsung,exynos5250-usb2-phy
- samsung,exynos5420-usb2-phy
then:
required:
- samsung,sysreg-phandle
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/exynos5420.h>
phy@12130000 {
compatible = "samsung,exynos5420-usb2-phy";
reg = <0x12130000 0x100>;
#phy-cells = <1>;
clocks = <&clock CLK_USBH20>, <&clock CLK_SCLK_USBPHY300>;
clock-names = "phy", "ref";
samsung,sysreg-phandle = <&sysreg_system_controller>;
samsung,pmureg-phandle = <&pmu_system_controller>;
};
Samsung S5P/Exynos SoC series USB PHY
-------------------------------------------------
Required properties:
- compatible : should be one of the listed compatibles:
- "samsung,exynos3250-usb2-phy"
- "samsung,exynos4210-usb2-phy"
- "samsung,exynos4x12-usb2-phy"
- "samsung,exynos5250-usb2-phy"
- "samsung,exynos5420-usb2-phy"
- "samsung,s5pv210-usb2-phy"
- reg : a list of registers used by phy driver
- first and obligatory is the location of phy modules registers
- samsung,sysreg-phandle - handle to syscon used to control the system registers
- samsung,pmureg-phandle - handle to syscon used to control PMU registers
- #phy-cells : from the generic phy bindings, must be 1;
- clocks and clock-names:
- the "phy" clock is required by the phy module, used as a gate
- the "ref" clock is used to get the rate of the clock provided to the
PHY module
Optional properties:
- vbus-supply: power-supply phandle for vbus power source
The first phandle argument in the PHY specifier identifies the PHY, its
meaning is compatible dependent. For the currently supported SoCs (Exynos 4210
and Exynos 4212) it is as follows:
0 - USB device ("device"),
1 - USB host ("host"),
2 - HSIC0 ("hsic0"),
3 - HSIC1 ("hsic1"),
Exynos3250 has only USB device phy available as phy 0.
Exynos 4210 and Exynos 4212 use mode switching and require that mode switch
register is supplied.
Example:
For Exynos 4412 (compatible with Exynos 4212):
usbphy: phy@125b0000 {
compatible = "samsung,exynos4x12-usb2-phy";
reg = <0x125b0000 0x100>;
clocks = <&clock 305>, <&clock 2>;
clock-names = "phy", "ref";
#phy-cells = <1>;
samsung,sysreg-phandle = <&sys_reg>;
samsung,pmureg-phandle = <&pmu_reg>;
};
Then the PHY can be used in other nodes such as:
phy-consumer@12340000 {
phys = <&usbphy 2>;
phy-names = "phy";
};
Refer to DT bindings documentation of particular PHY consumer devices for more
information about required PHYs and the way of specification.
Samsung SATA PHY Controller
---------------------------
......
......@@ -17112,7 +17112,7 @@ SAMSUNG USB2 PHY DRIVER
M: Sylwester Nawrocki <s.nawrocki@samsung.com>
L: linux-kernel@vger.kernel.org
S: Supported
F: Documentation/devicetree/bindings/phy/samsung-phy.txt
F: Documentation/devicetree/bindings/phy/samsung,usb2-phy.yaml
F: Documentation/driver-api/phy/samsung-usb2.rst
F: drivers/phy/samsung/phy-exynos4210-usb2.c
F: drivers/phy/samsung/phy-exynos4x12-usb2.c
......
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