Commit 4d073292 authored by Tomi Valkeinen's avatar Tomi Valkeinen

fbdev: fix CVT vertical front and back porch values

CVT v1.1 spec says: "the vertical front porch shall in all cases be
fixed to 3 lines". The code in fbcvt.c instead sets the _back_ porch to
3 (plus margin).

After swapping cvt.v_front_porch and cvt.v_back_porch the resulting
timings were in line with CVT timings in VESA DMT spec.

The bug seems to be more than 9 years old, but I presume it has not been
noticed as usually the video timings come from the EDID or from the
timing tables in fbdev, and probably swapped values for vfp and vbp work
fine for most of the displays.
Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: default avatarDavid Ung <davidu@nvidia.com>
Cc: Antonino A. Daplas <adaplas@gmail.com>
parent 070a1783
...@@ -369,9 +369,9 @@ int fb_find_mode_cvt(struct fb_videomode *mode, int margins, int rb) ...@@ -369,9 +369,9 @@ int fb_find_mode_cvt(struct fb_videomode *mode, int margins, int rb)
cvt.h_back_porch = cvt.hblank/2 + cvt.h_margin; cvt.h_back_porch = cvt.hblank/2 + cvt.h_margin;
cvt.h_front_porch = cvt.hblank - cvt.hsync - cvt.h_back_porch + cvt.h_front_porch = cvt.hblank - cvt.hsync - cvt.h_back_porch +
2 * cvt.h_margin; 2 * cvt.h_margin;
cvt.v_back_porch = 3 + cvt.v_margin; cvt.v_front_porch = 3 + cvt.v_margin;
cvt.v_front_porch = cvt.vtotal - cvt.yres/cvt.interlace - cvt.v_back_porch = cvt.vtotal - cvt.yres/cvt.interlace -
cvt.v_back_porch - cvt.vsync; cvt.v_front_porch - cvt.vsync;
fb_cvt_print_name(&cvt); fb_cvt_print_name(&cvt);
fb_cvt_convert_to_mode(&cvt, mode); fb_cvt_convert_to_mode(&cvt, mode);
......
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