Commit 4f0f234f authored by Michal Simek's avatar Michal Simek

arm: zynq: Move timer to generic location

Move zynq timer out of mach folder to generic location
and enable it.
Signed-off-by: default avatarMichal Simek <michal.simek@xilinx.com>
parent 9e09dc5f
Cadence TTC - Triple Timer Counter
Required properties:
- compatible : Should be "cdns,ttc".
- reg : Specifies base physical address and size of the registers.
- interrupts : A list of 3 interrupts; one per timer channel.
- clocks: phandle to the source clock
Example:
ttc0: ttc0@f8001000 {
interrupt-parent = <&intc>;
interrupts = < 0 10 4 0 11 4 0 12 4 >;
compatible = "cdns,ttc";
reg = <0xF8001000 0x1000>;
clocks = <&cpu_clk 3>;
};
......@@ -9,5 +9,6 @@ config ARCH_ZYNQ
select MIGHT_HAVE_CACHE_L2X0
select USE_OF
select SPARSE_IRQ
select CADENCE_TTC_TIMER
help
Support for Xilinx Zynq ARM Cortex A9 Platform
......@@ -3,4 +3,4 @@
#
# Common support
obj-y := common.o timer.o
obj-y := common.o
......@@ -31,6 +31,9 @@ config SUNXI_TIMER
config VT8500_TIMER
bool
config CADENCE_TTC_TIMER
bool
config CLKSRC_NOMADIK_MTU
bool
depends on (ARCH_NOMADIK || ARCH_U8500)
......
......@@ -19,6 +19,7 @@ obj-$(CONFIG_ARCH_BCM2835) += bcm2835_timer.o
obj-$(CONFIG_SUNXI_TIMER) += sunxi_timer.o
obj-$(CONFIG_ARCH_TEGRA) += tegra20_timer.o
obj-$(CONFIG_VT8500_TIMER) += vt8500_timer.o
obj-$(CONFIG_CADENCE_TTC_TIMER) += cadence_ttc_timer.o
obj-$(CONFIG_ARM_ARCH_TIMER) += arm_arch_timer.o
obj-$(CONFIG_CLKSRC_METAG_GENERIC) += metag_generic.o
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