Commit 4f662ba2 authored by Arnd Bergmann's avatar Arnd Bergmann

Merge tag 'imx-dt-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt

i.MX device tree change for 5.13:

- New board support: i.MX7D based reMarkable2.
- Clean up imx6ql-pfla02 hog group by moving pins into corresponded
  client groups.
- Add Netronix embedded controller for imx50-kobo-aura.
- A series from Sebastian Reichel to improve GE Bx50v3 device trees.
- Support I2C bus recovery for imx6qdl-wandboard by adding SCL/SDA
  GPIOs.
- Remove unnecessary #address-cells/#size-cells from imx6qdl-gw boards.
- Various small and random device tree update.

* tag 'imx-dt-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (21 commits)
  ARM: dts: imx6: pbab01: Set USB OTG port to peripheral
  ARM: dts: imx6: pfla02: Fix USB vbus enable pinmuxing
  ARM: imx7d-remarkable2: Initial device tree for reMarkable2
  ARM: dts: imx7d-mba7: Remove unsupported PCI properties
  ARM: dts: imx6qdl-gw*: Remove unnecessary #address-cells/#size-cells
  ARM: dts: imx6dl-plybas: Fix gpio-keys W=1 warnings
  ARM: dts: imx: bx50v3: Define GPIO line names
  ARM: dts: imx: bx50v3: i2c GPIOs are open drain
  ARM: dts: imx6q-ba16: improve PHY information
  ARM: dts: imx6q-ba16: add USB OTG VBUS enable GPIO
  ARM: dts: ls1021a: mark crypto engine dma coherent
  ARM: dts: colibri-imx6ull: Change drive strength for usdhc2
  ARM: dts: imx6ql-pfla02: Move "hog" pins into corresponded pin groups
  ARM: dts: imx6qdl-phytec-pbab01: Select synchronous mode for AUDMUX
  ARM: dts: imx6qdl-ts7970: Drop redundant "fsl,mode" option
  ARM: dts: imx53-qsb: Describe the esdhc1 card detect pin
  ARM: dts: ls1021a: Harmonize DWC USB3 DT nodes name
  ARM: dts: imx6qdl-wandboard: add scl/sda gpios definitions for i2c bus recovery
  ARM: dts: imx: Mark IIM as syscon on i.MX51/i.MX53
  ARM: dts: imx6sl-tolino-shine2hd: Add Netronix embedded controller
  ...

Link: https://lore.kernel.org/r/20210331041019.31345-4-shawnguo@kernel.orgSigned-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 2771bc0d 45b78dd3
......@@ -660,6 +660,7 @@ dtb-$(CONFIG_SOC_IMX7D) += \
imx7d-pico-hobbit.dtb \
imx7d-pico-nymph.dtb \
imx7d-pico-pi.dtb \
imx7d-remarkable2.dtb \
imx7d-sbc-imx7.dtb \
imx7d-sdb.dtb \
imx7d-sdb-reva.dtb \
......
......@@ -143,10 +143,24 @@ &i2c3 {
pinctrl-0 = <&pinctrl_i2c3>;
status = "okay";
/* TODO: embedded controller at 0x43 */
embedded-controller@43 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ec>;
compatible = "netronix,ntxec";
reg = <0x43>;
system-power-controller;
interrupts-extended = <&gpio4 11 IRQ_TYPE_EDGE_FALLING>;
#pwm-cells = <2>;
};
};
&iomuxc {
pinctrl_ec: ecgrp {
fsl,pins = <
MX50_PAD_CSPI_SS0__GPIO4_11 0x0 /* INT */
>;
};
pinctrl_gpiokeys: gpiokeysgrp {
fsl,pins = <
MX50_PAD_CSPI_MISO__GPIO4_10 0x0
......
......@@ -467,7 +467,7 @@ aipstz2: bridge@83f00000 {
};
iim: efuse@83f98000 {
compatible = "fsl,imx51-iim", "fsl,imx27-iim";
compatible = "fsl,imx51-iim", "fsl,imx27-iim", "syscon";
reg = <0x83f98000 0x4000>;
interrupts = <69>;
clocks = <&clks IMX5_CLK_IIM_GATE>;
......
......@@ -142,6 +142,7 @@ &cpu0 {
&esdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esdhc1>;
cd-gpios = <&gpio3 13 GPIO_ACTIVE_LOW>;
status = "okay";
};
......@@ -209,6 +210,7 @@ MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5
MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5
MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5
MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5
MX53_PAD_EIM_DA13__GPIO3_13 0xe4
>;
};
......
......@@ -668,7 +668,7 @@ aipstz2: bridge@63f00000 {
};
iim: efuse@63f98000 {
compatible = "fsl,imx53-iim", "fsl,imx27-iim";
compatible = "fsl,imx53-iim", "fsl,imx27-iim", "syscon";
reg = <0x63f98000 0x4000>;
interrupts = <69>;
clocks = <&clks IMX5_CLK_IIM_GATE>;
......
......@@ -19,17 +19,15 @@ chosen {
gpio_keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
autorepeat;
button@20 {
button-start {
label = "START";
linux,code = <31>;
gpios = <&gpio5 8 GPIO_ACTIVE_LOW>;
};
button@21 {
button-clean {
label = "CLEAN";
linux,code = <46>;
gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
......
......@@ -84,6 +84,11 @@ lvds0_out: endpoint {
};
&pca9539 {
gpio-line-names = "AMB_P_INT1#", "AMB_P_INT2#", "BT_EN", "WLAN_EN",
"", "SM_D_ACT", "DP1_RST#", "",
"WD15S_EN", "WD15S_DIS#", "", "",
"", "", "", "";
P04-hog {
gpio-hog;
gpios = <4 0>;
......
......@@ -84,6 +84,11 @@ lvds0_out: endpoint {
};
&pca9539 {
gpio-line-names = "AMB_P_INT1#", "AMB_P_INT2#", "BT_EN", "WLAN_EN",
"", "SM_D_ACT", "DP1_RST#", "",
"WD15S_EN", "WD15S_DIS#", "", "",
"", "", "", "";
P07-hog {
gpio-hog;
gpios = <7 0>;
......
......@@ -199,6 +199,11 @@ stdp4028_out: endpoint {
};
&pca9539 {
gpio-line-names = "AMB_P_INT1#", "AMB_P_INT2#", "BT_EN", "WLAN_EN",
"REMOTE_ON_PML#", "SM_D_ACT", "DP1_RST#", "DP2_RST#",
"", "", "", "",
"", "", "", "";
P10-hog {
gpio-hog;
gpios = <8 0>;
......
......@@ -124,6 +124,9 @@ reg_usb_otg_vbus: regulator-usbotgvbus {
regulator-name = "usb_otg_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
pinctrl-0 = <&pinctrl_usbotg_vbus>;
gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};
......@@ -172,7 +175,19 @@ &fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii-id";
phy-supply = <&reg_3p3v>;
phy-handle = <&phy0>;
status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
phy0: ethernet-phy@4 {
reg = <4>;
qca,clk-out-frequency = <125000000>;
};
};
};
&hdmi {
......@@ -575,6 +590,12 @@ MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
>;
};
pinctrl_usbotg_vbus: usbotgvbusgrp {
fsl,pins = <
MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x000b0
>;
};
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
......
......@@ -173,8 +173,8 @@ m25_eeprom: m25p80@0 {
&i2c1 {
pinctrl-names = "default", "gpio";
pinctrl-1 = <&pinctrl_i2c1_gpio>;
sda-gpios = <&gpio5 26 GPIO_ACTIVE_HIGH>;
scl-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>;
sda-gpios = <&gpio5 26 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
scl-gpios = <&gpio5 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
pca9547: mux@70 {
compatible = "nxp,pca9547";
......@@ -315,15 +315,15 @@ mux1_i2c8: i2c@7 {
&i2c2 {
pinctrl-names = "default", "gpio";
pinctrl-1 = <&pinctrl_i2c2_gpio>;
sda-gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>;
scl-gpios = <&gpio4 12 GPIO_ACTIVE_HIGH>;
sda-gpios = <&gpio4 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
scl-gpios = <&gpio4 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
};
&i2c3 {
pinctrl-names = "default", "gpio";
pinctrl-1 = <&pinctrl_i2c3_gpio>;
sda-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
scl-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
sda-gpios = <&gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
scl-gpios = <&gpio1 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
};
&iomuxc {
......
......@@ -32,8 +32,6 @@ backlight {
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
user-pb {
label = "user_pb";
......
......@@ -32,8 +32,6 @@ backlight {
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
user-pb {
label = "user_pb";
......
......@@ -33,8 +33,6 @@ backlight {
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
user-pb {
label = "user_pb";
......
......@@ -67,8 +67,6 @@ chosen {
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
user-pb {
label = "user_pb";
......
......@@ -24,8 +24,6 @@ chosen {
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
user-pb {
label = "user_pb";
......
......@@ -91,8 +91,6 @@ backlight-keypad {
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
user-pb {
label = "user_pb";
......
......@@ -75,8 +75,6 @@ backlight {
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
user-pb {
label = "user_pb";
......
......@@ -72,8 +72,6 @@ backlight {
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
user-pb {
label = "user_pb";
......
......@@ -23,8 +23,6 @@ chosen {
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
user-pb {
label = "user_pb";
......
......@@ -26,8 +26,6 @@ memory@10000000 {
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
user-pb {
label = "user_pb";
......
......@@ -24,8 +24,6 @@ chosen {
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
user-pb {
label = "user_pb";
......
......@@ -23,8 +23,6 @@ chosen {
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
user-pb {
label = "user_pb";
......
......@@ -78,7 +78,8 @@ &audmux {
ssi2 {
fsl,audmux-port = <1>;
fsl,port-config = <
(IMX_AUDMUX_V2_PTCR_TFSDIR |
(IMX_AUDMUX_V2_PTCR_SYN |
IMX_AUDMUX_V2_PTCR_TFSDIR |
IMX_AUDMUX_V2_PTCR_TFSEL(4) |
IMX_AUDMUX_V2_PTCR_TCLKDIR |
IMX_AUDMUX_V2_PTCR_TCSEL(4))
......@@ -89,7 +90,7 @@ IMX_AUDMUX_V2_PDCR_RXDSEL(4)
pins5 {
fsl,audmux-port = <4>;
fsl,port-config = <
0x00000000
IMX_AUDMUX_V2_PTCR_SYN
IMX_AUDMUX_V2_PDCR_RXDSEL(1)
>;
};
......@@ -164,6 +165,7 @@ &usbh1 {
&usbotg {
status = "okay";
dr_mode = "peripheral";
};
&usdhc2 {
......
......@@ -31,6 +31,8 @@ reg_usb_otg_vbus: regulator@0 {
reg_usb_h1_vbus: regulator@1 {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbh1_vbus>;
reg = <1>;
regulator-name = "usb_h1_vbus";
regulator-min-microvolt = <5000000>;
......@@ -41,6 +43,8 @@ reg_usb_h1_vbus: regulator@1 {
};
gpio_leds: leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_leds>;
compatible = "gpio-leds";
green {
......@@ -122,6 +126,8 @@ som_eeprom: eeprom@50 {
};
pmic@58 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pmic>;
compatible = "dlg,da9063";
reg = <0x58>;
interrupt-parent = <&gpio2>;
......@@ -215,25 +221,13 @@ &i2c3 {
};
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
imx6q-phytec-pfla02 {
pinctrl_hog: hoggrp {
fsl,pins = <
MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x80000000 /* SPI NOR chipselect */
MX6QDL_PAD_SD4_DAT1__GPIO2_IO09 0x80000000 /* PMIC interrupt */
MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* Green LED */
MX6QDL_PAD_EIM_EB3__GPIO2_IO31 0x80000000 /* Red LED */
>;
};
pinctrl_ecspi3: ecspi3grp {
fsl,pins = <
MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1
MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1
MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1
MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x80000000 /* CS0 */
>;
};
......@@ -255,6 +249,7 @@ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000 /* Reset GPIO */
>;
};
......@@ -308,10 +303,21 @@ MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
>;
};
pinctrl_leds: ledsgrp {
fsl,pins = <
MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* Green LED */
MX6QDL_PAD_EIM_EB3__GPIO2_IO31 0x80000000 /* Red LED */
>;
};
pinctrl_pcie: pciegrp {
fsl,pins = <MX6QDL_PAD_DI0_PIN15__GPIO4_IO17 0x80000000>;
};
pinctrl_pmic: pmicgrp {
fsl,pins = <MX6QDL_PAD_SD4_DAT1__GPIO2_IO09 0x80000000>; /* PMIC interrupt */
};
pinctrl_uart3: uart3grp {
fsl,pins = <
MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
......@@ -328,9 +334,9 @@ MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
>;
};
pinctrl_usbh1: usbh1grp {
pinctrl_usbh1_vbus: usbh1vbusgrp {
fsl,pins = <
MX6QDL_PAD_GPIO_0__USB_H1_PWR 0x80000000
MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0
>;
};
......@@ -415,8 +421,6 @@ &uart4 {
&usbh1 {
vbus-supply = <&reg_usb_h1_vbus>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbh1>;
status = "disabled";
};
......
......@@ -506,7 +506,6 @@ &snvs_rtc {
};
&ssi1 {
fsl,mode = "i2s-slave";
status = "okay";
};
......
......@@ -97,15 +97,21 @@ &hdmi {
&i2c1 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-names = "default", "gpio";
pinctrl-0 = <&pinctrl_i2c1>;
pinctrl-1 = <&pinctrl_i2c1_gpio>;
scl-gpios = <&gpio3 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpio3 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
status = "okay";
};
&i2c2 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-names = "default", "gpio";
pinctrl-0 = <&pinctrl_i2c2>;
pinctrl-1 = <&pinctrl_i2c2_gpio>;
scl-gpios = <&gpio4 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpio4 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
status = "okay";
codec: sgtl5000@a {
......@@ -185,6 +191,13 @@ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
>;
};
pinctrl_i2c1_gpio: i2c1gpiogrp {
fsl,pins = <
MX6QDL_PAD_EIM_D21__GPIO3_IO21 0x4001b8b0
MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x4001b8b0
>;
};
pinctrl_i2c2: i2c2grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
......@@ -192,6 +205,13 @@ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
>;
};
pinctrl_i2c2_gpio: i2c2gpiogrp {
fsl,pins = <
MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x4001b8b0
MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x4001b8b0
>;
};
pinctrl_mclk: mclkgrp {
fsl,pins = <
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
......
......@@ -97,8 +97,11 @@ &i2c1 {
pinctrl-1 = <&pinctrl_i2c1_sleep>;
status = "okay";
/* TODO: embedded controller at 0x43 (driver missing) */
ec: embedded-controller@43 {
compatible = "netronix,ntxec";
reg = <0x43>;
#pwm-cells = <2>;
};
};
&i2c2 {
......
......@@ -522,12 +522,12 @@ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9
pinctrl_usdhc2: usdhc2-grp {
fsl,pins = <
MX6UL_PAD_CSI_DATA00__USDHC2_DATA0 0x17059
MX6UL_PAD_CSI_DATA01__USDHC2_DATA1 0x17059
MX6UL_PAD_CSI_DATA02__USDHC2_DATA2 0x17059
MX6UL_PAD_CSI_DATA03__USDHC2_DATA3 0x17059
MX6UL_PAD_CSI_HSYNC__USDHC2_CMD 0x17059
MX6UL_PAD_CSI_VSYNC__USDHC2_CLK 0x17059
MX6UL_PAD_CSI_DATA00__USDHC2_DATA0 0x17069
MX6UL_PAD_CSI_DATA01__USDHC2_DATA1 0x17069
MX6UL_PAD_CSI_DATA02__USDHC2_DATA2 0x17069
MX6UL_PAD_CSI_DATA03__USDHC2_DATA3 0x17069
MX6UL_PAD_CSI_HSYNC__USDHC2_CMD 0x17069
MX6UL_PAD_CSI_VSYNC__USDHC2_CLK 0x17069
MX6UL_PAD_GPIO1_IO03__OSC32K_32K_OUT 0x10
>;
......
......@@ -99,8 +99,6 @@ &pcie {
/* probe deferral not supported */
/* pcie-bus-supply = <&reg_mpcie_1v5>; */
reset-gpio = <&gpio5 12 GPIO_ACTIVE_LOW>;
disable-gpio = <&gpio2 29 GPIO_ACTIVE_LOW>;
power-on-gpio = <&gpio2 30 GPIO_ACTIVE_LOW>;
status = "okay";
};
......
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2015 Freescale Semiconductor, Inc.
* Copyright (C) 2019 reMarkable AS - http://www.remarkable.com/
*
*/
/dts-v1/;
#include "imx7d.dtsi"
/ {
model = "reMarkable 2.0";
compatible = "remarkable,imx7d-remarkable2", "fsl,imx7d";
chosen {
stdout-path = &uart6;
};
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x40000000>;
};
};
&clks {
assigned-clocks = <&clks IMX7D_CLKO2_ROOT_SRC>,
<&clks IMX7D_CLKO2_ROOT_DIV>;
assigned-clock-parents = <&clks IMX7D_CKIL>;
assigned-clock-rates = <0>, <32768>;
};
&snvs_pwrkey {
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>;
assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
status = "okay";
};
&uart6 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart6>;
assigned-clocks = <&clks IMX7D_UART6_ROOT_SRC>;
assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
status = "okay";
};
&usbotg2 {
srp-disable;
hnp-disable;
status = "okay";
};
&usdhc3 {
pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
pinctrl-0 = <&pinctrl_usdhc3>;
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
pinctrl-3 = <&pinctrl_usdhc3>;
assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
assigned-clock-rates = <400000000>;
bus-width = <8>;
non-removable;
status = "okay";
};
&wdog1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_wdog>;
fsl,ext-reset-output;
};
&iomuxc {
pinctrl_uart1: uart1grp {
fsl,pins = <
MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX 0x79
MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX 0x79
>;
};
pinctrl_uart6: uart6grp {
fsl,pins = <
MX7D_PAD_EPDC_DATA09__UART6_DCE_TX 0x79
MX7D_PAD_EPDC_DATA08__UART6_DCE_RX 0x79
>;
};
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX7D_PAD_SD3_CMD__SD3_CMD 0x59
MX7D_PAD_SD3_CLK__SD3_CLK 0x19
MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59
MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59
MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59
MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59
MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59
MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59
MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59
MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59
MX7D_PAD_SD3_STROBE__SD3_STROBE 0x19
>;
};
pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
fsl,pins = <
MX7D_PAD_SD3_CMD__SD3_CMD 0x5a
MX7D_PAD_SD3_CLK__SD3_CLK 0x1a
MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a
MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5a
MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5a
MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5a
MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5a
MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5a
MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5a
MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5a
MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1a
>;
};
pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
fsl,pins = <
MX7D_PAD_SD3_CMD__SD3_CMD 0x5b
MX7D_PAD_SD3_CLK__SD3_CLK 0x1b
MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5b
MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5b
MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5b
MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5b
MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5b
MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5b
MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5b
MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5b
MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1b
>;
};
pinctrl_wdog: wdoggrp {
fsl,pins = <
MX7D_PAD_ENET1_COL__WDOG1_WDOG_ANY 0x74
>;
};
};
......@@ -246,6 +246,7 @@ crypto: crypto@1700000 {
reg = <0x0 0x1700000 0x0 0x100000>;
ranges = <0x0 0x0 0x1700000 0x100000>;
interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
dma-coherent;
sec_jr0: jr@10000 {
compatible = "fsl,sec-v5.0-job-ring",
......@@ -871,7 +872,7 @@ usb2: usb@8600000 {
phy_type = "ulpi";
};
usb3: usb3@3100000 {
usb3: usb@3100000 {
compatible = "snps,dwc3";
reg = <0x0 0x3100000 0x0 0x10000>;
interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
......
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