Commit 4f88bd23 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'rproc-v4.15' of git://github.com/andersson/remoteproc

Pull remoteproc updates from Bjorn Andersson:
 "This adds an interface for configuring Qualcomm's "secure SMMU" and
  adds support for booting the modem Hexagon on MSM8996.

  Two new debugfs entries are added in the remoteproc core to introspect
  the list of memory carveouts and the loaded resource table"

* tag 'rproc-v4.15' of git://github.com/andersson/remoteproc:
  remoteproc: qcom: Fix error handling paths in order to avoid memory leaks
  remoteproc: qcom: Drop pr_err in q6v5_xfer_mem_ownership()
  remoteproc: debug: add carveouts list dump feature
  remoteproc: debug: add resource table dump feature
  remoteproc: qcom: Add support for mss remoteproc on msm8996
  remoteproc: qcom: Make secure world call for mem ownership switch
  remoteproc: qcom: refactor mss fw image loading sequence
  firmware: scm: Add new SCM call API for switching memory ownership
parents bedf5719 1a5d5c59
......@@ -10,6 +10,7 @@ on the Qualcomm Hexagon core.
"qcom,q6v5-pil",
"qcom,msm8916-mss-pil",
"qcom,msm8974-mss-pil"
"qcom,msm8996-mss-pil"
- reg:
Usage: required
......
......@@ -585,6 +585,13 @@ int __qcom_scm_set_remote_state(struct device *dev, u32 state, u32 id)
return ret ? : le32_to_cpu(scm_ret);
}
int __qcom_scm_assign_mem(struct device *dev, phys_addr_t mem_region,
size_t mem_sz, phys_addr_t src, size_t src_sz,
phys_addr_t dest, size_t dest_sz)
{
return -ENODEV;
}
int __qcom_scm_restore_sec_cfg(struct device *dev, u32 device_id,
u32 spare)
{
......
......@@ -382,6 +382,33 @@ int __qcom_scm_set_remote_state(struct device *dev, u32 state, u32 id)
return ret ? : res.a1;
}
int __qcom_scm_assign_mem(struct device *dev, phys_addr_t mem_region,
size_t mem_sz, phys_addr_t src, size_t src_sz,
phys_addr_t dest, size_t dest_sz)
{
int ret;
struct qcom_scm_desc desc = {0};
struct arm_smccc_res res;
desc.args[0] = mem_region;
desc.args[1] = mem_sz;
desc.args[2] = src;
desc.args[3] = src_sz;
desc.args[4] = dest;
desc.args[5] = dest_sz;
desc.args[6] = 0;
desc.arginfo = QCOM_SCM_ARGS(7, QCOM_SCM_RO, QCOM_SCM_VAL,
QCOM_SCM_RO, QCOM_SCM_VAL, QCOM_SCM_RO,
QCOM_SCM_VAL, QCOM_SCM_VAL);
ret = qcom_scm_call(dev, QCOM_SCM_SVC_MP,
QCOM_MEM_PROT_ASSIGN_ID,
&desc, &res);
return ret ? : res.a1;
}
int __qcom_scm_restore_sec_cfg(struct device *dev, u32 device_id, u32 spare)
{
struct qcom_scm_desc desc = {0};
......
......@@ -47,6 +47,19 @@ struct qcom_scm {
u64 dload_mode_addr;
};
struct qcom_scm_current_perm_info {
__le32 vmid;
__le32 perm;
__le64 ctx;
__le32 ctx_size;
__le32 unused;
};
struct qcom_scm_mem_map_info {
__le64 mem_addr;
__le64 mem_size;
};
static struct qcom_scm *__scm;
static int qcom_scm_clk_enable(void)
......@@ -415,6 +428,88 @@ int qcom_scm_set_remote_state(u32 state, u32 id)
}
EXPORT_SYMBOL(qcom_scm_set_remote_state);
/**
* qcom_scm_assign_mem() - Make a secure call to reassign memory ownership
* @mem_addr: mem region whose ownership need to be reassigned
* @mem_sz: size of the region.
* @srcvm: vmid for current set of owners, each set bit in
* flag indicate a unique owner
* @newvm: array having new owners and corrsponding permission
* flags
* @dest_cnt: number of owners in next set.
*
* Return negative errno on failure, 0 on success, with @srcvm updated.
*/
int qcom_scm_assign_mem(phys_addr_t mem_addr, size_t mem_sz,
unsigned int *srcvm,
struct qcom_scm_vmperm *newvm, int dest_cnt)
{
struct qcom_scm_current_perm_info *destvm;
struct qcom_scm_mem_map_info *mem_to_map;
phys_addr_t mem_to_map_phys;
phys_addr_t dest_phys;
phys_addr_t ptr_phys;
size_t mem_to_map_sz;
size_t dest_sz;
size_t src_sz;
size_t ptr_sz;
int next_vm;
__le32 *src;
void *ptr;
int ret;
int len;
int i;
src_sz = hweight_long(*srcvm) * sizeof(*src);
mem_to_map_sz = sizeof(*mem_to_map);
dest_sz = dest_cnt * sizeof(*destvm);
ptr_sz = ALIGN(src_sz, SZ_64) + ALIGN(mem_to_map_sz, SZ_64) +
ALIGN(dest_sz, SZ_64);
ptr = dma_alloc_coherent(__scm->dev, ptr_sz, &ptr_phys, GFP_KERNEL);
if (!ptr)
return -ENOMEM;
/* Fill source vmid detail */
src = ptr;
len = hweight_long(*srcvm);
for (i = 0; i < len; i++) {
src[i] = cpu_to_le32(ffs(*srcvm) - 1);
*srcvm ^= 1 << (ffs(*srcvm) - 1);
}
/* Fill details of mem buff to map */
mem_to_map = ptr + ALIGN(src_sz, SZ_64);
mem_to_map_phys = ptr_phys + ALIGN(src_sz, SZ_64);
mem_to_map[0].mem_addr = cpu_to_le64(mem_addr);
mem_to_map[0].mem_size = cpu_to_le64(mem_sz);
next_vm = 0;
/* Fill details of next vmid detail */
destvm = ptr + ALIGN(mem_to_map_sz, SZ_64) + ALIGN(src_sz, SZ_64);
dest_phys = ptr_phys + ALIGN(mem_to_map_sz, SZ_64) + ALIGN(src_sz, SZ_64);
for (i = 0; i < dest_cnt; i++) {
destvm[i].vmid = cpu_to_le32(newvm[i].vmid);
destvm[i].perm = cpu_to_le32(newvm[i].perm);
destvm[i].ctx = 0;
destvm[i].ctx_size = 0;
next_vm |= BIT(newvm[i].vmid);
}
ret = __qcom_scm_assign_mem(__scm->dev, mem_to_map_phys, mem_to_map_sz,
ptr_phys, src_sz, dest_phys, dest_sz);
dma_free_coherent(__scm->dev, ALIGN(ptr_sz, SZ_64), ptr, ptr_phys);
if (ret) {
dev_err(__scm->dev,
"Assign memory protection call failed %d.\n", ret);
return -EINVAL;
}
*srcvm = next_vm;
return 0;
}
EXPORT_SYMBOL(qcom_scm_assign_mem);
static int qcom_scm_probe(struct platform_device *pdev)
{
struct qcom_scm *scm;
......
......@@ -103,5 +103,10 @@ extern int __qcom_scm_iommu_secure_ptbl_size(struct device *dev, u32 spare,
size_t *size);
extern int __qcom_scm_iommu_secure_ptbl_init(struct device *dev, u64 addr,
u32 size, u32 spare);
#define QCOM_MEM_PROT_ASSIGN_ID 0x16
extern int __qcom_scm_assign_mem(struct device *dev,
phys_addr_t mem_region, size_t mem_sz,
phys_addr_t src, size_t src_sz,
phys_addr_t dest, size_t dest_sz);
#endif
This diff is collapsed.
......@@ -155,6 +155,132 @@ static const struct file_operations rproc_recovery_ops = {
.llseek = generic_file_llseek,
};
/* Expose resource table content via debugfs */
static int rproc_rsc_table_show(struct seq_file *seq, void *p)
{
static const char * const types[] = {"carveout", "devmem", "trace", "vdev"};
struct rproc *rproc = seq->private;
struct resource_table *table = rproc->table_ptr;
struct fw_rsc_carveout *c;
struct fw_rsc_devmem *d;
struct fw_rsc_trace *t;
struct fw_rsc_vdev *v;
int i, j;
if (!table) {
seq_puts(seq, "No resource table found\n");
return 0;
}
for (i = 0; i < table->num; i++) {
int offset = table->offset[i];
struct fw_rsc_hdr *hdr = (void *)table + offset;
void *rsc = (void *)hdr + sizeof(*hdr);
switch (hdr->type) {
case RSC_CARVEOUT:
c = rsc;
seq_printf(seq, "Entry %d is of type %s\n", i, types[hdr->type]);
seq_printf(seq, " Device Address 0x%x\n", c->da);
seq_printf(seq, " Physical Address 0x%x\n", c->pa);
seq_printf(seq, " Length 0x%x Bytes\n", c->len);
seq_printf(seq, " Flags 0x%x\n", c->flags);
seq_printf(seq, " Reserved (should be zero) [%d]\n", c->reserved);
seq_printf(seq, " Name %s\n\n", c->name);
break;
case RSC_DEVMEM:
d = rsc;
seq_printf(seq, "Entry %d is of type %s\n", i, types[hdr->type]);
seq_printf(seq, " Device Address 0x%x\n", d->da);
seq_printf(seq, " Physical Address 0x%x\n", d->pa);
seq_printf(seq, " Length 0x%x Bytes\n", d->len);
seq_printf(seq, " Flags 0x%x\n", d->flags);
seq_printf(seq, " Reserved (should be zero) [%d]\n", d->reserved);
seq_printf(seq, " Name %s\n\n", d->name);
break;
case RSC_TRACE:
t = rsc;
seq_printf(seq, "Entry %d is of type %s\n", i, types[hdr->type]);
seq_printf(seq, " Device Address 0x%x\n", t->da);
seq_printf(seq, " Length 0x%x Bytes\n", t->len);
seq_printf(seq, " Reserved (should be zero) [%d]\n", t->reserved);
seq_printf(seq, " Name %s\n\n", t->name);
break;
case RSC_VDEV:
v = rsc;
seq_printf(seq, "Entry %d is of type %s\n", i, types[hdr->type]);
seq_printf(seq, " ID %d\n", v->id);
seq_printf(seq, " Notify ID %d\n", v->notifyid);
seq_printf(seq, " Device features 0x%x\n", v->dfeatures);
seq_printf(seq, " Guest features 0x%x\n", v->gfeatures);
seq_printf(seq, " Config length 0x%x\n", v->config_len);
seq_printf(seq, " Status 0x%x\n", v->status);
seq_printf(seq, " Number of vrings %d\n", v->num_of_vrings);
seq_printf(seq, " Reserved (should be zero) [%d][%d]\n\n",
v->reserved[0], v->reserved[1]);
for (j = 0; j < v->num_of_vrings; j++) {
seq_printf(seq, " Vring %d\n", j);
seq_printf(seq, " Device Address 0x%x\n", v->vring[j].da);
seq_printf(seq, " Alignment %d\n", v->vring[j].align);
seq_printf(seq, " Number of buffers %d\n", v->vring[j].num);
seq_printf(seq, " Notify ID %d\n", v->vring[j].notifyid);
seq_printf(seq, " Physical Address 0x%x\n\n",
v->vring[j].pa);
}
break;
default:
seq_printf(seq, "Unknown resource type found: %d [hdr: %p]\n",
hdr->type, hdr);
break;
}
}
return 0;
}
static int rproc_rsc_table_open(struct inode *inode, struct file *file)
{
return single_open(file, rproc_rsc_table_show, inode->i_private);
}
static const struct file_operations rproc_rsc_table_ops = {
.open = rproc_rsc_table_open,
.read = seq_read,
.llseek = seq_lseek,
.release = single_release,
};
/* Expose carveout content via debugfs */
static int rproc_carveouts_show(struct seq_file *seq, void *p)
{
struct rproc *rproc = seq->private;
struct rproc_mem_entry *carveout;
list_for_each_entry(carveout, &rproc->carveouts, node) {
seq_puts(seq, "Carveout memory entry:\n");
seq_printf(seq, "\tVirtual address: %p\n", carveout->va);
seq_printf(seq, "\tDMA address: %pad\n", &carveout->dma);
seq_printf(seq, "\tDevice address: 0x%x\n", carveout->da);
seq_printf(seq, "\tLength: 0x%x Bytes\n\n", carveout->len);
}
return 0;
}
static int rproc_carveouts_open(struct inode *inode, struct file *file)
{
return single_open(file, rproc_carveouts_show, inode->i_private);
}
static const struct file_operations rproc_carveouts_ops = {
.open = rproc_carveouts_open,
.read = seq_read,
.llseek = seq_lseek,
.release = single_release,
};
void rproc_remove_trace_file(struct dentry *tfile)
{
debugfs_remove(tfile);
......@@ -198,6 +324,10 @@ void rproc_create_debug_dir(struct rproc *rproc)
rproc, &rproc_name_ops);
debugfs_create_file("recovery", 0400, rproc->dbg_dir,
rproc, &rproc_recovery_ops);
debugfs_create_file("resource_table", 0400, rproc->dbg_dir,
rproc, &rproc_rsc_table_ops);
debugfs_create_file("carveout_memories", 0400, rproc->dbg_dir,
rproc, &rproc_carveouts_ops);
}
void __init rproc_init_debugfs(void)
......
......@@ -23,6 +23,19 @@ struct qcom_scm_hdcp_req {
u32 val;
};
struct qcom_scm_vmperm {
int vmid;
int perm;
};
#define QCOM_SCM_VMID_HLOS 0x3
#define QCOM_SCM_VMID_MSS_MSA 0xF
#define QCOM_SCM_PERM_READ 0x4
#define QCOM_SCM_PERM_WRITE 0x2
#define QCOM_SCM_PERM_EXEC 0x1
#define QCOM_SCM_PERM_RW (QCOM_SCM_PERM_READ | QCOM_SCM_PERM_WRITE)
#define QCOM_SCM_PERM_RWX (QCOM_SCM_PERM_RW | QCOM_SCM_PERM_EXEC)
#if IS_ENABLED(CONFIG_QCOM_SCM)
extern int qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus);
extern int qcom_scm_set_warm_boot_addr(void *entry, const cpumask_t *cpus);
......@@ -37,6 +50,9 @@ extern int qcom_scm_pas_mem_setup(u32 peripheral, phys_addr_t addr,
phys_addr_t size);
extern int qcom_scm_pas_auth_and_reset(u32 peripheral);
extern int qcom_scm_pas_shutdown(u32 peripheral);
extern int qcom_scm_assign_mem(phys_addr_t mem_addr, size_t mem_sz,
unsigned int *src, struct qcom_scm_vmperm *newvm,
int dest_cnt);
extern void qcom_scm_cpu_power_down(u32 flags);
extern u32 qcom_scm_get_version(void);
extern int qcom_scm_set_remote_state(u32 state, u32 id);
......
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