Commit 4fb60b02 authored by John Clements's avatar John Clements Committed by Alex Deucher

drm/amdgpu: enable TA load support in Arcturus

Add support for loading XGMI/RAS FW
Signed-off-by: default avatarJohn Clements <john.clements@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent c5b6e585
...@@ -49,6 +49,7 @@ MODULE_FIRMWARE("amdgpu/navi12_sos.bin"); ...@@ -49,6 +49,7 @@ MODULE_FIRMWARE("amdgpu/navi12_sos.bin");
MODULE_FIRMWARE("amdgpu/navi12_asd.bin"); MODULE_FIRMWARE("amdgpu/navi12_asd.bin");
MODULE_FIRMWARE("amdgpu/arcturus_sos.bin"); MODULE_FIRMWARE("amdgpu/arcturus_sos.bin");
MODULE_FIRMWARE("amdgpu/arcturus_asd.bin"); MODULE_FIRMWARE("amdgpu/arcturus_asd.bin");
MODULE_FIRMWARE("amdgpu/arcturus_ta.bin");
/* address block */ /* address block */
#define smnMP1_FIRMWARE_FLAGS 0x3010024 #define smnMP1_FIRMWARE_FLAGS 0x3010024
...@@ -155,6 +156,7 @@ static int psp_v11_0_init_microcode(struct psp_context *psp) ...@@ -155,6 +156,7 @@ static int psp_v11_0_init_microcode(struct psp_context *psp)
switch (adev->asic_type) { switch (adev->asic_type) {
case CHIP_VEGA20: case CHIP_VEGA20:
case CHIP_ARCTURUS:
snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_ta.bin", chip_name); snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_ta.bin", chip_name);
err = request_firmware(&adev->psp.ta_fw, fw_name, adev->dev); err = request_firmware(&adev->psp.ta_fw, fw_name, adev->dev);
if (err) { if (err) {
...@@ -182,7 +184,6 @@ static int psp_v11_0_init_microcode(struct psp_context *psp) ...@@ -182,7 +184,6 @@ static int psp_v11_0_init_microcode(struct psp_context *psp)
case CHIP_NAVI10: case CHIP_NAVI10:
case CHIP_NAVI14: case CHIP_NAVI14:
case CHIP_NAVI12: case CHIP_NAVI12:
case CHIP_ARCTURUS:
break; break;
default: default:
BUG(); BUG();
......
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