Commit 5124d9ac authored by Radu Sabau's avatar Radu Sabau Committed by Guenter Roeck

hwmon: (max31827) Add PEC support

Add PEC support using the hwmon core infrastructure.
Signed-off-by: default avatarRadu Sabau <radu.sabau@analog.com>
Reviewed-by: default avatarNuno Sa <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20240531084645.12935-2-radu.sabau@analog.com
[groeck: Adjusted subject; simplified description]
Signed-off-by: default avatarGuenter Roeck <linux@roeck-us.net>
parent fcbb583f
...@@ -131,7 +131,14 @@ The Fault Queue bits select how many consecutive temperature faults must occur ...@@ -131,7 +131,14 @@ The Fault Queue bits select how many consecutive temperature faults must occur
before overtemperature or undertemperature faults are indicated in the before overtemperature or undertemperature faults are indicated in the
corresponding status bits. corresponding status bits.
Notes PEC Support
----- -----------
When reading a register value, the PEC byte is computed and sent by the chip.
PEC on word data transaction respresents a signifcant increase in bandwitdh
usage (+33% for both write and reads) in normal conditions.
PEC is not implemented. Since this operation implies there will be an extra delay to each
transaction, PEC can be disabled or enabled through sysfs.
Just write 1 to the "pec" file for enabling PEC and 0 for disabling it.
...@@ -24,6 +24,7 @@ ...@@ -24,6 +24,7 @@
#define MAX31827_CONFIGURATION_1SHOT_MASK BIT(0) #define MAX31827_CONFIGURATION_1SHOT_MASK BIT(0)
#define MAX31827_CONFIGURATION_CNV_RATE_MASK GENMASK(3, 1) #define MAX31827_CONFIGURATION_CNV_RATE_MASK GENMASK(3, 1)
#define MAX31827_CONFIGURATION_PEC_EN_MASK BIT(4)
#define MAX31827_CONFIGURATION_TIMEOUT_MASK BIT(5) #define MAX31827_CONFIGURATION_TIMEOUT_MASK BIT(5)
#define MAX31827_CONFIGURATION_RESOLUTION_MASK GENMASK(7, 6) #define MAX31827_CONFIGURATION_RESOLUTION_MASK GENMASK(7, 6)
#define MAX31827_CONFIGURATION_ALRM_POL_MASK BIT(8) #define MAX31827_CONFIGURATION_ALRM_POL_MASK BIT(8)
...@@ -382,7 +383,8 @@ static int max31827_write(struct device *dev, enum hwmon_sensor_types type, ...@@ -382,7 +383,8 @@ static int max31827_write(struct device *dev, enum hwmon_sensor_types type,
} }
case hwmon_chip: case hwmon_chip:
if (attr == hwmon_chip_update_interval) { switch (attr) {
case hwmon_chip_update_interval:
if (!st->enable) if (!st->enable)
return -EINVAL; return -EINVAL;
...@@ -410,14 +412,18 @@ static int max31827_write(struct device *dev, enum hwmon_sensor_types type, ...@@ -410,14 +412,18 @@ static int max31827_write(struct device *dev, enum hwmon_sensor_types type,
return ret; return ret;
st->update_interval = val; st->update_interval = val;
}
break;
return 0;
case hwmon_chip_pec:
return regmap_update_bits(st->regmap, MAX31827_CONFIGURATION_REG,
MAX31827_CONFIGURATION_PEC_EN_MASK,
val ? MAX31827_CONFIGURATION_PEC_EN_MASK : 0);
default:
return -EOPNOTSUPP;
}
default: default:
return -EOPNOTSUPP; return -EOPNOTSUPP;
} }
return 0;
} }
static ssize_t temp1_resolution_show(struct device *dev, static ssize_t temp1_resolution_show(struct device *dev,
...@@ -583,7 +589,7 @@ static const struct hwmon_channel_info *max31827_info[] = { ...@@ -583,7 +589,7 @@ static const struct hwmon_channel_info *max31827_info[] = {
HWMON_T_MIN_HYST | HWMON_T_MIN_ALARM | HWMON_T_MIN_HYST | HWMON_T_MIN_ALARM |
HWMON_T_MAX | HWMON_T_MAX_HYST | HWMON_T_MAX | HWMON_T_MAX_HYST |
HWMON_T_MAX_ALARM), HWMON_T_MAX_ALARM),
HWMON_CHANNEL_INFO(chip, HWMON_C_UPDATE_INTERVAL), HWMON_CHANNEL_INFO(chip, HWMON_C_UPDATE_INTERVAL | HWMON_C_PEC),
NULL, NULL,
}; };
......
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