Commit 515e5da7 authored by Will Deacon's avatar Will Deacon

Merge branch 'for-next/strings' into for-next/core

* for-next/strings:
  Revert "arm64: Mitigate MTE issues with str{n}cmp()"
  arm64: lib: Import latest version of Arm Optimized Routines' strncmp
  arm64: lib: Import latest version of Arm Optimized Routines' strcmp
parents 92051a10 e33c8925
...@@ -535,11 +535,6 @@ alternative_endif ...@@ -535,11 +535,6 @@ alternative_endif
#define EXPORT_SYMBOL_NOKASAN(name) EXPORT_SYMBOL(name) #define EXPORT_SYMBOL_NOKASAN(name) EXPORT_SYMBOL(name)
#endif #endif
#ifdef CONFIG_KASAN_HW_TAGS
#define EXPORT_SYMBOL_NOHWKASAN(name)
#else
#define EXPORT_SYMBOL_NOHWKASAN(name) EXPORT_SYMBOL_NOKASAN(name)
#endif
/* /*
* Emit a 64-bit absolute little endian symbol reference in a way that * Emit a 64-bit absolute little endian symbol reference in a way that
* ensures that it will be resolved at build time, even when building a * ensures that it will be resolved at build time, even when building a
......
...@@ -12,13 +12,11 @@ extern char *strrchr(const char *, int c); ...@@ -12,13 +12,11 @@ extern char *strrchr(const char *, int c);
#define __HAVE_ARCH_STRCHR #define __HAVE_ARCH_STRCHR
extern char *strchr(const char *, int c); extern char *strchr(const char *, int c);
#ifndef CONFIG_KASAN_HW_TAGS
#define __HAVE_ARCH_STRCMP #define __HAVE_ARCH_STRCMP
extern int strcmp(const char *, const char *); extern int strcmp(const char *, const char *);
#define __HAVE_ARCH_STRNCMP #define __HAVE_ARCH_STRNCMP
extern int strncmp(const char *, const char *, __kernel_size_t); extern int strncmp(const char *, const char *, __kernel_size_t);
#endif
#define __HAVE_ARCH_STRLEN #define __HAVE_ARCH_STRLEN
extern __kernel_size_t strlen(const char *); extern __kernel_size_t strlen(const char *);
......
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
/* /*
* Copyright (c) 2012-2021, Arm Limited. * Copyright (c) 2012-2022, Arm Limited.
* *
* Adapted from the original at: * Adapted from the original at:
* https://github.com/ARM-software/optimized-routines/blob/afd6244a1f8d9229/string/aarch64/strcmp.S * https://github.com/ARM-software/optimized-routines/blob/189dfefe37d54c5b/string/aarch64/strcmp.S
*/ */
#include <linux/linkage.h> #include <linux/linkage.h>
...@@ -11,161 +11,175 @@ ...@@ -11,161 +11,175 @@
/* Assumptions: /* Assumptions:
* *
* ARMv8-a, AArch64 * ARMv8-a, AArch64.
* MTE compatible.
*/ */
#define L(label) .L ## label #define L(label) .L ## label
#define REP8_01 0x0101010101010101 #define REP8_01 0x0101010101010101
#define REP8_7f 0x7f7f7f7f7f7f7f7f #define REP8_7f 0x7f7f7f7f7f7f7f7f
#define REP8_80 0x8080808080808080
/* Parameters and result. */
#define src1 x0 #define src1 x0
#define src2 x1 #define src2 x1
#define result x0 #define result x0
/* Internal variables. */
#define data1 x2 #define data1 x2
#define data1w w2 #define data1w w2
#define data2 x3 #define data2 x3
#define data2w w3 #define data2w w3
#define has_nul x4 #define has_nul x4
#define diff x5 #define diff x5
#define off1 x5
#define syndrome x6 #define syndrome x6
#define tmp1 x7 #define tmp x6
#define tmp2 x8 #define data3 x7
#define tmp3 x9 #define zeroones x8
#define zeroones x10 #define shift x9
#define pos x11 #define off2 x10
/* Start of performance-critical section -- one 64B cache line. */ /* On big-endian early bytes are at MSB and on little-endian LSB.
.align 6 LS_FW means shifting towards early bytes. */
#ifdef __AARCH64EB__
# define LS_FW lsl
#else
# define LS_FW lsr
#endif
/* NUL detection works on the principle that (X - 1) & (~X) & 0x80
(=> (X - 1) & ~(X | 0x7f)) is non-zero iff a byte is zero, and
can be done in parallel across the entire word.
Since carry propagation makes 0x1 bytes before a NUL byte appear
NUL too in big-endian, byte-reverse the data before the NUL check. */
SYM_FUNC_START(__pi_strcmp) SYM_FUNC_START(__pi_strcmp)
eor tmp1, src1, src2 sub off2, src2, src1
mov zeroones, #REP8_01 mov zeroones, REP8_01
tst tmp1, #7 and tmp, src1, 7
tst off2, 7
b.ne L(misaligned8) b.ne L(misaligned8)
ands tmp1, src1, #7 cbnz tmp, L(mutual_align)
b.ne L(mutual_align)
/* NUL detection works on the principle that (X - 1) & (~X) & 0x80 .p2align 4
(=> (X - 1) & ~(X | 0x7f)) is non-zero iff a byte is zero, and
can be done in parallel across the entire word. */
L(loop_aligned): L(loop_aligned):
ldr data1, [src1], #8 ldr data2, [src1, off2]
ldr data2, [src2], #8 ldr data1, [src1], 8
L(start_realigned): L(start_realigned):
sub tmp1, data1, zeroones #ifdef __AARCH64EB__
orr tmp2, data1, #REP8_7f rev tmp, data1
eor diff, data1, data2 /* Non-zero if differences found. */ sub has_nul, tmp, zeroones
bic has_nul, tmp1, tmp2 /* Non-zero if NUL terminator. */ orr tmp, tmp, REP8_7f
#else
sub has_nul, data1, zeroones
orr tmp, data1, REP8_7f
#endif
bics has_nul, has_nul, tmp /* Non-zero if NUL terminator. */
ccmp data1, data2, 0, eq
b.eq L(loop_aligned)
#ifdef __AARCH64EB__
rev has_nul, has_nul
#endif
eor diff, data1, data2
orr syndrome, diff, has_nul orr syndrome, diff, has_nul
cbz syndrome, L(loop_aligned)
/* End of performance-critical section -- one 64B cache line. */
L(end): L(end):
#ifndef __AARCH64EB__ #ifndef __AARCH64EB__
rev syndrome, syndrome rev syndrome, syndrome
rev data1, data1 rev data1, data1
/* The MS-non-zero bit of the syndrome marks either the first bit
that is different, or the top bit of the first zero byte.
Shifting left now will bring the critical information into the
top bits. */
clz pos, syndrome
rev data2, data2 rev data2, data2
lsl data1, data1, pos #endif
lsl data2, data2, pos clz shift, syndrome
/* But we need to zero-extend (char is unsigned) the value and then /* The most-significant-non-zero bit of the syndrome marks either the
perform a signed 32-bit subtraction. */ first bit that is different, or the top bit of the first zero byte.
lsr data1, data1, #56
sub result, data1, data2, lsr #56
ret
#else
/* For big-endian we cannot use the trick with the syndrome value
as carry-propagation can corrupt the upper bits if the trailing
bytes in the string contain 0x01. */
/* However, if there is no NUL byte in the dword, we can generate
the result directly. We can't just subtract the bytes as the
MSB might be significant. */
cbnz has_nul, 1f
cmp data1, data2
cset result, ne
cneg result, result, lo
ret
1:
/* Re-compute the NUL-byte detection, using a byte-reversed value. */
rev tmp3, data1
sub tmp1, tmp3, zeroones
orr tmp2, tmp3, #REP8_7f
bic has_nul, tmp1, tmp2
rev has_nul, has_nul
orr syndrome, diff, has_nul
clz pos, syndrome
/* The MS-non-zero bit of the syndrome marks either the first bit
that is different, or the top bit of the first zero byte.
Shifting left now will bring the critical information into the Shifting left now will bring the critical information into the
top bits. */ top bits. */
lsl data1, data1, pos lsl data1, data1, shift
lsl data2, data2, pos lsl data2, data2, shift
/* But we need to zero-extend (char is unsigned) the value and then /* But we need to zero-extend (char is unsigned) the value and then
perform a signed 32-bit subtraction. */ perform a signed 32-bit subtraction. */
lsr data1, data1, #56 lsr data1, data1, 56
sub result, data1, data2, lsr #56 sub result, data1, data2, lsr 56
ret ret
#endif
.p2align 4
L(mutual_align): L(mutual_align):
/* Sources are mutually aligned, but are not currently at an /* Sources are mutually aligned, but are not currently at an
alignment boundary. Round down the addresses and then mask off alignment boundary. Round down the addresses and then mask off
the bytes that preceed the start point. */ the bytes that precede the start point. */
bic src1, src1, #7 bic src1, src1, 7
bic src2, src2, #7 ldr data2, [src1, off2]
lsl tmp1, tmp1, #3 /* Bytes beyond alignment -> bits. */ ldr data1, [src1], 8
ldr data1, [src1], #8 neg shift, src2, lsl 3 /* Bits to alignment -64. */
neg tmp1, tmp1 /* Bits to alignment -64. */ mov tmp, -1
ldr data2, [src2], #8 LS_FW tmp, tmp, shift
mov tmp2, #~0 orr data1, data1, tmp
#ifdef __AARCH64EB__ orr data2, data2, tmp
/* Big-endian. Early bytes are at MSB. */
lsl tmp2, tmp2, tmp1 /* Shift (tmp1 & 63). */
#else
/* Little-endian. Early bytes are at LSB. */
lsr tmp2, tmp2, tmp1 /* Shift (tmp1 & 63). */
#endif
orr data1, data1, tmp2
orr data2, data2, tmp2
b L(start_realigned) b L(start_realigned)
L(misaligned8): L(misaligned8):
/* Align SRC1 to 8 bytes and then compare 8 bytes at a time, always /* Align SRC1 to 8 bytes and then compare 8 bytes at a time, always
checking to make sure that we don't access beyond page boundary in checking to make sure that we don't access beyond the end of SRC2. */
SRC2. */ cbz tmp, L(src1_aligned)
tst src1, #7
b.eq L(loop_misaligned)
L(do_misaligned): L(do_misaligned):
ldrb data1w, [src1], #1 ldrb data1w, [src1], 1
ldrb data2w, [src2], #1 ldrb data2w, [src2], 1
cmp data1w, #1 cmp data1w, 0
ccmp data1w, data2w, #0, cs /* NZCV = 0b0000. */ ccmp data1w, data2w, 0, ne /* NZCV = 0b0000. */
b.ne L(done) b.ne L(done)
tst src1, #7 tst src1, 7
b.ne L(do_misaligned) b.ne L(do_misaligned)
L(loop_misaligned): L(src1_aligned):
/* Test if we are within the last dword of the end of a 4K page. If neg shift, src2, lsl 3
yes then jump back to the misaligned loop to copy a byte at a time. */ bic src2, src2, 7
and tmp1, src2, #0xff8 ldr data3, [src2], 8
eor tmp1, tmp1, #0xff8 #ifdef __AARCH64EB__
cbz tmp1, L(do_misaligned) rev data3, data3
ldr data1, [src1], #8 #endif
ldr data2, [src2], #8 lsr tmp, zeroones, shift
orr data3, data3, tmp
sub tmp1, data1, zeroones sub has_nul, data3, zeroones
orr tmp2, data1, #REP8_7f orr tmp, data3, REP8_7f
eor diff, data1, data2 /* Non-zero if differences found. */ bics has_nul, has_nul, tmp
bic has_nul, tmp1, tmp2 /* Non-zero if NUL terminator. */ b.ne L(tail)
sub off1, src2, src1
.p2align 4
L(loop_unaligned):
ldr data3, [src1, off1]
ldr data2, [src1, off2]
#ifdef __AARCH64EB__
rev data3, data3
#endif
sub has_nul, data3, zeroones
orr tmp, data3, REP8_7f
ldr data1, [src1], 8
bics has_nul, has_nul, tmp
ccmp data1, data2, 0, eq
b.eq L(loop_unaligned)
lsl tmp, has_nul, shift
#ifdef __AARCH64EB__
rev tmp, tmp
#endif
eor diff, data1, data2
orr syndrome, diff, tmp
cbnz syndrome, L(end)
L(tail):
ldr data1, [src1]
neg shift, shift
lsr data2, data3, shift
lsr has_nul, has_nul, shift
#ifdef __AARCH64EB__
rev data2, data2
rev has_nul, has_nul
#endif
eor diff, data1, data2
orr syndrome, diff, has_nul orr syndrome, diff, has_nul
cbz syndrome, L(loop_misaligned)
b L(end) b L(end)
L(done): L(done):
...@@ -173,4 +187,4 @@ L(done): ...@@ -173,4 +187,4 @@ L(done):
ret ret
SYM_FUNC_END(__pi_strcmp) SYM_FUNC_END(__pi_strcmp)
SYM_FUNC_ALIAS_WEAK(strcmp, __pi_strcmp) SYM_FUNC_ALIAS_WEAK(strcmp, __pi_strcmp)
EXPORT_SYMBOL_NOHWKASAN(strcmp) EXPORT_SYMBOL_NOKASAN(strcmp)
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