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Commit 51a26bb0 authored by Greg Kroah-Hartman's avatar Greg Kroah-Hartman
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Merge tag 'icc-6.5-rc5' of... 

Merge tag 'icc-6.5-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into char-misc-linus

Georgi writes:

interconnect fixes for v6.5-rc

This contains a fix for a potential issue on some Qualcomm SoCs where
bit-masks should have been used to configure the Bus Clock Manager
hardware, instead of bandwidth units.

- interconnect: qcom: Add support for mask-based BCMs
- interconnect: qcom: sm8450: add enable_mask for bcm nodes
- interconnect: qcom: sm8550: add enable_mask for bcm nodes
- interconnect: qcom: sa8775p: add enable_mask for bcm nodes
Signed-off-by: default avatarGeorgi Djakov <djakov@kernel.org>

* tag 'icc-6.5-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc:
  interconnect: qcom: sa8775p: add enable_mask for bcm nodes
  interconnect: qcom: sm8550: add enable_mask for bcm nodes
  interconnect: qcom: sm8450: add enable_mask for bcm nodes
  interconnect: qcom: Add support for mask-based BCMs
parents 77107b08 3cb11fe2
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drivers/interconnect/qcom/bcm-voter.c
View file @ 51a26bb0
...@@ -83,6 +83,11 @@ static void bcm_aggregate(struct qcom_icc_bcm *bcm) ...@@ -83,6 +83,11 @@ static void bcm_aggregate(struct qcom_icc_bcm *bcm)
temp = agg_peak[bucket] * bcm->vote_scale; temp = agg_peak[bucket] * bcm->vote_scale;
bcm->vote_y[bucket] = bcm_div(temp, bcm->aux_data.unit); bcm->vote_y[bucket] = bcm_div(temp, bcm->aux_data.unit);
if (bcm->enable_mask && (bcm->vote_x[bucket] || bcm->vote_y[bucket])) {
bcm->vote_x[bucket] = 0;
bcm->vote_y[bucket] = bcm->enable_mask;
}
} }
if (bcm->keepalive && bcm->vote_x[QCOM_ICC_BUCKET_AMC] == 0 && if (bcm->keepalive && bcm->vote_x[QCOM_ICC_BUCKET_AMC] == 0 &&
......
drivers/interconnect/qcom/icc-rpmh.h
View file @ 51a26bb0
...@@ -81,6 +81,7 @@ struct qcom_icc_node { ...@@ -81,6 +81,7 @@ struct qcom_icc_node {
* @vote_x: aggregated threshold values, represents sum_bw when @type is bw bcm * @vote_x: aggregated threshold values, represents sum_bw when @type is bw bcm
* @vote_y: aggregated threshold values, represents peak_bw when @type is bw bcm * @vote_y: aggregated threshold values, represents peak_bw when @type is bw bcm
* @vote_scale: scaling factor for vote_x and vote_y * @vote_scale: scaling factor for vote_x and vote_y
* @enable_mask: optional mask to send as vote instead of vote_x/vote_y
* @dirty: flag used to indicate whether the bcm needs to be committed * @dirty: flag used to indicate whether the bcm needs to be committed
* @keepalive: flag used to indicate whether a keepalive is required * @keepalive: flag used to indicate whether a keepalive is required
* @aux_data: auxiliary data used when calculating threshold values and * @aux_data: auxiliary data used when calculating threshold values and
...@@ -97,6 +98,7 @@ struct qcom_icc_bcm { ...@@ -97,6 +98,7 @@ struct qcom_icc_bcm {
u64 vote_x[QCOM_ICC_NUM_BUCKETS]; u64 vote_x[QCOM_ICC_NUM_BUCKETS];
u64 vote_y[QCOM_ICC_NUM_BUCKETS]; u64 vote_y[QCOM_ICC_NUM_BUCKETS];
u64 vote_scale; u64 vote_scale;
u32 enable_mask;
bool dirty; bool dirty;
bool keepalive; bool keepalive;
struct bcm_db aux_data; struct bcm_db aux_data;
......
drivers/interconnect/qcom/sa8775p.c
View file @ 51a26bb0
...@@ -1873,6 +1873,7 @@ static struct qcom_icc_node srvc_snoc = { ...@@ -1873,6 +1873,7 @@ static struct qcom_icc_node srvc_snoc = {
static struct qcom_icc_bcm bcm_acv = { static struct qcom_icc_bcm bcm_acv = {
.name = "ACV", .name = "ACV",
.enable_mask = 0x8,
.num_nodes = 1, .num_nodes = 1,
.nodes = { &ebi }, .nodes = { &ebi },
}; };
......
drivers/interconnect/qcom/sm8450.c
View file @ 51a26bb0
...@@ -1337,6 +1337,7 @@ static struct qcom_icc_node qns_mem_noc_sf_disp = { ...@@ -1337,6 +1337,7 @@ static struct qcom_icc_node qns_mem_noc_sf_disp = {
static struct qcom_icc_bcm bcm_acv = { static struct qcom_icc_bcm bcm_acv = {
.name = "ACV", .name = "ACV",
.enable_mask = 0x8,
.num_nodes = 1, .num_nodes = 1,
.nodes = { &ebi }, .nodes = { &ebi },
}; };
...@@ -1349,6 +1350,7 @@ static struct qcom_icc_bcm bcm_ce0 = { ...@@ -1349,6 +1350,7 @@ static struct qcom_icc_bcm bcm_ce0 = {
static struct qcom_icc_bcm bcm_cn0 = { static struct qcom_icc_bcm bcm_cn0 = {
.name = "CN0", .name = "CN0",
.enable_mask = 0x1,
.keepalive = true, .keepalive = true,
.num_nodes = 55, .num_nodes = 55,
.nodes = { &qnm_gemnoc_cnoc, &qnm_gemnoc_pcie, .nodes = { &qnm_gemnoc_cnoc, &qnm_gemnoc_pcie,
...@@ -1383,6 +1385,7 @@ static struct qcom_icc_bcm bcm_cn0 = { ...@@ -1383,6 +1385,7 @@ static struct qcom_icc_bcm bcm_cn0 = {
static struct qcom_icc_bcm bcm_co0 = { static struct qcom_icc_bcm bcm_co0 = {
.name = "CO0", .name = "CO0",
.enable_mask = 0x1,
.num_nodes = 2, .num_nodes = 2,
.nodes = { &qxm_nsp, &qns_nsp_gemnoc }, .nodes = { &qxm_nsp, &qns_nsp_gemnoc },
}; };
...@@ -1403,6 +1406,7 @@ static struct qcom_icc_bcm bcm_mm0 = { ...@@ -1403,6 +1406,7 @@ static struct qcom_icc_bcm bcm_mm0 = {
static struct qcom_icc_bcm bcm_mm1 = { static struct qcom_icc_bcm bcm_mm1 = {
.name = "MM1", .name = "MM1",
.enable_mask = 0x1,
.num_nodes = 12, .num_nodes = 12,
.nodes = { &qnm_camnoc_hf, &qnm_camnoc_icp, .nodes = { &qnm_camnoc_hf, &qnm_camnoc_icp,
&qnm_camnoc_sf, &qnm_mdp, &qnm_camnoc_sf, &qnm_mdp,
...@@ -1445,6 +1449,7 @@ static struct qcom_icc_bcm bcm_sh0 = { ...@@ -1445,6 +1449,7 @@ static struct qcom_icc_bcm bcm_sh0 = {
static struct qcom_icc_bcm bcm_sh1 = { static struct qcom_icc_bcm bcm_sh1 = {
.name = "SH1", .name = "SH1",
.enable_mask = 0x1,
.num_nodes = 7, .num_nodes = 7,
.nodes = { &alm_gpu_tcu, &alm_sys_tcu, .nodes = { &alm_gpu_tcu, &alm_sys_tcu,
&qnm_nsp_gemnoc, &qnm_pcie, &qnm_nsp_gemnoc, &qnm_pcie,
...@@ -1461,6 +1466,7 @@ static struct qcom_icc_bcm bcm_sn0 = { ...@@ -1461,6 +1466,7 @@ static struct qcom_icc_bcm bcm_sn0 = {
static struct qcom_icc_bcm bcm_sn1 = { static struct qcom_icc_bcm bcm_sn1 = {
.name = "SN1", .name = "SN1",
.enable_mask = 0x1,
.num_nodes = 4, .num_nodes = 4,
.nodes = { &qhm_gic, &qxm_pimem, .nodes = { &qhm_gic, &qxm_pimem,
&xm_gic, &qns_gemnoc_gc }, &xm_gic, &qns_gemnoc_gc },
...@@ -1492,6 +1498,7 @@ static struct qcom_icc_bcm bcm_sn7 = { ...@@ -1492,6 +1498,7 @@ static struct qcom_icc_bcm bcm_sn7 = {
static struct qcom_icc_bcm bcm_acv_disp = { static struct qcom_icc_bcm bcm_acv_disp = {
.name = "ACV", .name = "ACV",
.enable_mask = 0x1,
.num_nodes = 1, .num_nodes = 1,
.nodes = { &ebi_disp }, .nodes = { &ebi_disp },
}; };
...@@ -1510,6 +1517,7 @@ static struct qcom_icc_bcm bcm_mm0_disp = { ...@@ -1510,6 +1517,7 @@ static struct qcom_icc_bcm bcm_mm0_disp = {
static struct qcom_icc_bcm bcm_mm1_disp = { static struct qcom_icc_bcm bcm_mm1_disp = {
.name = "MM1", .name = "MM1",
.enable_mask = 0x1,
.num_nodes = 3, .num_nodes = 3,
.nodes = { &qnm_mdp_disp, &qnm_rot_disp, .nodes = { &qnm_mdp_disp, &qnm_rot_disp,
&qns_mem_noc_sf_disp }, &qns_mem_noc_sf_disp },
...@@ -1523,6 +1531,7 @@ static struct qcom_icc_bcm bcm_sh0_disp = { ...@@ -1523,6 +1531,7 @@ static struct qcom_icc_bcm bcm_sh0_disp = {
static struct qcom_icc_bcm bcm_sh1_disp = { static struct qcom_icc_bcm bcm_sh1_disp = {
.name = "SH1", .name = "SH1",
.enable_mask = 0x1,
.num_nodes = 1, .num_nodes = 1,
.nodes = { &qnm_pcie_disp }, .nodes = { &qnm_pcie_disp },
}; };
......
drivers/interconnect/qcom/sm8550.c
View file @ 51a26bb0
...@@ -1473,6 +1473,7 @@ static struct qcom_icc_node qns_mem_noc_sf_cam_ife_2 = { ...@@ -1473,6 +1473,7 @@ static struct qcom_icc_node qns_mem_noc_sf_cam_ife_2 = {
static struct qcom_icc_bcm bcm_acv = { static struct qcom_icc_bcm bcm_acv = {
.name = "ACV", .name = "ACV",
.enable_mask = 0x8,
.num_nodes = 1, .num_nodes = 1,
.nodes = { &ebi }, .nodes = { &ebi },
}; };
...@@ -1485,6 +1486,7 @@ static struct qcom_icc_bcm bcm_ce0 = { ...@@ -1485,6 +1486,7 @@ static struct qcom_icc_bcm bcm_ce0 = {
static struct qcom_icc_bcm bcm_cn0 = { static struct qcom_icc_bcm bcm_cn0 = {
.name = "CN0", .name = "CN0",
.enable_mask = 0x1,
.keepalive = true, .keepalive = true,
.num_nodes = 54, .num_nodes = 54,
.nodes = { &qsm_cfg, &qhs_ahb2phy0, .nodes = { &qsm_cfg, &qhs_ahb2phy0,
...@@ -1524,6 +1526,7 @@ static struct qcom_icc_bcm bcm_cn1 = { ...@@ -1524,6 +1526,7 @@ static struct qcom_icc_bcm bcm_cn1 = {
static struct qcom_icc_bcm bcm_co0 = { static struct qcom_icc_bcm bcm_co0 = {
.name = "CO0", .name = "CO0",
.enable_mask = 0x1,
.num_nodes = 2, .num_nodes = 2,
.nodes = { &qxm_nsp, &qns_nsp_gemnoc }, .nodes = { &qxm_nsp, &qns_nsp_gemnoc },
}; };
...@@ -1549,6 +1552,7 @@ static struct qcom_icc_bcm bcm_mm0 = { ...@@ -1549,6 +1552,7 @@ static struct qcom_icc_bcm bcm_mm0 = {
static struct qcom_icc_bcm bcm_mm1 = { static struct qcom_icc_bcm bcm_mm1 = {
.name = "MM1", .name = "MM1",
.enable_mask = 0x1,
.num_nodes = 8, .num_nodes = 8,
.nodes = { &qnm_camnoc_hf, &qnm_camnoc_icp, .nodes = { &qnm_camnoc_hf, &qnm_camnoc_icp,
&qnm_camnoc_sf, &qnm_vapss_hcp, &qnm_camnoc_sf, &qnm_vapss_hcp,
...@@ -1589,6 +1593,7 @@ static struct qcom_icc_bcm bcm_sh0 = { ...@@ -1589,6 +1593,7 @@ static struct qcom_icc_bcm bcm_sh0 = {
static struct qcom_icc_bcm bcm_sh1 = { static struct qcom_icc_bcm bcm_sh1 = {
.name = "SH1", .name = "SH1",
.enable_mask = 0x1,
.num_nodes = 13, .num_nodes = 13,
.nodes = { &alm_gpu_tcu, &alm_sys_tcu, .nodes = { &alm_gpu_tcu, &alm_sys_tcu,
&chm_apps, &qnm_gpu, &chm_apps, &qnm_gpu,
...@@ -1608,6 +1613,7 @@ static struct qcom_icc_bcm bcm_sn0 = { ...@@ -1608,6 +1613,7 @@ static struct qcom_icc_bcm bcm_sn0 = {
static struct qcom_icc_bcm bcm_sn1 = { static struct qcom_icc_bcm bcm_sn1 = {
.name = "SN1", .name = "SN1",
.enable_mask = 0x1,
.num_nodes = 3, .num_nodes = 3,
.nodes = { &qhm_gic, &xm_gic, .nodes = { &qhm_gic, &xm_gic,
&qns_gemnoc_gc }, &qns_gemnoc_gc },
...@@ -1633,6 +1639,7 @@ static struct qcom_icc_bcm bcm_sn7 = { ...@@ -1633,6 +1639,7 @@ static struct qcom_icc_bcm bcm_sn7 = {
static struct qcom_icc_bcm bcm_acv_disp = { static struct qcom_icc_bcm bcm_acv_disp = {
.name = "ACV", .name = "ACV",
.enable_mask = 0x1,
.num_nodes = 1, .num_nodes = 1,
.nodes = { &ebi_disp }, .nodes = { &ebi_disp },
}; };
...@@ -1657,12 +1664,14 @@ static struct qcom_icc_bcm bcm_sh0_disp = { ...@@ -1657,12 +1664,14 @@ static struct qcom_icc_bcm bcm_sh0_disp = {
static struct qcom_icc_bcm bcm_sh1_disp = { static struct qcom_icc_bcm bcm_sh1_disp = {
.name = "SH1", .name = "SH1",
.enable_mask = 0x1,
.num_nodes = 2, .num_nodes = 2,
.nodes = { &qnm_mnoc_hf_disp, &qnm_pcie_disp }, .nodes = { &qnm_mnoc_hf_disp, &qnm_pcie_disp },
}; };
static struct qcom_icc_bcm bcm_acv_cam_ife_0 = { static struct qcom_icc_bcm bcm_acv_cam_ife_0 = {
.name = "ACV", .name = "ACV",
.enable_mask = 0x0,
.num_nodes = 1, .num_nodes = 1,
.nodes = { &ebi_cam_ife_0 }, .nodes = { &ebi_cam_ife_0 },
}; };
...@@ -1681,6 +1690,7 @@ static struct qcom_icc_bcm bcm_mm0_cam_ife_0 = { ...@@ -1681,6 +1690,7 @@ static struct qcom_icc_bcm bcm_mm0_cam_ife_0 = {
static struct qcom_icc_bcm bcm_mm1_cam_ife_0 = { static struct qcom_icc_bcm bcm_mm1_cam_ife_0 = {
.name = "MM1", .name = "MM1",
.enable_mask = 0x1,
.num_nodes = 4, .num_nodes = 4,
.nodes = { &qnm_camnoc_hf_cam_ife_0, &qnm_camnoc_icp_cam_ife_0, .nodes = { &qnm_camnoc_hf_cam_ife_0, &qnm_camnoc_icp_cam_ife_0,
&qnm_camnoc_sf_cam_ife_0, &qns_mem_noc_sf_cam_ife_0 }, &qnm_camnoc_sf_cam_ife_0, &qns_mem_noc_sf_cam_ife_0 },
...@@ -1694,6 +1704,7 @@ static struct qcom_icc_bcm bcm_sh0_cam_ife_0 = { ...@@ -1694,6 +1704,7 @@ static struct qcom_icc_bcm bcm_sh0_cam_ife_0 = {
static struct qcom_icc_bcm bcm_sh1_cam_ife_0 = { static struct qcom_icc_bcm bcm_sh1_cam_ife_0 = {
.name = "SH1", .name = "SH1",
.enable_mask = 0x1,
.num_nodes = 3, .num_nodes = 3,
.nodes = { &qnm_mnoc_hf_cam_ife_0, &qnm_mnoc_sf_cam_ife_0, .nodes = { &qnm_mnoc_hf_cam_ife_0, &qnm_mnoc_sf_cam_ife_0,
&qnm_pcie_cam_ife_0 }, &qnm_pcie_cam_ife_0 },
...@@ -1701,6 +1712,7 @@ static struct qcom_icc_bcm bcm_sh1_cam_ife_0 = { ...@@ -1701,6 +1712,7 @@ static struct qcom_icc_bcm bcm_sh1_cam_ife_0 = {
static struct qcom_icc_bcm bcm_acv_cam_ife_1 = { static struct qcom_icc_bcm bcm_acv_cam_ife_1 = {
.name = "ACV", .name = "ACV",
.enable_mask = 0x0,
.num_nodes = 1, .num_nodes = 1,
.nodes = { &ebi_cam_ife_1 }, .nodes = { &ebi_cam_ife_1 },
}; };
...@@ -1719,6 +1731,7 @@ static struct qcom_icc_bcm bcm_mm0_cam_ife_1 = { ...@@ -1719,6 +1731,7 @@ static struct qcom_icc_bcm bcm_mm0_cam_ife_1 = {
static struct qcom_icc_bcm bcm_mm1_cam_ife_1 = { static struct qcom_icc_bcm bcm_mm1_cam_ife_1 = {
.name = "MM1", .name = "MM1",
.enable_mask = 0x1,
.num_nodes = 4, .num_nodes = 4,
.nodes = { &qnm_camnoc_hf_cam_ife_1, &qnm_camnoc_icp_cam_ife_1, .nodes = { &qnm_camnoc_hf_cam_ife_1, &qnm_camnoc_icp_cam_ife_1,
&qnm_camnoc_sf_cam_ife_1, &qns_mem_noc_sf_cam_ife_1 }, &qnm_camnoc_sf_cam_ife_1, &qns_mem_noc_sf_cam_ife_1 },
...@@ -1732,6 +1745,7 @@ static struct qcom_icc_bcm bcm_sh0_cam_ife_1 = { ...@@ -1732,6 +1745,7 @@ static struct qcom_icc_bcm bcm_sh0_cam_ife_1 = {
static struct qcom_icc_bcm bcm_sh1_cam_ife_1 = { static struct qcom_icc_bcm bcm_sh1_cam_ife_1 = {
.name = "SH1", .name = "SH1",
.enable_mask = 0x1,
.num_nodes = 3, .num_nodes = 3,
.nodes = { &qnm_mnoc_hf_cam_ife_1, &qnm_mnoc_sf_cam_ife_1, .nodes = { &qnm_mnoc_hf_cam_ife_1, &qnm_mnoc_sf_cam_ife_1,
&qnm_pcie_cam_ife_1 }, &qnm_pcie_cam_ife_1 },
...@@ -1739,6 +1753,7 @@ static struct qcom_icc_bcm bcm_sh1_cam_ife_1 = { ...@@ -1739,6 +1753,7 @@ static struct qcom_icc_bcm bcm_sh1_cam_ife_1 = {
static struct qcom_icc_bcm bcm_acv_cam_ife_2 = { static struct qcom_icc_bcm bcm_acv_cam_ife_2 = {
.name = "ACV", .name = "ACV",
.enable_mask = 0x0,
.num_nodes = 1, .num_nodes = 1,
.nodes = { &ebi_cam_ife_2 }, .nodes = { &ebi_cam_ife_2 },
}; };
...@@ -1757,6 +1772,7 @@ static struct qcom_icc_bcm bcm_mm0_cam_ife_2 = { ...@@ -1757,6 +1772,7 @@ static struct qcom_icc_bcm bcm_mm0_cam_ife_2 = {
static struct qcom_icc_bcm bcm_mm1_cam_ife_2 = { static struct qcom_icc_bcm bcm_mm1_cam_ife_2 = {
.name = "MM1", .name = "MM1",
.enable_mask = 0x1,
.num_nodes = 4, .num_nodes = 4,
.nodes = { &qnm_camnoc_hf_cam_ife_2, &qnm_camnoc_icp_cam_ife_2, .nodes = { &qnm_camnoc_hf_cam_ife_2, &qnm_camnoc_icp_cam_ife_2,
&qnm_camnoc_sf_cam_ife_2, &qns_mem_noc_sf_cam_ife_2 }, &qnm_camnoc_sf_cam_ife_2, &qns_mem_noc_sf_cam_ife_2 },
...@@ -1770,6 +1786,7 @@ static struct qcom_icc_bcm bcm_sh0_cam_ife_2 = { ...@@ -1770,6 +1786,7 @@ static struct qcom_icc_bcm bcm_sh0_cam_ife_2 = {
static struct qcom_icc_bcm bcm_sh1_cam_ife_2 = { static struct qcom_icc_bcm bcm_sh1_cam_ife_2 = {
.name = "SH1", .name = "SH1",
.enable_mask = 0x1,
.num_nodes = 3, .num_nodes = 3,
.nodes = { &qnm_mnoc_hf_cam_ife_2, &qnm_mnoc_sf_cam_ife_2, .nodes = { &qnm_mnoc_hf_cam_ife_2, &qnm_mnoc_sf_cam_ife_2,
&qnm_pcie_cam_ife_2 }, &qnm_pcie_cam_ife_2 },
......
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