ASoC: SOF: pcm: Improve the pcm trigger sequence
The recommended sequence for triggering the host DMA is to first program the DMA in the FW before setting the RUN bit to start the stream in the host. With IPC3, this sequence is honored because the FW programs the DMA when the HW_PARAMS IPC is sent during PCM hw_params and then the host sets the RUN bit during sof_pcm_trigger(). But with IPC4, sof_pcm_trigger() sends the SET_PIPELINE_STATE IPC to program the DMA in the FW after the DMA RUN bit is set. In order to minimize the impact for IPC3, introduce a new flag as part of struct sof_ipc_pcm_ops, ipc_first_on_start, which will be set for IPC4 only. With this flag set, the SET_PIPELINE_STATE IPC will be sent before the DMA RUN bit is set by the host during the START/PAUSE_RELEASE triggers. Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com> Reviewed-by: Péter Ujfalusi <peter.ujfalusi@linux.intel.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Reviewed-by: Bard Liao <yung-chuan.liao@linux.intel.com> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com> Link: https://lore.kernel.org/r/20230322094346.6019-4-peter.ujfalusi@linux.intel.comSigned-off-by: Mark Brown <broonie@kernel.org>
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