Commit 5255660b authored by Jonathan Bell's avatar Jonathan Bell Committed by Greg Kroah-Hartman

xhci: add quirk for host controllers that don't update endpoint DCS

Seen on a VLI VL805 PCIe to USB controller. For non-stream endpoints
at least, if the xHC halts on a particular TRB due to an error then
the DCS field in the Out Endpoint Context maintained by the hardware
is not updated with the current cycle state.

Using the quirk XHCI_EP_CTX_BROKEN_DCS and instead fetch the DCS bit
from the TRB that the xHC stopped on.

[ bjorn: rebased to v5.14-rc2 ]

Link: https://github.com/raspberrypi/linux/issues/3060
Cc: stable@vger.kernel.org
Signed-off-by: default avatarJonathan Bell <jonathan@raspberrypi.org>
Signed-off-by: default avatarBjørn Mork <bjorn@mork.no>
Signed-off-by: default avatarMathias Nyman <mathias.nyman@linux.intel.com>
Link: https://lore.kernel.org/r/20211008092547.3996295-3-mathias.nyman@linux.intel.comSigned-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent a01ba2a3
......@@ -279,8 +279,10 @@ static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
pdev->device == 0x3432)
xhci->quirks |= XHCI_BROKEN_STREAMS;
if (pdev->vendor == PCI_VENDOR_ID_VIA && pdev->device == 0x3483)
if (pdev->vendor == PCI_VENDOR_ID_VIA && pdev->device == 0x3483) {
xhci->quirks |= XHCI_LPM_SUPPORT;
xhci->quirks |= XHCI_EP_CTX_BROKEN_DCS;
}
if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA &&
pdev->device == PCI_DEVICE_ID_ASMEDIA_1042_XHCI)
......
......@@ -559,8 +559,11 @@ static int xhci_move_dequeue_past_td(struct xhci_hcd *xhci,
struct xhci_ring *ep_ring;
struct xhci_command *cmd;
struct xhci_segment *new_seg;
struct xhci_segment *halted_seg = NULL;
union xhci_trb *new_deq;
int new_cycle;
union xhci_trb *halted_trb;
int index = 0;
dma_addr_t addr;
u64 hw_dequeue;
bool cycle_found = false;
......@@ -598,7 +601,27 @@ static int xhci_move_dequeue_past_td(struct xhci_hcd *xhci,
hw_dequeue = xhci_get_hw_deq(xhci, dev, ep_index, stream_id);
new_seg = ep_ring->deq_seg;
new_deq = ep_ring->dequeue;
new_cycle = hw_dequeue & 0x1;
/*
* Quirk: xHC write-back of the DCS field in the hardware dequeue
* pointer is wrong - use the cycle state of the TRB pointed to by
* the dequeue pointer.
*/
if (xhci->quirks & XHCI_EP_CTX_BROKEN_DCS &&
!(ep->ep_state & EP_HAS_STREAMS))
halted_seg = trb_in_td(xhci, td->start_seg,
td->first_trb, td->last_trb,
hw_dequeue & ~0xf, false);
if (halted_seg) {
index = ((dma_addr_t)(hw_dequeue & ~0xf) - halted_seg->dma) /
sizeof(*halted_trb);
halted_trb = &halted_seg->trbs[index];
new_cycle = halted_trb->generic.field[3] & 0x1;
xhci_dbg(xhci, "Endpoint DCS = %d TRB index = %d cycle = %d\n",
(u8)(hw_dequeue & 0x1), index, new_cycle);
} else {
new_cycle = hw_dequeue & 0x1;
}
/*
* We want to find the pointer, segment and cycle state of the new trb
......
......@@ -1899,6 +1899,7 @@ struct xhci_hcd {
#define XHCI_SG_TRB_CACHE_SIZE_QUIRK BIT_ULL(39)
#define XHCI_NO_SOFT_RETRY BIT_ULL(40)
#define XHCI_BROKEN_D3COLD BIT_ULL(41)
#define XHCI_EP_CTX_BROKEN_DCS BIT_ULL(42)
unsigned int num_active_eps;
unsigned int limit_active_eps;
......
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