Commit 538fb37c authored by Anup Patel's avatar Anup Patel Committed by Florian Fainelli

arm64: dts: Add ARM PL330 DMA DT node for NS2

We have one ARM PL330 DMA instance with 8 channels in
NS2 SoC. Let's enable it for NS2 in NS2 DT.
Signed-off-by: default avatarAnup Patel <anup.patel@broadcom.com>
Reviewed-by: default avatarRay Jui <rjui@broadcom.com>
Reviewed-by: default avatarPramod KUMAR <pramodku@broadcom.com>
Reviewed-by: default avatarScott Branden <sbranden@broadcom.com>
Signed-off-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
parent f55532a0
...@@ -217,6 +217,25 @@ soc: soc { ...@@ -217,6 +217,25 @@ soc: soc {
#size-cells = <1>; #size-cells = <1>;
ranges = <0 0 0 0xffffffff>; ranges = <0 0 0 0xffffffff>;
dma0: dma@61360000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x61360000 0x1000>;
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
clocks = <&iprocslow>;
clock-names = "apb_pclk";
};
smmu: mmu@64000000 { smmu: mmu@64000000 {
compatible = "arm,mmu-500"; compatible = "arm,mmu-500";
reg = <0x64000000 0x40000>; reg = <0x64000000 0x40000>;
......
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