Commit 53f6e8d9 authored by Grzegorz Jaszczyk's avatar Grzegorz Jaszczyk Committed by Luis Henriques

irqchip: armada-370-xp: Fix MSI interrupt handling

commit 298dcb2d upstream.

The MSI interrupts use the 16 high doorbells, which are notified by using IRQ1
of the main interrupt controller.

The MSI interrupts were handled correctly for Armada-XP and Armada-370 but not
for Armada-375 and Armada-38x, which use chained handler for the MPIC.

This commit fixes that by checking proper interrupt number in chained handler
for the MPIC.
Signed-off-by: default avatarGrzegorz Jaszczyk <jaz@semihalf.com>
Reviewed-by: default avatarGregory CLEMENT <gregory.clement@free-electrons.com>
Fixes: bc69b8ad ("irqchip: armada-370-xp: Setup a chained handler for the MPIC")
Acked-by: default avatarEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Link: https://lkml.kernel.org/r/1411643839-64925-2-git-send-email-jaz@semihalf.comSigned-off-by: default avatarJason Cooper <jason@lakedaemon.net>
Signed-off-by: default avatarLuis Henriques <luis.henriques@canonical.com>
parent ceb56ee4
......@@ -417,9 +417,9 @@ static void armada_370_xp_mpic_handle_cascade_irq(unsigned int irq,
irqmap = readl_relaxed(per_cpu_int_base + ARMADA_375_PPI_CAUSE);
if (irqmap & BIT(0)) {
if (irqmap & BIT(1)) {
armada_370_xp_handle_msi_irq(NULL, true);
irqmap &= ~BIT(0);
irqmap &= ~BIT(1);
}
for_each_set_bit(irqn, &irqmap, BITS_PER_LONG) {
......
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