Merge maxwell.earthlink.net:/usr/src/linus-2.5

into maxwell.earthlink.net:/usr/src/fbdev-2.5

arch/cris/drivers/eeprom.c

@@ -815,7 +815,7 @@ static int read_from_eeprom(char * buf, int count)
       i2c_outbyte( eeprom.select_cmd | 1 );
     }
 
-    if(i2c_getack());
+    if(i2c_getack())
     {
       break;
     }

arch/i386/boot/bootsect.S

@@ -405,7 +405,7 @@ kill_motor:
 	ret
 
 sectors:	.word 0
-disksizes:	.byte 36, 18, 15, 9
+disksizes:	.byte 36, 21, 18, 15, 9
 msg1:		.byte 13, 10
 		.ascii "Loading"
 

arch/i386/kernel/acpi/boot.c

@@ -24,6 +24,7 @@
  */
 
 #include <linux/init.h>
+#include <linux/config.h>
 #include <linux/acpi.h>
 #include <asm/pgalloc.h>
 #include <asm/apic.h>

arch/i386/kernel/cpu/amd.c

@@ -151,11 +151,10 @@ static void __init init_amd(struct cpuinfo_x86 *c)
 		case 6: /* An Athlon/Duron */
  
 			/* Bit 15 of Athlon specific MSR 15, needs to be 0
- 			 * to enable SSE on Palomino/Morgan CPU's.
-			 * If the BIOS didn't enable it already, enable it
-			 * here.
+ 			 * to enable SSE on Palomino/Morgan/Barton CPU's.
+			 * If the BIOS didn't enable it already, enable it here.
 			 */
-			if (c->x86_model == 6 || c->x86_model == 7) {
+			if (c->x86_model >= 6 && c->x86_model <= 10) {
 				if (!cpu_has(c, X86_FEATURE_XMM)) {
 					printk(KERN_INFO "Enabling disabled K7/SSE Support.\n");
 					rdmsr(MSR_K7_HWCR, l, h);

arch/i386/kernel/cpu/centaur.c

@@ -412,8 +412,9 @@ static unsigned int centaur_size_cache(struct cpuinfo_x86 * c, unsigned int size
 		size >>= 8;
 
 	/* VIA also screwed up Nehemiah stepping 1, and made
-	   it return '65KB' instead of '64KB' */
-	if ((c->x86==6) && (c->x86_model==9) && (c->x86_mask==1))
+	   it return '65KB' instead of '64KB'
+	   - Note, it seems this may only be in engineering samples. */
+	if ((c->x86==6) && (c->x86_model==9) && (c->x86_mask==1) && (size==65))
 		size -=1;
 
 	return size;

arch/i386/kernel/entry.S

@@ -228,7 +228,6 @@ need_resched:
 #define SYSENTER_RETURN 0xffffe010
 
 	# sysenter call handler stub
-	ALIGN
 ENTRY(sysenter_entry)
 	sti
 	pushl $(__USER_DS)
@@ -271,7 +270,6 @@ ENTRY(sysenter_entry)
 
 
 	# system call handler stub
-	ALIGN
 ENTRY(system_call)
 	pushl %eax			# save orig_eax
 	SAVE_ALL

arch/i386/kernel/setup.c

@@ -14,6 +14,9 @@
  * Moved CPU detection code to cpu/${cpu}.c
  *    Patrick Mochel <mochel@osdl.org>, March 2002
  *
+ *  Provisions for empty E820 memory regions (reported by certain BIOSes).
+ *  Alex Achenbach <xela@slit.de>, December 2002.
+ *
  */
 
 /*
@@ -279,7 +282,7 @@ static int __init sanitize_e820_map(struct e820entry * biosmap, char * pnr_map)
 	int chgidx, still_changing;
 	int overlap_entries;
 	int new_bios_entry;
-	int old_nr, new_nr;
+	int old_nr, new_nr, chg_nr;
 	int i;
 
 	/*
@@ -333,20 +336,24 @@ static int __init sanitize_e820_map(struct e820entry * biosmap, char * pnr_map)
 	for (i=0; i < 2*old_nr; i++)
 		change_point[i] = &change_point_list[i];
 
-	/* record all known change-points (starting and ending addresses) */
+	/* record all known change-points (starting and ending addresses),
+	   omitting those that are for empty memory regions */
 	chgidx = 0;
 	for (i=0; i < old_nr; i++)	{
+		if (biosmap[i].size != 0) {
 			change_point[chgidx]->addr = biosmap[i].addr;
 			change_point[chgidx++]->pbios = &biosmap[i];
 			change_point[chgidx]->addr = biosmap[i].addr + biosmap[i].size;
 			change_point[chgidx++]->pbios = &biosmap[i];
 		}
+	}
+	chg_nr = chgidx;    	/* true number of change-points */
 
 	/* sort change-point list by memory addresses (low -> high) */
 	still_changing = 1;
 	while (still_changing)	{
 		still_changing = 0;
-		for (i=1; i < 2*old_nr; i++)  {
+		for (i=1; i < chg_nr; i++)  {
 			/* if <current_addr> > <last_addr>, swap */
 			/* or, if current=<start_addr> & last=<end_addr>, swap */
 			if ((change_point[i]->addr < change_point[i-1]->addr) ||
@@ -369,7 +376,7 @@ static int __init sanitize_e820_map(struct e820entry * biosmap, char * pnr_map)
 	last_type = 0;		 /* start with undefined memory type */
 	last_addr = 0;		 /* start with 0 as last starting address */
 	/* loop through change-points, determining affect on the new bios map */
-	for (chgidx=0; chgidx < 2*old_nr; chgidx++)
+	for (chgidx=0; chgidx < chg_nr; chgidx++)
 	{
 		/* keep track of all overlapping bios entries */
 		if (change_point[chgidx]->addr == change_point[chgidx]->pbios->addr)

drivers/char/generic_serial.c

@@ -142,14 +142,14 @@ int gs_write(struct tty_struct * tty, int from_user,
  
 		/* Can't copy more? break out! */
 		if (c <= 0) break;
-		if (from_user)
+		if (from_user) {
 			if (copy_from_user (port->xmit_buf + port->xmit_head, 
 					    buf, c)) {
 				up (& port->port_write_sem);
 				return -EFAULT;
 			}
 
-		else
+		} else
 			memcpy (port->xmit_buf + port->xmit_head, buf, c);
 
 		port -> xmit_cnt += c;

drivers/ide/pci/triflex.h

@@ -18,31 +18,26 @@ static int triflex_get_info(char *, char **, off_t, int);
 
 static ide_pci_device_t triflex_devices[] __devinitdata = {
 	{
-		.vendor 	PCI_VENDOR_ID_COMPAQ,
-		.device		PCI_DEVICE_ID_COMPAQ_TRIFLEX_IDE,
-		.name		"TRIFLEX",
-		.init_chipset	init_chipset_triflex,
-		.init_iops	NULL,
-		.init_hwif	init_hwif_triflex,
-		.channels	2,
-		.autodma	AUTODMA,
-		.enablebits	{{0x80, 0x01, 0x01}, {0x80, 0x02, 0x02}},
-		.bootable	ON_BOARD,
-		.extra		0,
+		.vendor 	= PCI_VENDOR_ID_COMPAQ,
+		.device		= PCI_DEVICE_ID_COMPAQ_TRIFLEX_IDE,
+		.name		= "TRIFLEX",
+		.init_chipset	= init_chipset_triflex,
+		.init_iops	= NULL,
+		.init_hwif	= init_hwif_triflex,
+		.channels	= 2,
+		.autodma	= AUTODMA,
+		.enablebits	= {{0x80, 0x01, 0x01}, {0x80, 0x02, 0x02}},
+		.bootable	= ON_BOARD,
 	},{	
-		.vendor		0,
-		.device		0,
-		.channels	0,
-		.bootable	EOL,
+		.bootable	= EOL,
 	}
 };
 
 #ifdef CONFIG_PROC_FS
 static ide_pci_host_proc_t triflex_proc __initdata = {
-		name:		"triflex",
-		set:		1,
-		get_info: 	triflex_get_info,
-		parent: 	NULL,
+	.name		= "triflex",
+	.set		= 1,
+	.get_info 	= triflex_get_info,
 };
 #endif
 

drivers/md/dm-ioctl.c

@@ -173,14 +173,18 @@ static void free_cell(struct hash_cell *hc)
  */
 static int register_with_devfs(struct hash_cell *hc)
 {
-	char name[32];
 	struct gendisk *disk = dm_disk(hc->md);
+	char *name = kmalloc(DM_NAME_LEN + strlen(DM_DIR) + 1);
+	if (!name) {
+		return -ENOMEM;
+	}
 
 	sprintf(name, DM_DIR "/%s", hc->name);
 	devfs_register(NULL, name, DEVFS_FL_CURRENT_OWNER,
 		       disk->major, disk->first_minor,
 		       S_IFBLK | S_IRUSR | S_IWUSR | S_IRGRP,
 		       &dm_blk_dops, NULL);
+	kfree(name);
 	return 0;
 }
 
@@ -545,7 +549,7 @@ static inline int get_mode(struct dm_ioctl *param)
 
 static int check_name(const char *name)
 {
-	if (strchr(name, '/')) {
+	if (name[0] == '/') {
 		DMWARN("invalid device name");
 		return -EINVAL;
 	}
@@ -887,6 +891,7 @@ static int reload(struct dm_ioctl *param, struct dm_ioctl *user)
 		dm_table_put(t);
 		return r;
 	}
+	dm_table_put(t);	/* md will have taken its own reference */
 
 	set_disk_ro(dm_disk(md), (param->flags & DM_READONLY_FLAG));
 	dm_put(md);
@@ -1122,17 +1127,17 @@ int __init dm_interface_init(void)
 	return 0;
 
       failed:
+	devfs_remove(DM_DIR "/control");
+	if (misc_deregister(&_dm_misc) < 0)
+		DMERR("misc_deregister failed for control device");
 	dm_hash_exit();
-	misc_deregister(&_dm_misc);
 	return r;
 }
 
 void dm_interface_exit(void)
 {
-	dm_hash_exit();
-
 	devfs_remove(DM_DIR "/control");
-
 	if (misc_deregister(&_dm_misc) < 0)
 		DMERR("misc_deregister failed for control device");
+	dm_hash_exit();
 }

drivers/md/dm-table.c

@@ -79,7 +79,7 @@ static unsigned int int_log(unsigned long n, unsigned long base)
 }
 
 #define __HIGH(l, r) if (*(l) < (r)) *(l) = (r)
-#define __LOW(l, r) if (*(l) < (r)) *(l) = (r)
+#define __LOW(l, r) if (*(l) == 0 || *(l) > (r)) *(l) = (r)
 
 /*
  * Combine two io_restrictions, always taking the lower value.
@@ -591,7 +591,7 @@ int dm_table_add_target(struct dm_table *t, const char *type,
 	tgt->type = dm_get_target_type(type);
 	if (!tgt->type) {
 		tgt->error = "unknown target type";
-		goto bad;
+		return -EINVAL;
 	}
 
 	tgt->table = t;
@@ -604,6 +604,7 @@ int dm_table_add_target(struct dm_table *t, const char *type,
 	 */
 	if (!adjoin(t, tgt)) {
 		tgt->error = "Gap in table";
+		r = -EINVAL;
 		goto bad;
 	}
 

drivers/mtd/chips/amd_flash.c

@@ -120,10 +120,10 @@ static struct mtd_info *amd_flash_probe(struct map_info *map);
 
 
 static struct mtd_chip_driver amd_flash_chipdrv = {
-	probe: amd_flash_probe,
-	destroy: amd_flash_destroy,
-	name: "amd_flash",
-	module: THIS_MODULE
+	.probe		= amd_flash_probe,
+	.destroy	= amd_flash_destroy,
+	.name		= "amd_flash",
+	.module		= THIS_MODULE
 };
 
 
@@ -424,194 +424,194 @@ static struct mtd_info *amd_flash_probe(struct map_info *map)
 	 */
 	const struct amd_flash_info table[] = {
 	{
-		mfr_id: MANUFACTURER_AMD,
-		dev_id: AM29LV160DT,
-		name: "AMD AM29LV160DT",
-		size: 0x00200000,
-		numeraseregions: 4,
-		regions: {
-			{ offset: 0x000000, erasesize: 0x10000, numblocks: 31 },
-			{ offset: 0x1F0000, erasesize: 0x08000, numblocks:  1 },
-			{ offset: 0x1F8000, erasesize: 0x02000, numblocks:  2 },
-			{ offset: 0x1FC000, erasesize: 0x04000, numblocks:  1 }
+		.mfr_id = MANUFACTURER_AMD,
+		.dev_id = AM29LV160DT,
+		.name = "AMD AM29LV160DT",
+		.size = 0x00200000,
+		.numeraseregions = 4,
+		.regions = {
+			{ .offset = 0x000000, .erasesize = 0x10000, .numblocks = 31 },
+			{ .offset = 0x1F0000, .erasesize = 0x08000, .numblocks  = 1 },
+			{ .offset = 0x1F8000, .erasesize = 0x02000, .numblocks  = 2 },
+			{ .offset = 0x1FC000, .erasesize = 0x04000, .numblocks  = 1 }
 		}
 	}, {
-		mfr_id: MANUFACTURER_AMD,
-		dev_id: AM29LV160DB,
-		name: "AMD AM29LV160DB",
-		size: 0x00200000,
-		numeraseregions: 4,
-		regions: {
-			{ offset: 0x000000, erasesize: 0x04000, numblocks:  1 },
-			{ offset: 0x004000, erasesize: 0x02000, numblocks:  2 },
-			{ offset: 0x008000, erasesize: 0x08000, numblocks:  1 },
-			{ offset: 0x010000, erasesize: 0x10000, numblocks: 31 }
+		.mfr_id = MANUFACTURER_AMD,
+		.dev_id = AM29LV160DB,
+		.name = "AMD AM29LV160DB",
+		.size = 0x00200000,
+		.numeraseregions = 4,
+		.regions = {
+			{ .offset = 0x000000, .erasesize = 0x04000, .numblocks  = 1 },
+			{ .offset = 0x004000, .erasesize = 0x02000, .numblocks  = 2 },
+			{ .offset = 0x008000, .erasesize = 0x08000, .numblocks  = 1 },
+			{ .offset = 0x010000, .erasesize = 0x10000, .numblocks = 31 }
 		}
 	}, {
-		mfr_id: MANUFACTURER_TOSHIBA,
-		dev_id: TC58FVT160,
-		name: "Toshiba TC58FVT160",
-		size: 0x00200000,
-		numeraseregions: 4,
-		regions: {
-			{ offset: 0x000000, erasesize: 0x10000, numblocks: 31 },
-			{ offset: 0x1F0000, erasesize: 0x08000, numblocks:  1 },
-			{ offset: 0x1F8000, erasesize: 0x02000, numblocks:  2 },
-			{ offset: 0x1FC000, erasesize: 0x04000, numblocks:  1 }
+		.mfr_id = MANUFACTURER_TOSHIBA,
+		.dev_id = TC58FVT160,
+		.name = "Toshiba TC58FVT160",
+		.size = 0x00200000,
+		.numeraseregions = 4,
+		.regions = {
+			{ .offset = 0x000000, .erasesize = 0x10000, .numblocks = 31 },
+			{ .offset = 0x1F0000, .erasesize = 0x08000, .numblocks  = 1 },
+			{ .offset = 0x1F8000, .erasesize = 0x02000, .numblocks  = 2 },
+			{ .offset = 0x1FC000, .erasesize = 0x04000, .numblocks  = 1 }
 		}
 	}, {
-		mfr_id: MANUFACTURER_FUJITSU,
-		dev_id: MBM29LV160TE,
-		name: "Fujitsu MBM29LV160TE",
-		size: 0x00200000,
-		numeraseregions: 4,
-		regions: {
-			{ offset: 0x000000, erasesize: 0x10000, numblocks: 31 },
-			{ offset: 0x1F0000, erasesize: 0x08000, numblocks:  1 },
-			{ offset: 0x1F8000, erasesize: 0x02000, numblocks:  2 },
-			{ offset: 0x1FC000, erasesize: 0x04000, numblocks:  1 }
+		.mfr_id = MANUFACTURER_FUJITSU,
+		.dev_id = MBM29LV160TE,
+		.name = "Fujitsu MBM29LV160TE",
+		.size = 0x00200000,
+		.numeraseregions = 4,
+		.regions = {
+			{ .offset = 0x000000, .erasesize = 0x10000, .numblocks = 31 },
+			{ .offset = 0x1F0000, .erasesize = 0x08000, .numblocks  = 1 },
+			{ .offset = 0x1F8000, .erasesize = 0x02000, .numblocks  = 2 },
+			{ .offset = 0x1FC000, .erasesize = 0x04000, .numblocks  = 1 }
 		}
 	}, {
-		mfr_id: MANUFACTURER_TOSHIBA,
-		dev_id: TC58FVB160,
-		name: "Toshiba TC58FVB160",
-		size: 0x00200000,
-		numeraseregions: 4,
-		regions: {
-			{ offset: 0x000000, erasesize: 0x04000, numblocks:  1 },
-			{ offset: 0x004000, erasesize: 0x02000, numblocks:  2 },
-			{ offset: 0x008000, erasesize: 0x08000, numblocks:  1 },
-			{ offset: 0x010000, erasesize: 0x10000, numblocks: 31 }
+		.mfr_id = MANUFACTURER_TOSHIBA,
+		.dev_id = TC58FVB160,
+		.name = "Toshiba TC58FVB160",
+		.size = 0x00200000,
+		.numeraseregions = 4,
+		.regions = {
+			{ .offset = 0x000000, .erasesize = 0x04000, .numblocks  = 1 },
+			{ .offset = 0x004000, .erasesize = 0x02000, .numblocks  = 2 },
+			{ .offset = 0x008000, .erasesize = 0x08000, .numblocks  = 1 },
+			{ .offset = 0x010000, .erasesize = 0x10000, .numblocks = 31 }
 		}
 	}, {
-		mfr_id: MANUFACTURER_FUJITSU,
-		dev_id: MBM29LV160BE,
-		name: "Fujitsu MBM29LV160BE",
-		size: 0x00200000,
-		numeraseregions: 4,
-		regions: {
-			{ offset: 0x000000, erasesize: 0x04000, numblocks:  1 },
-			{ offset: 0x004000, erasesize: 0x02000, numblocks:  2 },
-			{ offset: 0x008000, erasesize: 0x08000, numblocks:  1 },
-			{ offset: 0x010000, erasesize: 0x10000, numblocks: 31 }
+		.mfr_id = MANUFACTURER_FUJITSU,
+		.dev_id = MBM29LV160BE,
+		.name = "Fujitsu MBM29LV160BE",
+		.size = 0x00200000,
+		.numeraseregions = 4,
+		.regions = {
+			{ .offset = 0x000000, .erasesize = 0x04000, .numblocks  = 1 },
+			{ .offset = 0x004000, .erasesize = 0x02000, .numblocks  = 2 },
+			{ .offset = 0x008000, .erasesize = 0x08000, .numblocks  = 1 },
+			{ .offset = 0x010000, .erasesize = 0x10000, .numblocks = 31 }
 		}
 	}, {
-		mfr_id: MANUFACTURER_AMD,
-		dev_id: AM29LV800BB,
-		name: "AMD AM29LV800BB",
-		size: 0x00100000,
-		numeraseregions: 4,
-		regions: {
-			{ offset: 0x000000, erasesize: 0x04000, numblocks:  1 },
-			{ offset: 0x004000, erasesize: 0x02000, numblocks:  2 },
-			{ offset: 0x008000, erasesize: 0x08000, numblocks:  1 },
-			{ offset: 0x010000, erasesize: 0x10000, numblocks: 15 }
+		.mfr_id = MANUFACTURER_AMD,
+		.dev_id = AM29LV800BB,
+		.name = "AMD AM29LV800BB",
+		.size = 0x00100000,
+		.numeraseregions = 4,
+		.regions = {
+			{ .offset = 0x000000, .erasesize = 0x04000, .numblocks  = 1 },
+			{ .offset = 0x004000, .erasesize = 0x02000, .numblocks  = 2 },
+			{ .offset = 0x008000, .erasesize = 0x08000, .numblocks  = 1 },
+			{ .offset = 0x010000, .erasesize = 0x10000, .numblocks = 15 }
 		}
 	}, {
-		mfr_id: MANUFACTURER_AMD,
-		dev_id: AM29F800BB,
-		name: "AMD AM29F800BB",
-		size: 0x00100000,
-		numeraseregions: 4,
-		regions: {
-			{ offset: 0x000000, erasesize: 0x04000, numblocks:  1 },
-			{ offset: 0x004000, erasesize: 0x02000, numblocks:  2 },
-			{ offset: 0x008000, erasesize: 0x08000, numblocks:  1 },
-			{ offset: 0x010000, erasesize: 0x10000, numblocks: 15 }
+		.mfr_id = MANUFACTURER_AMD,
+		.dev_id = AM29F800BB,
+		.name = "AMD AM29F800BB",
+		.size = 0x00100000,
+		.numeraseregions = 4,
+		.regions = {
+			{ .offset = 0x000000, .erasesize = 0x04000, .numblocks  = 1 },
+			{ .offset = 0x004000, .erasesize = 0x02000, .numblocks  = 2 },
+			{ .offset = 0x008000, .erasesize = 0x08000, .numblocks  = 1 },
+			{ .offset = 0x010000, .erasesize = 0x10000, .numblocks = 15 }
 		}
 	}, {
-		mfr_id: MANUFACTURER_AMD,
-		dev_id: AM29LV800BT,
-		name: "AMD AM29LV800BT",
-		size: 0x00100000,
-		numeraseregions: 4,
-		regions: {
-			{ offset: 0x000000, erasesize: 0x10000, numblocks: 15 },
-			{ offset: 0x0F0000, erasesize: 0x08000, numblocks:  1 },
-			{ offset: 0x0F8000, erasesize: 0x02000, numblocks:  2 },
-			{ offset: 0x0FC000, erasesize: 0x04000, numblocks:  1 }
+		.mfr_id = MANUFACTURER_AMD,
+		.dev_id = AM29LV800BT,
+		.name = "AMD AM29LV800BT",
+		.size = 0x00100000,
+		.numeraseregions = 4,
+		.regions = {
+			{ .offset = 0x000000, .erasesize = 0x10000, .numblocks = 15 },
+			{ .offset = 0x0F0000, .erasesize = 0x08000, .numblocks  = 1 },
+			{ .offset = 0x0F8000, .erasesize = 0x02000, .numblocks  = 2 },
+			{ .offset = 0x0FC000, .erasesize = 0x04000, .numblocks  = 1 }
 		}
 	}, {
-		mfr_id: MANUFACTURER_AMD,
-		dev_id: AM29F800BT,
-		name: "AMD AM29F800BT",
-		size: 0x00100000,
-		numeraseregions: 4,
-		regions: {
-			{ offset: 0x000000, erasesize: 0x10000, numblocks: 15 },
-			{ offset: 0x0F0000, erasesize: 0x08000, numblocks:  1 },
-			{ offset: 0x0F8000, erasesize: 0x02000, numblocks:  2 },
-			{ offset: 0x0FC000, erasesize: 0x04000, numblocks:  1 }
+		.mfr_id = MANUFACTURER_AMD,
+		.dev_id = AM29F800BT,
+		.name = "AMD AM29F800BT",
+		.size = 0x00100000,
+		.numeraseregions = 4,
+		.regions = {
+			{ .offset = 0x000000, .erasesize = 0x10000, .numblocks = 15 },
+			{ .offset = 0x0F0000, .erasesize = 0x08000, .numblocks  = 1 },
+			{ .offset = 0x0F8000, .erasesize = 0x02000, .numblocks  = 2 },
+			{ .offset = 0x0FC000, .erasesize = 0x04000, .numblocks  = 1 }
 		}
 	}, {
-		mfr_id: MANUFACTURER_AMD,
-		dev_id: AM29LV800BB,
-		name: "AMD AM29LV800BB",
-		size: 0x00100000,
-		numeraseregions: 4,
-		regions: {
-			{ offset: 0x000000, erasesize: 0x10000, numblocks: 15 },
-			{ offset: 0x0F0000, erasesize: 0x08000, numblocks:  1 },
-			{ offset: 0x0F8000, erasesize: 0x02000, numblocks:  2 },
-			{ offset: 0x0FC000, erasesize: 0x04000, numblocks:  1 }
+		.mfr_id = MANUFACTURER_AMD,
+		.dev_id = AM29LV800BB,
+		.name = "AMD AM29LV800BB",
+		.size = 0x00100000,
+		.numeraseregions = 4,
+		.regions = {
+			{ .offset = 0x000000, .erasesize = 0x10000, .numblocks = 15 },
+			{ .offset = 0x0F0000, .erasesize = 0x08000, .numblocks  = 1 },
+			{ .offset = 0x0F8000, .erasesize = 0x02000, .numblocks  = 2 },
+			{ .offset = 0x0FC000, .erasesize = 0x04000, .numblocks  = 1 }
 		}
 	}, {
-		mfr_id: MANUFACTURER_ST,
-		dev_id: M29W800T,
-		name: "ST M29W800T",
-		size: 0x00100000,
-		numeraseregions: 4,
-		regions: {
-			{ offset: 0x000000, erasesize: 0x10000, numblocks: 15 },
-			{ offset: 0x0F0000, erasesize: 0x08000, numblocks:  1 },
-			{ offset: 0x0F8000, erasesize: 0x02000, numblocks:  2 },
-			{ offset: 0x0FC000, erasesize: 0x04000, numblocks:  1 }
+		.mfr_id = MANUFACTURER_ST,
+		.dev_id = M29W800T,
+		.name = "ST M29W800T",
+		.size = 0x00100000,
+		.numeraseregions = 4,
+		.regions = {
+			{ .offset = 0x000000, .erasesize = 0x10000, .numblocks = 15 },
+			{ .offset = 0x0F0000, .erasesize = 0x08000, .numblocks  = 1 },
+			{ .offset = 0x0F8000, .erasesize = 0x02000, .numblocks  = 2 },
+			{ .offset = 0x0FC000, .erasesize = 0x04000, .numblocks  = 1 }
 		}
 	}, {
-		mfr_id: MANUFACTURER_ST,
-		dev_id: M29W160DT,
-		name: "ST M29W160DT",
-		size: 0x00200000,
-		numeraseregions: 4,
-		regions: {
-			{ offset: 0x000000, erasesize: 0x10000, numblocks: 31 },
-			{ offset: 0x1F0000, erasesize: 0x08000, numblocks:  1 },
-			{ offset: 0x1F8000, erasesize: 0x02000, numblocks:  2 },
-			{ offset: 0x1FC000, erasesize: 0x04000, numblocks:  1 }
+		.mfr_id = MANUFACTURER_ST,
+		.dev_id = M29W160DT,
+		.name = "ST M29W160DT",
+		.size = 0x00200000,
+		.numeraseregions = 4,
+		.regions = {
+			{ .offset = 0x000000, .erasesize = 0x10000, .numblocks = 31 },
+			{ .offset = 0x1F0000, .erasesize = 0x08000, .numblocks  = 1 },
+			{ .offset = 0x1F8000, .erasesize = 0x02000, .numblocks  = 2 },
+			{ .offset = 0x1FC000, .erasesize = 0x04000, .numblocks  = 1 }
 		}
 	}, {
-		mfr_id: MANUFACTURER_ST,
-		dev_id: M29W160DB,
-		name: "ST M29W160DB",
-		size: 0x00200000,
-		numeraseregions: 4,
-		regions: {
-			{ offset: 0x000000, erasesize: 0x04000, numblocks:  1 },
-			{ offset: 0x004000, erasesize: 0x02000, numblocks:  2 },
-			{ offset: 0x008000, erasesize: 0x08000, numblocks:  1 },
-			{ offset: 0x010000, erasesize: 0x10000, numblocks: 31 }
+		.mfr_id = MANUFACTURER_ST,
+		.dev_id = M29W160DB,
+		.name = "ST M29W160DB",
+		.size = 0x00200000,
+		.numeraseregions = 4,
+		.regions = {
+			{ .offset = 0x000000, .erasesize = 0x04000, .numblocks  = 1 },
+			{ .offset = 0x004000, .erasesize = 0x02000, .numblocks  = 2 },
+			{ .offset = 0x008000, .erasesize = 0x08000, .numblocks  = 1 },
+			{ .offset = 0x010000, .erasesize = 0x10000, .numblocks = 31 }
 		}
 	}, {
-		mfr_id: MANUFACTURER_AMD,
-		dev_id: AM29BDS323D,
-		name: "AMD AM29BDS323D",
-		size: 0x00400000,
-		numeraseregions: 3,
-		regions: {
-			{ offset: 0x000000, erasesize: 0x10000, numblocks: 48 },
-			{ offset: 0x300000, erasesize: 0x10000, numblocks: 15 },
-			{ offset: 0x3f0000, erasesize: 0x02000, numblocks:  8 },
+		.mfr_id = MANUFACTURER_AMD,
+		.dev_id = AM29BDS323D,
+		.name = "AMD AM29BDS323D",
+		.size = 0x00400000,
+		.numeraseregions = 3,
+		.regions = {
+			{ .offset = 0x000000, .erasesize = 0x10000, .numblocks = 48 },
+			{ .offset = 0x300000, .erasesize = 0x10000, .numblocks = 15 },
+			{ .offset = 0x3f0000, .erasesize = 0x02000, .numblocks  = 8 },
 		}
 	}, {
-		mfr_id: MANUFACTURER_AMD,
-		dev_id: AM29BDS643D,
-		name: "AMD AM29BDS643D",
-		size: 0x00800000,
-		numeraseregions: 3,
-		regions: {
-			{ offset: 0x000000, erasesize: 0x10000, numblocks: 96 },
-			{ offset: 0x600000, erasesize: 0x10000, numblocks: 31 },
-			{ offset: 0x7f0000, erasesize: 0x02000, numblocks:  8 },
+		.mfr_id = MANUFACTURER_AMD,
+		.dev_id = AM29BDS643D,
+		.name = "AMD AM29BDS643D",
+		.size = 0x00800000,
+		.numeraseregions = 3,
+		.regions = {
+			{ .offset = 0x000000, .erasesize = 0x10000, .numblocks = 96 },
+			{ .offset = 0x600000, .erasesize = 0x10000, .numblocks = 31 },
+			{ .offset = 0x7f0000, .erasesize = 0x02000, .numblocks  = 8 },
 		}
 	} 
 	};

drivers/mtd/chips/cfi_cmdset_0001.c

@@ -47,10 +47,10 @@ struct mtd_info *cfi_cmdset_0001(struct map_info *, int);
 static struct mtd_info *cfi_intelext_setup (struct map_info *);
 
 static struct mtd_chip_driver cfi_intelext_chipdrv = {
-	probe: NULL, /* Not usable directly */
-	destroy: cfi_intelext_destroy,
-	name: "cfi_cmdset_0001",
-	module: THIS_MODULE
+	.probe		= NULL, /* Not usable directly */
+	.destroy	= cfi_intelext_destroy,
+	.name		= "cfi_cmdset_0001",
+	.module		= THIS_MODULE
 };
 
 /* #define DEBUG_LOCK_BITS */

drivers/mtd/chips/cfi_cmdset_0002.c

@@ -43,10 +43,10 @@ static struct mtd_info *cfi_amdstd_setup (struct map_info *);
 
 
 static struct mtd_chip_driver cfi_amdstd_chipdrv = {
-	probe: NULL, /* Not usable directly */
-	destroy: cfi_amdstd_destroy,
-	name: "cfi_cmdset_0002",
-	module: THIS_MODULE
+	.probe		= NULL, /* Not usable directly */
+	.destroy	= cfi_amdstd_destroy,
+	.name		= "cfi_cmdset_0002",
+	.module		= THIS_MODULE
 };
 
 struct mtd_info *cfi_cmdset_0002(struct map_info *map, int primary)

drivers/mtd/chips/cfi_probe.c

@@ -294,8 +294,8 @@ static void print_cfi_ident(struct cfi_ident *cfip)
 #endif /* DEBUG_CFI */
 
 static struct chip_probe cfi_chip_probe = {
-	name: "CFI",
-	probe_chip: cfi_probe_chip
+	.name		= "CFI",
+	.probe_chip	= cfi_probe_chip
 };
 
 struct mtd_info *cfi_probe(struct map_info *map)
@@ -308,9 +308,9 @@ struct mtd_info *cfi_probe(struct map_info *map)
 }
 
 static struct mtd_chip_driver cfi_chipdrv = {
-	probe: cfi_probe,
-	name: "cfi_probe",
-	module: THIS_MODULE
+	.probe		= cfi_probe,
+	.name		= "cfi_probe",
+	.module		= THIS_MODULE
 };
 
 int __init cfi_probe_init(void)

drivers/mtd/chips/jedec.c

@@ -33,14 +33,51 @@ static unsigned long my_bank_size;
 
 /* Listing of parts and sizes. We need this table to learn the sector
    size of the chip and the total length */
-static const struct JEDECTable JEDEC_table[] = 
-  {{0x013D,"AMD Am29F017D",2*1024*1024,64*1024,MTD_CAP_NORFLASH},
-   {0x01AD,"AMD Am29F016",2*1024*1024,64*1024,MTD_CAP_NORFLASH},
-   {0x01D5,"AMD Am29F080",1*1024*1024,64*1024,MTD_CAP_NORFLASH},
-   {0x01A4,"AMD Am29F040",512*1024,64*1024,MTD_CAP_NORFLASH},
-   {0x20E3,"AMD Am29W040B",512*1024,64*1024,MTD_CAP_NORFLASH},
-   {0xC2AD,"Macronix MX29F016",2*1024*1024,64*1024,MTD_CAP_NORFLASH},
-   {}};
+static const struct JEDECTable JEDEC_table[] = {
+	{
+		.jedec		= 0x013D,
+		.name		= "AMD Am29F017D",
+		.size		= 2*1024*1024,
+		.sectorsize	= 64*1024,
+		.capabilities	= MTD_CAP_NORFLASH
+	},
+	{
+		.jedec		= 0x01AD,
+		.name		= "AMD Am29F016",
+		.size		= 2*1024*1024,
+		.sectorsize	= 64*1024,
+		.capabilities	= MTD_CAP_NORFLASH
+	},
+	{
+		.jedec		= 0x01D5,
+		.name		= "AMD Am29F080",
+		.size		= 1*1024*1024,
+		.sectorsize	= 64*1024,
+		.capabilities	= MTD_CAP_NORFLASH
+	},
+	{
+		.jedec		= 0x01A4,
+		.name		= "AMD Am29F040",
+		.size		= 512*1024,
+		.sectorsize	= 64*1024,
+		.capabilities	= MTD_CAP_NORFLASH
+	},
+	{
+		.jedec		= 0x20E3,
+		.name		= "AMD Am29W040B",
+		.size		= 512*1024,
+		.sectorsize	= 64*1024,
+		.capabilities	= MTD_CAP_NORFLASH
+	},
+	{
+		.jedec		= 0xC2AD,
+		.name		= "Macronix MX29F016",
+		.size		= 2*1024*1024,
+		.sectorsize	= 64*1024,
+		.capabilities	= MTD_CAP_NORFLASH
+	},
+	{ .jedec = 0x0 }
+};
 
 static const struct JEDECTable *jedec_idtoinf(__u8 mfr,__u8 id);
 static void jedec_sync(struct mtd_info *mtd) {};
@@ -54,9 +91,9 @@ static struct mtd_info *jedec_probe(struct map_info *map);
 
 
 static struct mtd_chip_driver jedec_chipdrv = {
-	probe: jedec_probe,
-	name: "jedec",
-	module: THIS_MODULE
+	.probe	= jedec_probe,
+	.name	= "jedec",
+	.module	= THIS_MODULE
 };
 
 /* Probe entry point */

drivers/mtd/chips/jedec_probe.c

@@ -75,176 +75,176 @@ struct amd_flash_info {
 
 static const struct amd_flash_info jedec_table[] = {
 	{
-		mfr_id: MANUFACTURER_AMD,
-		dev_id: AM29LV160DT,
-		name: "AMD AM29LV160DT",
-		DevSize: SIZE_2MiB,
-		NumEraseRegions: 4,
-		regions: {ERASEINFO(0x10000,31),
+		.mfr_id = MANUFACTURER_AMD,
+		.dev_id = AM29LV160DT,
+		.name = "AMD AM29LV160DT",
+		.DevSize = SIZE_2MiB,
+		.NumEraseRegions = 4,
+		.regions = {ERASEINFO(0x10000,31),
 			  ERASEINFO(0x08000,1),
 			  ERASEINFO(0x02000,2),
 			  ERASEINFO(0x04000,1)
 		}
 	}, {
-		mfr_id: MANUFACTURER_AMD,
-		dev_id: AM29LV160DB,
-		name: "AMD AM29LV160DB",
-		DevSize: SIZE_2MiB,
-		NumEraseRegions: 4,
-		regions: {ERASEINFO(0x04000,1),
+		.mfr_id = MANUFACTURER_AMD,
+		.dev_id = AM29LV160DB,
+		.name = "AMD AM29LV160DB",
+		.DevSize = SIZE_2MiB,
+		.NumEraseRegions = 4,
+		.regions = {ERASEINFO(0x04000,1),
 			  ERASEINFO(0x02000,2),
 			  ERASEINFO(0x08000,1),
 			  ERASEINFO(0x10000,31)
 		}
 	}, {
-		mfr_id: MANUFACTURER_TOSHIBA,
-		dev_id: TC58FVT160,
-		name: "Toshiba TC58FVT160",
-		DevSize: SIZE_2MiB,
-		NumEraseRegions: 4,
-		regions: {ERASEINFO(0x10000,31),
+		.mfr_id = MANUFACTURER_TOSHIBA,
+		.dev_id = TC58FVT160,
+		.name = "Toshiba TC58FVT160",
+		.DevSize = SIZE_2MiB,
+		.NumEraseRegions = 4,
+		.regions = {ERASEINFO(0x10000,31),
 			  ERASEINFO(0x08000,1),
 			  ERASEINFO(0x02000,2),
 			  ERASEINFO(0x04000,1)
 		}
 	}, {
-		mfr_id: MANUFACTURER_FUJITSU,
-		dev_id: MBM29LV160TE,
-		name: "Fujitsu MBM29LV160TE",
-		DevSize: SIZE_2MiB,
-		NumEraseRegions: 4,
-		regions: {ERASEINFO(0x10000,31),
+		.mfr_id = MANUFACTURER_FUJITSU,
+		.dev_id = MBM29LV160TE,
+		.name = "Fujitsu MBM29LV160TE",
+		.DevSize = SIZE_2MiB,
+		.NumEraseRegions = 4,
+		.regions = {ERASEINFO(0x10000,31),
 			  ERASEINFO(0x08000,1),
 			  ERASEINFO(0x02000,2),
 			  ERASEINFO(0x04000,1)
 		}
 	}, {
-		mfr_id: MANUFACTURER_TOSHIBA,
-		dev_id: TC58FVB160,
-		name: "Toshiba TC58FVB160",
-		DevSize: SIZE_2MiB,
-		NumEraseRegions: 4,
-		regions: {ERASEINFO(0x04000,1),
+		.mfr_id = MANUFACTURER_TOSHIBA,
+		.dev_id = TC58FVB160,
+		.name = "Toshiba TC58FVB160",
+		.DevSize = SIZE_2MiB,
+		.NumEraseRegions = 4,
+		.regions = {ERASEINFO(0x04000,1),
 			  ERASEINFO(0x02000,2),
 			  ERASEINFO(0x08000,1),
 			  ERASEINFO(0x10000,31)
 		}
 	}, {
-		mfr_id: MANUFACTURER_FUJITSU,
-		dev_id: MBM29LV160BE,
-		name: "Fujitsu MBM29LV160BE",
-		DevSize: SIZE_2MiB,
-		NumEraseRegions: 4,
-		regions: {ERASEINFO(0x04000,1),
+		.mfr_id = MANUFACTURER_FUJITSU,
+		.dev_id = MBM29LV160BE,
+		.name = "Fujitsu MBM29LV160BE",
+		.DevSize = SIZE_2MiB,
+		.NumEraseRegions = 4,
+		.regions = {ERASEINFO(0x04000,1),
 			  ERASEINFO(0x02000,2),
 			  ERASEINFO(0x08000,1),
 			  ERASEINFO(0x10000,31)
 		}
 	}, {
-		mfr_id: MANUFACTURER_AMD,
-		dev_id: AM29LV800BB,
-		name: "AMD AM29LV800BB",
-		DevSize: SIZE_1MiB,
-		NumEraseRegions: 4,
-		regions: {ERASEINFO(0x04000,1),
+		.mfr_id = MANUFACTURER_AMD,
+		.dev_id = AM29LV800BB,
+		.name = "AMD AM29LV800BB",
+		.DevSize = SIZE_1MiB,
+		.NumEraseRegions = 4,
+		.regions = {ERASEINFO(0x04000,1),
 			  ERASEINFO(0x02000,2),
 			  ERASEINFO(0x08000,1),
 			  ERASEINFO(0x10000,15),
 		}
 	}, {
-		mfr_id: MANUFACTURER_AMD,
-		dev_id: AM29F800BB,
-		name: "AMD AM29F800BB",
-		DevSize: SIZE_1MiB,
-		NumEraseRegions: 4,
-		regions: {ERASEINFO(0x04000,1),
+		.mfr_id = MANUFACTURER_AMD,
+		.dev_id = AM29F800BB,
+		.name = "AMD AM29F800BB",
+		.DevSize = SIZE_1MiB,
+		.NumEraseRegions = 4,
+		.regions = {ERASEINFO(0x04000,1),
 			  ERASEINFO(0x02000,2),
 			  ERASEINFO(0x08000,1),
 			  ERASEINFO(0x10000,15),
 		}
 	}, {
-		mfr_id: MANUFACTURER_AMD,
-		dev_id: AM29LV800BT,
-		name: "AMD AM29LV800BT",
-		DevSize: SIZE_1MiB,
-		NumEraseRegions: 4,
-		regions: {ERASEINFO(0x10000,15),
+		.mfr_id = MANUFACTURER_AMD,
+		.dev_id = AM29LV800BT,
+		.name = "AMD AM29LV800BT",
+		.DevSize = SIZE_1MiB,
+		.NumEraseRegions = 4,
+		.regions = {ERASEINFO(0x10000,15),
 			  ERASEINFO(0x08000,1),
 			  ERASEINFO(0x02000,2),
 			  ERASEINFO(0x04000,1)
 		}
 	}, {
-		mfr_id: MANUFACTURER_AMD,
-		dev_id: AM29F800BT,
-		name: "AMD AM29F800BT",
-		DevSize: SIZE_1MiB,
-		NumEraseRegions: 4,
-		regions: {ERASEINFO(0x10000,15),
+		.mfr_id = MANUFACTURER_AMD,
+		.dev_id = AM29F800BT,
+		.name = "AMD AM29F800BT",
+		.DevSize = SIZE_1MiB,
+		.NumEraseRegions = 4,
+		.regions = {ERASEINFO(0x10000,15),
 			  ERASEINFO(0x08000,1),
 			  ERASEINFO(0x02000,2),
 			  ERASEINFO(0x04000,1)
 		}
 	}, {
-		mfr_id: MANUFACTURER_AMD,
-		dev_id: AM29LV800BB,
-		name: "AMD AM29LV800BB",
-		DevSize: SIZE_1MiB,
-		NumEraseRegions: 4,
-		regions: {ERASEINFO(0x10000,15),
+		.mfr_id = MANUFACTURER_AMD,
+		.dev_id = AM29LV800BB,
+		.name = "AMD AM29LV800BB",
+		.DevSize = SIZE_1MiB,
+		.NumEraseRegions = 4,
+		.regions = {ERASEINFO(0x10000,15),
 			  ERASEINFO(0x08000,1),
 			  ERASEINFO(0x02000,2),
 			  ERASEINFO(0x04000,1)
 		}
 	}, {
-		mfr_id: MANUFACTURER_ST,
-		dev_id: M29W800T,
-		name: "ST M29W800T",
-		DevSize: SIZE_1MiB,
-		NumEraseRegions: 4,
-		regions: {ERASEINFO(0x10000,15),
+		.mfr_id = MANUFACTURER_ST,
+		.dev_id = M29W800T,
+		.name = "ST M29W800T",
+		.DevSize = SIZE_1MiB,
+		.NumEraseRegions = 4,
+		.regions = {ERASEINFO(0x10000,15),
 			  ERASEINFO(0x08000,1),
 			  ERASEINFO(0x02000,2),
 			  ERASEINFO(0x04000,1)
 		}
 	}, {
-		mfr_id: MANUFACTURER_ST,
-		dev_id: M29W160DT,
-		name: "ST M29W160DT",
-		DevSize: SIZE_2MiB,
-		NumEraseRegions: 4,
-		regions: {ERASEINFO(0x10000,31),
+		.mfr_id = MANUFACTURER_ST,
+		.dev_id = M29W160DT,
+		.name = "ST M29W160DT",
+		.DevSize = SIZE_2MiB,
+		.NumEraseRegions = 4,
+		.regions = {ERASEINFO(0x10000,31),
 			  ERASEINFO(0x08000,1),
 			  ERASEINFO(0x02000,2),
 			  ERASEINFO(0x04000,1)
 		}
 	}, {
-		mfr_id: MANUFACTURER_ST,
-		dev_id: M29W160DB,
-		name: "ST M29W160DB",
-		DevSize: SIZE_2MiB,
-		NumEraseRegions: 4,
-		regions: {ERASEINFO(0x04000,1),
+		.mfr_id = MANUFACTURER_ST,
+		.dev_id = M29W160DB,
+		.name = "ST M29W160DB",
+		.DevSize = SIZE_2MiB,
+		.NumEraseRegions = 4,
+		.regions = {ERASEINFO(0x04000,1),
 			  ERASEINFO(0x02000,2),
 			  ERASEINFO(0x08000,1),
 			  ERASEINFO(0x10000,31)
 		}
 	}, {
-		mfr_id: MANUFACTURER_ATMEL,
-		dev_id: AT49BV16X4,
-		name: "Atmel AT49BV16X4",
-		DevSize: SIZE_2MiB,
-		NumEraseRegions: 3,
-		regions: {ERASEINFO(0x02000,8),
+		.mfr_id = MANUFACTURER_ATMEL,
+		.dev_id = AT49BV16X4,
+		.name = "Atmel AT49BV16X4",
+		.DevSize = SIZE_2MiB,
+		.NumEraseRegions = 3,
+		.regions = {ERASEINFO(0x02000,8),
 			  ERASEINFO(0x08000,2),
 			  ERASEINFO(0x10000,30)
 		}
 	}, {
-                mfr_id: MANUFACTURER_ATMEL,
-                dev_id: AT49BV16X4T,
-                name: "Atmel AT49BV16X4T",
-                DevSize: SIZE_2MiB,
-                NumEraseRegions: 3,
-                regions: {ERASEINFO(0x10000,30),
+                .mfr_id = MANUFACTURER_ATMEL,
+                .dev_id = AT49BV16X4T,
+                .name = "Atmel AT49BV16X4T",
+                .DevSize = SIZE_2MiB,
+                .NumEraseRegions = 3,
+                .regions = {ERASEINFO(0x10000,30),
                           ERASEINFO(0x08000,2),
 			  ERASEINFO(0x02000,8)
                 }
@@ -403,8 +403,8 @@ static int jedec_probe_chip(struct map_info *map, __u32 base,
 }
 
 static struct chip_probe jedec_chip_probe = {
-	name: "JEDEC",
-	probe_chip: jedec_probe_chip
+	.name = "JEDEC",
+	.probe_chip = jedec_probe_chip
 };
 
 struct mtd_info *jedec_probe(struct map_info *map)
@@ -417,9 +417,9 @@ struct mtd_info *jedec_probe(struct map_info *map)
 }
 
 static struct mtd_chip_driver jedec_chipdrv = {
-	probe: jedec_probe,
-	name: "jedec_probe",
-	module: THIS_MODULE
+	.probe	= jedec_probe,
+	.name	= "jedec_probe",
+	.module	= THIS_MODULE
 };
 
 int __init jedec_probe_init(void)

drivers/mtd/chips/map_absent.c

@@ -36,10 +36,10 @@ static void map_absent_destroy (struct mtd_info *);
 
 
 static struct mtd_chip_driver map_absent_chipdrv = {
-	probe: 		map_absent_probe,
-	destroy:	map_absent_destroy,
-	name: 		"map_absent",
-	module: 	THIS_MODULE
+	.probe 		= map_absent_probe,
+	.destroy	= map_absent_destroy,
+	.name 		= "map_absent",
+	.module 	= THIS_MODULE
 };
 
 static struct mtd_info *map_absent_probe(struct map_info *map)

drivers/mtd/chips/map_ram.c

@@ -23,9 +23,9 @@ static struct mtd_info *map_ram_probe(struct map_info *map);
 
 
 static struct mtd_chip_driver mapram_chipdrv = {
-	probe: map_ram_probe,
-	name: "map_ram",
-	module: THIS_MODULE
+	.probe	= map_ram_probe,
+	.name	= "map_ram",
+	.module	= THIS_MODULE
 };
 
 static struct mtd_info *map_ram_probe(struct map_info *map)

drivers/mtd/chips/map_rom.c

@@ -21,9 +21,9 @@ static void maprom_nop (struct mtd_info *);
 struct mtd_info *map_rom_probe(struct map_info *map);
 
 static struct mtd_chip_driver maprom_chipdrv = {
-	probe: map_rom_probe,
-	name: "map_rom",
-	module: THIS_MODULE
+	.probe	= map_rom_probe,
+	.name	= "map_rom",
+	.module	= THIS_MODULE
 };
 
 struct mtd_info *map_rom_probe(struct map_info *map)

drivers/mtd/chips/sharp.c

@@ -98,10 +98,10 @@ struct mtd_info *sharp_probe(struct map_info *map);
 static void sharp_destroy(struct mtd_info *mtd);
 
 static struct mtd_chip_driver sharp_chipdrv = {
-	probe: sharp_probe,
-	destroy: sharp_destroy,
-	name: "sharp",
-	module: THIS_MODULE
+	.probe		= sharp_probe,
+	.destroy	= sharp_destroy,
+	.name		= "sharp",
+	.module		= THIS_MODULE
 };
 
 

drivers/mtd/ftl.c

@@ -155,8 +155,8 @@ static void ftl_notify_remove(struct mtd_info *mtd);
 void ftl_freepart(partition_t *part);
 
 static struct mtd_notifier ftl_notifier = {
-	add:	ftl_notify_add,
-	remove:	ftl_notify_remove,
+	.add	= ftl_notify_add,
+	.remove	= ftl_notify_remove,
 };
 
 /* Partition state flags */

drivers/mtd/maps/autcpu12-nvram.c

@@ -83,17 +83,17 @@ void autcpu12_copy_to(struct map_info *map, unsigned long to, const void *from,
 static struct mtd_info *sram_mtd;
 
 struct map_info autcpu12_sram_map = {
-	name: "SRAM",
-	size: 32768,
-	buswidth: 8,
-	read8: autcpu12_read8,
-	read16: autcpu12_read16,
-	read32: autcpu12_read32,
-	copy_from: autcpu12_copy_from,
-	write8: autcpu12_write8,
-	write16: autcpu12_write16,
-	write32: autcpu12_write32,
-	copy_to: autcpu12_copy_to
+	.name		= "SRAM",
+	.size		= 32768,
+	.buswidth	= 8,
+	.read8		= autcpu12_read8,
+	.read16		= autcpu12_read16,
+	.read32		= autcpu12_read32,
+	.copy_from	= autcpu12_copy_from,
+	.write8		= autcpu12_write8,
+	.write16	= autcpu12_write16,
+	.write32	= autcpu12_write32,
+	.copy_to	= autcpu12_copy_to
 };
 
 static int __init init_autcpu12_sram (void)

drivers/mtd/maps/cdb89712.c

@@ -14,8 +14,6 @@
 #include <linux/mtd/map.h>
 #include <linux/mtd/partitions.h>
 
-
-
 __u8 cdb89712_read8(struct map_info *map, unsigned long ofs)
 {
 	return __raw_readb(map->map_priv_1 + ofs);
@@ -65,28 +63,27 @@ void cdb89712_copy_to(struct map_info *map, unsigned long to, const void *from,
 	}
 }
 
-
 static struct mtd_info *flash_mtd;
 
 struct map_info cdb89712_flash_map = {
-	name: "flash",
-	size: FLASH_SIZE,
-	buswidth: FLASH_WIDTH,
-	read8: cdb89712_read8,
-	read16: cdb89712_read16,
-	read32: cdb89712_read32,
-	copy_from: cdb89712_copy_from,
-	write8: cdb89712_write8,
-	write16: cdb89712_write16,
-	write32: cdb89712_write32,
-	copy_to: cdb89712_copy_to
+	.name		= "flash",
+	.size		= FLASH_SIZE,
+	.buswidth	= FLASH_WIDTH,
+	.read8		= cdb89712_read8,
+	.read16		= cdb89712_read16,
+	.read32		= cdb89712_read32,
+	.copy_from	= cdb89712_copy_from,
+	.write8		= cdb89712_write8,
+	.write16	= cdb89712_write16,
+	.write32	= cdb89712_write32,
+	.copy_to	= cdb89712_copy_to
 };
 
 struct resource cdb89712_flash_resource = {
-	name:   "Flash",
-	start:  FLASH_START,
-	end:    FLASH_START + FLASH_SIZE - 1,
-	flags:  IORESOURCE_IO | IORESOURCE_BUSY,
+	.name	= "Flash",
+	.start	= FLASH_START,
+	.end	= FLASH_START + FLASH_SIZE - 1,
+	.flags	= IORESOURCE_IO | IORESOURCE_BUSY,
 };
 
 static int __init init_cdb89712_flash (void)
@@ -139,31 +136,27 @@ static int __init init_cdb89712_flash (void)
 	return err;
 }
 
-
-
-
-
 static struct mtd_info *sram_mtd;
 
 struct map_info cdb89712_sram_map = {
-	name: "SRAM",
-	size: SRAM_SIZE,
-	buswidth: SRAM_WIDTH,
-	read8: cdb89712_read8,
-	read16: cdb89712_read16,
-	read32: cdb89712_read32,
-	copy_from: cdb89712_copy_from,
-	write8: cdb89712_write8,
-	write16: cdb89712_write16,
-	write32: cdb89712_write32,
-	copy_to: cdb89712_copy_to
+	.name		= "SRAM",
+	.size		= SRAM_SIZE,
+	.buswidth	= SRAM_WIDTH,
+	.read8		= cdb89712_read8,
+	.read16		= cdb89712_read16,
+	.read32		= cdb89712_read32,
+	.copy_from	= cdb89712_copy_from,
+	.write8		= cdb89712_write8,
+	.write16	= cdb89712_write16,
+	.write32	= cdb89712_write32,
+	.copy_to	= cdb89712_copy_to
 };
 
 struct resource cdb89712_sram_resource = {
-	name:   "SRAM",
-	start:  SRAM_START,
-	end:    SRAM_START + SRAM_SIZE - 1,
-	flags:  IORESOURCE_IO | IORESOURCE_BUSY,
+	.name	= "SRAM",
+	.start	= SRAM_START,
+	.end	= SRAM_START + SRAM_SIZE - 1,
+	.flags	= IORESOURCE_IO | IORESOURCE_BUSY,
 };
 
 static int __init init_cdb89712_sram (void)
@@ -212,29 +205,23 @@ static int __init init_cdb89712_sram (void)
 	return err;
 }
 
-
-
-
-
-
-
 static struct mtd_info *bootrom_mtd;
 
 struct map_info cdb89712_bootrom_map = {
-	name: "BootROM",
-	size: BOOTROM_SIZE,
-	buswidth: BOOTROM_WIDTH,
-	read8: cdb89712_read8,
-	read16: cdb89712_read16,
-	read32: cdb89712_read32,
-	copy_from: cdb89712_copy_from,
+	.name		= "BootROM",
+	.size		= BOOTROM_SIZE,
+	.buswidth	= BOOTROM_WIDTH,
+	.read8		= cdb89712_read8,
+	.read16		= cdb89712_read16,
+	.read32		= cdb89712_read32,
+	.copy_from	= cdb89712_copy_from,
 };
 
 struct resource cdb89712_bootrom_resource = {
-	name:   "BootROM",
-	start:  BOOTROM_START,
-	end:    BOOTROM_START + BOOTROM_SIZE - 1,
-	flags:  IORESOURCE_IO | IORESOURCE_BUSY,
+	.name	= "BootROM",
+	.start	= BOOTROM_START,
+	.end	= BOOTROM_START + BOOTROM_SIZE - 1,
+	.flags	= IORESOURCE_IO | IORESOURCE_BUSY,
 };
 
 static int __init init_cdb89712_bootrom (void)
@@ -283,10 +270,6 @@ static int __init init_cdb89712_bootrom (void)
 	return err;
 }
 
-
-
-
-
 static int __init init_cdb89712_maps(void)
 {
 

drivers/mtd/maps/ceiva.c

@@ -76,15 +76,15 @@ static void clps_copy_to(struct map_info *map, unsigned long to, const void *fro
 }
 
 static struct map_info clps_map __initdata = {
-	name:		"clps flash",
-	read8:		clps_read8,
-	read16:		clps_read16,
-	read32:		clps_read32,
-	copy_from:	clps_copy_from,
-	write8:		clps_write8,
-	write16:	clps_write16,
-	write32:	clps_write32,
-	copy_to:	clps_copy_to,
+	.name		= "clps flash",
+	.read8		= clps_read8,
+	.read16		= clps_read16,
+	.read32		= clps_read32,
+	.copy_from	= clps_copy_from,
+	.write8		= clps_write8,
+	.write16	= clps_write16,
+	.write32	= clps_write32,
+	.copy_to	= clps_copy_to,
 };
 
 #ifdef CONFIG_MTD_CEIVA_STATICMAP
@@ -115,23 +115,25 @@ static struct map_info clps_map __initdata = {
 
 static struct mtd_partition ceiva_partitions[] = {
 	{
-		name: "Ceiva BOOT partition",
-		size:   BOOT_PARTITION_SIZE_KiB*1024,
-		offset: 0,
-
-	},{
-		name: "Ceiva parameters partition",
-		size:   PARAMS_PARTITION_SIZE_KiB*1024,
-		offset: (16 + 8) * 1024,
-	},{
-		name: "Ceiva kernel partition",
-		size: (KERNEL_PARTITION_SIZE_KiB)*1024,
-		offset: 0x20000,
-
-	},{
-		name: "Ceiva root filesystem partition",
-		offset: MTDPART_OFS_APPEND,
-		size: (ROOT_PARTITION_SIZE_KiB)*1024,
+		.name	= "Ceiva BOOT partition",
+		.size	= BOOT_PARTITION_SIZE_KiB*1024,
+
+	},
+	{
+		.name	= "Ceiva parameters partition",
+		.size	= PARAMS_PARTITION_SIZE_KiB*1024,
+		.offset	= (16 + 8) * 1024,
+	},
+	{
+		.name	= "Ceiva kernel partition",
+		.size	= (KERNEL_PARTITION_SIZE_KiB)*1024,
+		.offset	= 0x20000,
+
+	},
+	{
+		.name	= "Ceiva root filesystem partition",
+		.offset	= MTDPART_OFS_APPEND,
+		.size	= (ROOT_PARTITION_SIZE_KiB)*1024,
 	}
 };
 #endif

drivers/mtd/maps/cfi_flagadm.c

@@ -99,39 +99,39 @@ void flagadm_copy_to(struct map_info *map, unsigned long to, const void *from, s
 }
 
 struct map_info flagadm_map = {
-		name: "FlagaDM flash device",
-		size: FLASH_SIZE,
-		buswidth: 2,
-		read8: flagadm_read8,
-		read16: flagadm_read16,
-		read32: flagadm_read32,
-		copy_from: flagadm_copy_from,
-		write8: flagadm_write8,
-		write16: flagadm_write16,
-		write32: flagadm_write32,
-		copy_to: flagadm_copy_to
+	.name		= "FlagaDM flash device",
+	.size		= FLASH_SIZE,
+	.buswidth	= 2,
+	.read8		= flagadm_read8,
+	.read16		= flagadm_read16,
+	.read32		= flagadm_read32,
+	.copy_from	= flagadm_copy_from,
+	.write8		= flagadm_write8,
+	.write16	= flagadm_write16,
+	.write32	= flagadm_write32,
+	.copy_to	= flagadm_copy_to
 };
 
 struct mtd_partition flagadm_parts[] = {
 	{
-		name	: "Bootloader",
-		offset	: FLASH_PARTITION0_ADDR,
-		size	: FLASH_PARTITION0_SIZE
+		.name	= "Bootloader",
+		.offset	= FLASH_PARTITION0_ADDR,
+		.size	= FLASH_PARTITION0_SIZE
 	},
 	{
-		name	: "Kernel image",
-		offset	: FLASH_PARTITION1_ADDR,
-		size	: FLASH_PARTITION1_SIZE
+		.name	= "Kernel image",
+		.offset	= FLASH_PARTITION1_ADDR,
+		.size	= FLASH_PARTITION1_SIZE
 	},
 	{
-		name	: "Initial ramdisk image",
-		offset	: FLASH_PARTITION2_ADDR,
-		size	: FLASH_PARTITION2_SIZE
+		.name	= "Initial ramdisk image",
+		.offset	= FLASH_PARTITION2_ADDR,
+		.size	= FLASH_PARTITION2_SIZE
 	},
 	{	
-		name	: "Persistant storage",
-		offset	: FLASH_PARTITION3_ADDR,
-		size	: FLASH_PARTITION3_SIZE
+		.name	= "Persistant storage",
+		.offset	= FLASH_PARTITION3_ADDR,
+		.size	= FLASH_PARTITION3_SIZE
 	}
 };
 

drivers/mtd/maps/cstm_mips_ixx.c

@@ -132,20 +132,15 @@ void cstm_mips_ixx_set_vpp(struct map_info *map,int vpp)
 }
 
 const struct map_info basic_cstm_mips_ixx_map = {
-	NULL,
-	0,
-	0,
-	cstm_mips_ixx_read8,
-	cstm_mips_ixx_read16,
-	cstm_mips_ixx_read32,
-	cstm_mips_ixx_copy_from,
-	cstm_mips_ixx_write8,
-	cstm_mips_ixx_write16,
-	cstm_mips_ixx_write32,
-	cstm_mips_ixx_copy_to,
-        cstm_mips_ixx_set_vpp,
-	0,
-	0
+	.read8		= cstm_mips_ixx_read8,
+	.read16		= cstm_mips_ixx_read16,
+	.read32		= cstm_mips_ixx_read32,
+	.copy_from	= cstm_mips_ixx_copy_from,
+	.write8		= cstm_mips_ixx_write8,
+	.write16	= cstm_mips_ixx_write16,
+	.write32	= cstm_mips_ixx_write32,
+	.copy_to	= cstm_mips_ixx_copy_to,
+	.set_vpp	= cstm_mips_ixx_set_vpp,
 };
 
 /* board and partition description */
@@ -175,9 +170,8 @@ const struct cstm_mips_ixx_info cstm_mips_ixx_board_desc[PHYSMAP_NUMBER] =
 static struct mtd_partition cstm_mips_ixx_partitions[PHYSMAP_NUMBER][MAX_PHYSMAP_PARTITIONS] = {
 {   // 28F128J3A in 2x16 configuration
 	{
-		name: "main partition ",
-		size: 0x02000000, // 128 x 2 x 128k byte sectors
-		offset: 0,
+		.name	= "main partition ",
+		.size	= 0x02000000, // 128 x 2 x 128k byte sectors
 	},
 },
 };
@@ -197,9 +191,8 @@ const struct cstm_mips_ixx_info cstm_mips_ixx_board_desc[PHYSMAP_NUMBER] =
 static struct mtd_partition cstm_mips_ixx_partitions[PHYSMAP_NUMBER][MAX_PHYSMAP_PARTITIONS] = {
 { 
 	{
-		name: "main partition",
-		size:  CONFIG_MTD_CSTM_MIPS_IXX_LEN,
-		offset: 0,
+		.name	= "main partition",
+		.size	= CONFIG_MTD_CSTM_MIPS_IXX_LEN,
 	},
 },
 };

drivers/mtd/maps/dbox2-flash.c

@@ -16,22 +16,28 @@
 /* partition_info gives details on the logical partitions that the split the
  * single flash device into. If the size if zero we use up to the end of the
  * device. */
-static struct mtd_partition partition_info[]= {{name: "BR bootloader",		// raw
-						      size: 128 * 1024, 
-						      offset: 0,                  
-						      mask_flags: MTD_WRITEABLE},
-                                                     {name: "PPC bootloader",		// flfs
-						      size: 128 * 1024, 
-						      offset: MTDPART_OFS_APPEND, 
-						      mask_flags: 0},
-                                                     {name: "Kernel",			// idxfs
-						      size: 768 * 1024, 
-						      offset: MTDPART_OFS_APPEND, 
-						      mask_flags: 0},
-                                                     {name: "System",			// jffs
-						      size: MTDPART_SIZ_FULL, 
-						      offset: MTDPART_OFS_APPEND, 
-						      mask_flags: 0}};
+static struct mtd_partition partition_info[]= {
+	{
+		.name		= "BR bootloader",	/* raw */
+		.size		= 128 * 1024, 
+		.mask_flags	= MTD_WRITEABLE
+	},
+	{
+		.name		= "PPC bootloader",	/* flfs */
+		.size		= 128 * 1024, 
+		.offset		= MTDPART_OFS_APPEND, 
+	},
+	{
+		.name		= "Kernel",		/* idxfs */
+		.size		= 768 * 1024, 
+		.offset		= MTDPART_OFS_APPEND, 
+	},
+	{
+		.name		= "System",		/* jffs */
+		.size		= MTDPART_SIZ_FULL, 
+		.offset		= MTDPART_OFS_APPEND, 
+	}
+};
 
 #define NUM_PARTITIONS (sizeof(partition_info) / sizeof(partition_info[0]))
 
@@ -84,17 +90,17 @@ void dbox2_flash_copy_to(struct map_info *map, unsigned long to, const void *fro
 }
 
 struct map_info dbox2_flash_map = {
-	name: "D-Box 2 flash memory",
-	size: WINDOW_SIZE,
-	buswidth: 4,
-	read8: dbox2_flash_read8,
-	read16: dbox2_flash_read16,
-	read32: dbox2_flash_read32,
-	copy_from: dbox2_flash_copy_from,
-	write8: dbox2_flash_write8,
-	write16: dbox2_flash_write16,
-	write32: dbox2_flash_write32,
-	copy_to: dbox2_flash_copy_to
+	.name		= "D-Box 2 flash memory",
+	.size		= WINDOW_SIZE,
+	.buswidth	= 4,
+	.read8		= dbox2_flash_read8,
+	.read16		= dbox2_flash_read16,
+	.read32		= dbox2_flash_read32,
+	.copy_from	= dbox2_flash_copy_from,
+	.write8		= dbox2_flash_write8,
+	.write16	= dbox2_flash_write16,
+	.write32	= dbox2_flash_write32,
+	.copy_to	= dbox2_flash_copy_to
 };
 
 int __init init_dbox2_flash(void)

drivers/mtd/maps/dc21285.c

@@ -92,16 +92,16 @@ void dc21285_copy_to(struct map_info *map, unsigned long to, const void *from, s
 }
 
 struct map_info dc21285_map = {
-	name: "DC21285 flash",
-	size: 16*1024*1024,
-	read8: dc21285_read8,
-	read16: dc21285_read16,
-	read32: dc21285_read32,
-	copy_from: dc21285_copy_from,
-	write8: dc21285_write8,
-	write16: dc21285_write16,
-	write32: dc21285_write32,
-	copy_to: dc21285_copy_to
+	.name		= "DC21285 flash",
+	.size		= 16*1024*1024,
+	.read8		= dc21285_read8,
+	.read16		= dc21285_read16,
+	.read32		= dc21285_read32,
+	.copy_from	= dc21285_copy_from,
+	.write8		= dc21285_write8,
+	.write16	= dc21285_write16,
+	.write32	= dc21285_write32,
+	.copy_to	= dc21285_copy_to
 };
 
 

drivers/mtd/maps/edb7312.c

@@ -79,17 +79,17 @@ void edb7312nor_copy_to(struct map_info *map, unsigned long to, const void *from
 }
 
 struct map_info edb7312nor_map = {
-	name: "NOR flash on EDB7312",
-	size: WINDOW_SIZE,
-	buswidth: BUSWIDTH,
-	read8: edb7312nor_read8,
-	read16: edb7312nor_read16,
-	read32: edb7312nor_read32,
-	copy_from: edb7312nor_copy_from,
-	write8: edb7312nor_write8,
-	write16: edb7312nor_write16,
-	write32: edb7312nor_write32,
-	copy_to: edb7312nor_copy_to
+	.name		= "NOR flash on EDB7312",
+	.size		= WINDOW_SIZE,
+	.buswidth	= BUSWIDTH,
+	.read8		= edb7312nor_read8,
+	.read16		= edb7312nor_read16,
+	.read32		= edb7312nor_read32,
+	.copy_from	= edb7312nor_copy_from,
+	.write8		= edb7312nor_write8,
+	.write16	= edb7312nor_write16,
+	.write32	= edb7312nor_write32,
+	.copy_to	= edb7312nor_copy_to
 };
 
 #ifdef CONFIG_MTD_PARTITIONS
@@ -97,22 +97,21 @@ struct map_info edb7312nor_map = {
 /*
  * MTD partitioning stuff 
  */
-static struct mtd_partition static_partitions[3] =
-{
+static struct mtd_partition static_partitions[3] = {
 	{
-	name: "ARMboot",
-	  size: 0x40000,
-	  offset: 0
+		.name = "ARMboot",
+		.size = 0x40000,
+		.offset = 0
 	},
 	{
-	name: "Kernel",
-	  size: 0x200000,
-	  offset: 0x40000
+		.name = "Kernel",
+		.size = 0x200000,
+		.offset = 0x40000
 	},
 	{
-	name: "RootFS",
-	  size: 0xDC0000,
-	  offset: 0x240000
+		.name = "RootFS",
+		.size = 0xDC0000,
+		.offset = 0x240000
 	},
 };
 

drivers/mtd/maps/elan-104nc.c

@@ -58,15 +58,20 @@ static spinlock_t elan_104nc_spin = SPIN_LOCK_UNLOCKED;
 /* partition_info gives details on the logical partitions that the split the 
  * single flash device into. If the size if zero we use up to the end of the
  * device. */
-static struct mtd_partition partition_info[]={
-    { name: "ELAN-104NC flash boot partition", 
-      offset: 0, 
-      size: 640*1024 },
-    { name: "ELAN-104NC flash partition 1", 
-      offset: 640*1024, 
-      size: 896*1024 },
-    { name: "ELAN-104NC flash partition 2", 
-      offset: (640+896)*1024 }
+static struct mtd_partition partition_info[] = {
+	{
+		.name	= "ELAN-104NC flash boot partition", 
+		.size	= 640*1024
+	},
+	{
+		.name	= "ELAN-104NC flash partition 1", 
+		.offset	= 640*1024, 
+		.size	= 896*1024
+	},
+	{
+		.name	= "ELAN-104NC flash partition 2", 
+		.offset = (640+896)*1024,
+	}
 };
 #define NUM_PARTITIONS (sizeof(partition_info)/sizeof(partition_info[0]))
 
@@ -195,19 +200,20 @@ static void elan_104nc_copy_to(struct map_info *map, unsigned long to, const voi
 }
 
 static struct map_info elan_104nc_map = {
-	name: "ELAN-104NC flash",
-	size: 8*1024*1024, /* this must be set to a maximum possible amount
-			of flash so the cfi probe routines find all
+	.name		= "ELAN-104NC flash",
+	.size		= 8*1024*1024, /* this must be set to a maximum
+					  possible amount of flash so the
+					  cfi probe routines find all
 					  the chips */
-	buswidth: 2,
-	read8: elan_104nc_read8,
-	read16: elan_104nc_read16,
-	read32: elan_104nc_read32,
-	copy_from: elan_104nc_copy_from,
-	write8: elan_104nc_write8,
-	write16: elan_104nc_write16,
-	write32: elan_104nc_write32,
-	copy_to: elan_104nc_copy_to
+	.buswidth	= 2,
+	.read8		= elan_104nc_read8,
+	.read16		= elan_104nc_read16,
+	.read32		= elan_104nc_read32,
+	.copy_from	= elan_104nc_copy_from,
+	.write8		= elan_104nc_write8,
+	.write16	= elan_104nc_write16,
+	.write32	= elan_104nc_write32,
+	.copy_to	= elan_104nc_copy_to
 };
 
 /* MTD device for all of the flash. */

drivers/mtd/maps/epxa10db-flash.c

@@ -92,17 +92,17 @@ static void epxa_copy_to(struct map_info *map, unsigned long to, const void *fro
 
 
 static struct map_info epxa_map = {
-	name:		"EPXA flash",
-	size:		FLASH_SIZE,
-	buswidth:	2,
-	read8:		epxa_read8,
-	read16:		epxa_read16,
-	read32:		epxa_read32,
-	copy_from:	epxa_copy_from,
-	write8:		epxa_write8,
-	write16:	epxa_write16,
-	write32:	epxa_write32,
-	copy_to:	epxa_copy_to
+	.name		= "EPXA flash",
+	.size		= FLASH_SIZE,
+	.buswidth	= 2,
+	.read8		= epxa_read8,
+	.read16		= epxa_read16,
+	.read32		= epxa_read32,
+	.copy_from	= epxa_copy_from,
+	.write8		= epxa_write8,
+	.write16	= epxa_write16,
+	.write32	= epxa_write32,
+	.copy_to	= epxa_copy_to
 };
 
 

drivers/mtd/maps/fortunet.c

@@ -78,16 +78,16 @@ void fortunet_copy_to(struct map_info *map, unsigned long to, const void *from,
 }
 
 struct map_info default_map = {
-	size: DEF_WINDOW_SIZE,
-	buswidth: 4,
-	read8: fortunet_read8,
-	read16: fortunet_read16,
-	read32: fortunet_read32,
-	copy_from: fortunet_copy_from,
-	write8: fortunet_write8,
-	write16: fortunet_write16,
-	write32: fortunet_write32,
-	copy_to: fortunet_copy_to
+	.size		= DEF_WINDOW_SIZE,
+	.buswidth	= 4,
+	.read8		= fortunet_read8,
+	.read16		= fortunet_read16,
+	.read32		= fortunet_read32,
+	.copy_from	= fortunet_copy_from,
+	.write8		= fortunet_write8,
+	.write16	= fortunet_write16,
+	.write32	= fortunet_write32,
+	.copy_to	= fortunet_copy_to
 };
 
 static char * __init get_string_option(char *dest,int dest_size,char *sor)

drivers/mtd/maps/impa7.c

@@ -82,30 +82,30 @@ void impa7_copy_to(struct map_info *map, unsigned long to, const void *from, ssi
 
 static struct map_info impa7_map[NUM_FLASHBANKS] = {
 	{
-	name: "impA7 NOR Flash Bank #0",
-	size: WINDOW_SIZE0,
-	buswidth: BUSWIDTH,
-	read8: impa7_read8,
-	read16: impa7_read16,
-	read32: impa7_read32,
-	copy_from: impa7_copy_from,
-	write8: impa7_write8,
-	write16: impa7_write16,
-	write32: impa7_write32,
-	copy_to: impa7_copy_to
+		.name		= "impA7 NOR Flash Bank #0",
+		.size		= WINDOW_SIZE0,
+		.buswidth	= BUSWIDTH,
+		.read8		= impa7_read8,
+		.read16		= impa7_read16,
+		.read32		= impa7_read32,
+		.copy_from	= impa7_copy_from,
+		.write8		= impa7_write8,
+		.write16	= impa7_write16,
+		.write32	= impa7_write32,
+		.copy_to	= impa7_copy_to
 	},
 	{
-	name: "impA7 NOR Flash Bank #1",
-	size: WINDOW_SIZE1,
-	buswidth: BUSWIDTH,
-	read8: impa7_read8,
-	read16: impa7_read16,
-	read32: impa7_read32,
-	copy_from: impa7_copy_from,
-	write8: impa7_write8,
-	write16: impa7_write16,
-	write32: impa7_write32,
-	copy_to: impa7_copy_to
+		.name		= "impA7 NOR Flash Bank #1",
+		.size		= WINDOW_SIZE1,
+		.buswidth	= BUSWIDTH,
+		.read8		= impa7_read8,
+		.read16		= impa7_read16,
+		.read32		= impa7_read32,
+		.copy_from	= impa7_copy_from,
+		.write8		= impa7_write8,
+		.write16	= impa7_write16,
+		.write32	= impa7_write32,
+		.copy_to = impa7_copy_to
 	},
 };
 
@@ -114,12 +114,11 @@ static struct map_info impa7_map[NUM_FLASHBANKS] = {
 /*
  * MTD partitioning stuff 
  */
-static struct mtd_partition static_partitions[] =
-{
+static struct mtd_partition static_partitions[] = {
 	{
-	name: "FileSystem",
-	  size: 0x800000,
-	  offset: 0x00000000
+		.name	= "FileSystem",
+		.size	= 0x800000,
+		.offset	= 0x00000000
 	},
 };
 
@@ -143,8 +142,8 @@ int __init init_impa7(void)
 	const char *part_type = 0;
 	int i;
 	static struct { u_long addr; u_long size; } pt[NUM_FLASHBANKS] = {
-	  { WINDOW_ADDR0, WINDOW_SIZE0 },
-	  { WINDOW_ADDR1, WINDOW_SIZE1 },
+	  { .addr = WINDOW_ADDR0, .size = WINDOW_SIZE0 },
+	  { .addr = WINDOW_ADDR1, .size = WINDOW_SIZE1 },
         };
 	char mtdid[10];
 	int devicesfound = 0;

drivers/mtd/maps/integrator-flash.c

@@ -195,16 +195,16 @@ static void armflash_copy_to(struct map_info *map, unsigned long to, const void
 
 static struct map_info armflash_map =
 {
-	name:		"AFS",
-	read8:		armflash_read8,
-	read16:		armflash_read16,
-	read32:		armflash_read32,
-	copy_from:	armflash_copy_from,
-	write8:		armflash_write8,
-	write16:	armflash_write16,
-	write32:	armflash_write32,
-	copy_to:	armflash_copy_to,
-	set_vpp:	armflash_set_vpp,
+	.name		= "AFS",
+	.read8		= armflash_read8,
+	.read16		= armflash_read16,
+	.read32		= armflash_read32,
+	.copy_from	= armflash_copy_from,
+	.write8		= armflash_write8,
+	.write16	= armflash_write16,
+	.write32	= armflash_write32,
+	.copy_to	= armflash_copy_to,
+	.set_vpp	= armflash_set_vpp,
 };
 
 static struct mtd_info *mtd;

drivers/mtd/maps/iq80310.c

@@ -67,38 +67,40 @@ static void iq80310_copy_to(struct map_info *map, unsigned long to, const void *
 }
 
 static struct map_info iq80310_map = {
-	name: "IQ80310 flash",
-	size: WINDOW_SIZE,
-	buswidth: BUSWIDTH,
-	read8:		iq80310_read8,
-	read16:		iq80310_read16,
-	read32:		iq80310_read32,
-	copy_from:	iq80310_copy_from,
-	write8:		iq80310_write8,
-	write16:	iq80310_write16,
-	write32:	iq80310_write32,
-	copy_to:	iq80310_copy_to
+	.name		= "IQ80310 flash",
+	.size		= WINDOW_SIZE,
+	.buswidth	= BUSWIDTH,
+	.read8		= iq80310_read8,
+	.read16		= iq80310_read16,
+	.read32		= iq80310_read32,
+	.copy_from	= iq80310_copy_from,
+	.write8		= iq80310_write8,
+	.write16	= iq80310_write16,
+	.write32	= iq80310_write32,
+	.copy_to	= iq80310_copy_to
 };
 
 static struct mtd_partition iq80310_partitions[4] = {
 	{
-		name:		"Firmware",
-		size:		0x00080000,
-		offset:		0,
-		mask_flags:	MTD_WRITEABLE  /* force read-only */
-	},{
-		name:		"Kernel",
-		size:		0x000a0000,
-		offset:		0x00080000,
-	},{
-		name:		"Filesystem",
-		size:		0x00600000,
-		offset:		0x00120000
-	},{
-		name:		"RedBoot",
-		size:		0x000e0000,
-		offset:		0x00720000,
-		mask_flags:	MTD_WRITEABLE
+		.name		= "Firmware",
+		.size		= 0x00080000,
+		.mask_flags	= MTD_WRITEABLE  /* force read-only */
+	},
+	{
+		.name		= "Kernel",
+		.size		= 0x000a0000,
+		.offset		= 0x00080000,
+	},
+	{
+		.name		= "Filesystem",
+		.size		= 0x00600000,
+		.offset		= 0x00120000
+	},
+	{
+		.name		= "RedBoot",
+		.size		= 0x000e0000,
+		.offset		= 0x00720000,
+		.mask_flags	= MTD_WRITEABLE
 	}
 };
 

drivers/mtd/maps/l440gx.c

@@ -76,18 +76,18 @@ void l440gx_set_vpp(struct map_info *map, int vpp)
 }
 
 struct map_info l440gx_map = {
-	name: "L440GX BIOS",
-	size: WINDOW_SIZE,
-	buswidth: BUSWIDTH,
-	read8: l440gx_read8,
-	read16: l440gx_read16,
-	read32: l440gx_read32,
-	copy_from: l440gx_copy_from,
-	write8: l440gx_write8,
-	write16: l440gx_write16,
-	write32: l440gx_write32,
-	copy_to: l440gx_copy_to,
-	set_vpp: l440gx_set_vpp
+	.name		= "L440GX BIOS",
+	.size		= WINDOW_SIZE,
+	.buswidth	= BUSWIDTH,
+	.read8		= l440gx_read8,
+	.read16		= l440gx_read16,
+	.read32		= l440gx_read32,
+	.copy_from	= l440gx_copy_from,
+	.write8		= l440gx_write8,
+	.write16	= l440gx_write16,
+	.write32	= l440gx_write32,
+	.copy_to	= l440gx_copy_to,
+	.set_vpp	= l440gx_set_vpp
 };
 
 static int __init init_l440gx(void)

drivers/mtd/maps/netsc520.c

@@ -93,26 +93,25 @@ static void netsc520_copy_to(struct map_info *map, unsigned long to, const void
 /* partition_info gives details on the logical partitions that the split the 
  * single flash device into. If the size if zero we use up to the end of the
  * device. */
-static struct mtd_partition partition_info[]={
+static struct mtd_partition partition_info[] = {
 	{ 
-	    name: "NetSc520 boot kernel", 
-	    offset: 0, 
-	    size: 	0xc0000
+		.name	= "NetSc520 boot kernel", 
+		.size	= 0xc0000
 	},
 	{ 
-	    name: "NetSc520 Low BIOS", 
-	    offset: 0xc0000, 
-	    size: 	0x40000
+		.name	= "NetSc520 Low BIOS", 
+		.offset	= 0xc0000, 
+		.size	= 0x40000
 	},
 	{ 
-	    name: "NetSc520 file system", 
-	    offset: 0x100000, 
-	    size: 	0xe80000
+		.name	= "NetSc520 file system", 
+		.offset	= 0x100000, 
+		.size	= 0xe80000
 	},
 	{ 
-	    name: "NetSc520 High BIOS", 
-	    offset: 0xf80000, 
-	    size: 0x80000
+		.name	= "NetSc520 High BIOS", 
+		.offset	= 0xf80000, 
+		.size	= 0x80000
 	},
 };
 #define NUM_PARTITIONS (sizeof(partition_info)/sizeof(partition_info[0]))
@@ -127,18 +126,18 @@ static struct mtd_partition partition_info[]={
 #define WINDOW_ADDR	0x00200000
 
 static struct map_info netsc520_map = {
-	name: "netsc520 Flash Bank",
-	size: WINDOW_SIZE,
-	buswidth: 4,
-	read8: netsc520_read8,
-	read16: netsc520_read16,
-	read32: netsc520_read32,
-	copy_from: netsc520_copy_from,
-	write8: netsc520_write8,
-	write16: netsc520_write16,
-	write32: netsc520_write32,
-	copy_to: netsc520_copy_to,
-	map_priv_2: WINDOW_ADDR
+	.name		= "netsc520 Flash Bank",
+	.size		= WINDOW_SIZE,
+	.buswidth	= 4,
+	.read8		= netsc520_read8,
+	.read16		= netsc520_read16,
+	.read32		= netsc520_read32,
+	.copy_from	= netsc520_copy_from,
+	.write8		= netsc520_write8,
+	.write16	= netsc520_write16,
+	.write32	= netsc520_write32,
+	.copy_to	= netsc520_copy_to,
+	.map_priv_2	= WINDOW_ADDR
 };
 
 #define NUM_FLASH_BANKS	(sizeof(netsc520_map)/sizeof(struct map_info))

drivers/mtd/maps/nora.c

@@ -58,17 +58,17 @@ void nora_copy_to(struct map_info *map, unsigned long to, const void *from, ssiz
 }
 
 struct map_info nora_map = {
-	name: "NORA",
-	size: WINDOW_SIZE,
-	buswidth: 2,
-	read8: nora_read8,
-	read16: nora_read16,
-	read32: nora_read32,
-	copy_from: nora_copy_from,
-	write8: nora_write8,
-	write16: nora_write16,
-	write32: nora_write32,
-	copy_to: nora_copy_to
+	.name		= "NORA",
+	.size		= WINDOW_SIZE,
+	.buswidth	= 2,
+	.read8		= nora_read8,
+	.read16		= nora_read16,
+	.read32		= nora_read32,
+	.copy_from	= nora_copy_from,
+	.write8		= nora_write8,
+	.write16	= nora_write16,
+	.write32	= nora_write32,
+	.copy_to	= nora_copy_to
 };
 
 
@@ -106,64 +106,63 @@ static void nora_mtd_resume (struct mtd_info *mtd)
 
 static struct mtd_info nora_mtds[4] = {  /* boot, kernel, ramdisk, fs */
 	{
-		type: MTD_NORFLASH,
-		flags: MTD_CAP_NORFLASH,
-		size: 0x60000,
-		erasesize: 0x20000,
-		name: "NORA boot firmware",
-		module: THIS_MODULE,
-		erase: nora_mtd_erase,
-		read: nora_mtd_read,
-		write: nora_mtd_write,
-		suspend: nora_mtd_suspend,
-		resume: nora_mtd_resume,
-		sync: nora_mtd_sync,
-		priv: (void *)0
+		.type		= MTD_NORFLASH,
+		.flags		= MTD_CAP_NORFLASH,
+		.size		= 0x60000,
+		.erasesize	= 0x20000,
+		.name		= "NORA boot firmware",
+		.module		= THIS_MODULE,
+		.erase		= nora_mtd_erase,
+		.read		= nora_mtd_read,
+		.write		= nora_mtd_write,
+		.suspend	= nora_mtd_suspend,
+		.resume		= nora_mtd_resume,
+		.sync		= nora_mtd_sync,
 	},
 	{
-		type: MTD_NORFLASH,
-		flags: MTD_CAP_NORFLASH,
-		size: 0x0a0000,
-		erasesize: 0x20000,
-		name: "NORA kernel",
-		module: THIS_MODULE,
-		erase: nora_mtd_erase,
-		read: nora_mtd_read,
-		write: nora_mtd_write,
-		suspend: nora_mtd_suspend,
-		resume: nora_mtd_resume,
-		sync: nora_mtd_sync,
-		priv: (void *)0x60000
+		.type		= MTD_NORFLASH,
+		.flags		= MTD_CAP_NORFLASH,
+		.size		= 0x0a0000,
+		.erasesize	= 0x20000,
+		.name		= "NORA kernel",
+		.module		= THIS_MODULE,
+		.erase		= nora_mtd_erase,
+		.read		= nora_mtd_read,
+		.write		= nora_mtd_write,
+		.suspend	= nora_mtd_suspend,
+		.resume		= nora_mtd_resume,
+		.sync		= nora_mtd_sync,
+		.priv		= (void *)0x60000
 	},
 	{
-		type: MTD_NORFLASH,
-		flags: MTD_CAP_NORFLASH,
-		size: 0x900000,
-		erasesize: 0x20000,
-		name: "NORA root filesystem",
-		module: THIS_MODULE,
-		erase: nora_mtd_erase,
-		read: nora_mtd_read,
-		write: nora_mtd_write,
-		suspend: nora_mtd_suspend,
-		resume: nora_mtd_resume,
-		sync: nora_mtd_sync,
-		priv: (void *)0x100000
+		.type		= MTD_NORFLASH,
+		.flags		= MTD_CAP_NORFLASH,
+		.size		= 0x900000,
+		.erasesize	= 0x20000,
+		.name		= "NORA root filesystem",
+		.module		= THIS_MODULE,
+		.erase		= nora_mtd_erase,
+		.read		= nora_mtd_read,
+		.write		= nora_mtd_write,
+		.suspend	= nora_mtd_suspend,
+		.resume		= nora_mtd_resume,
+		.sync		= nora_mtd_sync,
+		.priv		= (void *)0x100000
 	},
 	{
-		type: MTD_NORFLASH,
-		flags: MTD_CAP_NORFLASH,
-		size: 0x1600000,
-		erasesize: 0x20000,
-		name: "NORA second filesystem",
-		module: THIS_MODULE,
-		erase: nora_mtd_erase,
-		read: nora_mtd_read,
-		write: nora_mtd_write,
-		suspend: nora_mtd_suspend,
-		resume: nora_mtd_resume,
-		sync: nora_mtd_sync,
-		priv: (void *)0xa00000
+		.type		= MTD_NORFLASH,
+		.flags		= MTD_CAP_NORFLASH,
+		.size		= 0x1600000,
+		.erasesize	= 0x20000,
+		.name		= "NORA second filesystem",
+		.module		= THIS_MODULE,
+		.erase		= nora_mtd_erase,
+		.read		= nora_mtd_read,
+		.write		= nora_mtd_write,
+		.suspend	= nora_mtd_suspend,
+		.resume		= nora_mtd_resume,
+		.sync		= nora_mtd_sync,
+		.priv		= (void *)0xa00000
 	}
 };
 

drivers/mtd/maps/ocelot.c

@@ -70,22 +70,22 @@ void ocelot_copy_to(struct map_info *map, unsigned long to, const void *from, ss
 static struct mtd_partition *parsed_parts;
 
 struct map_info ocelot_flash_map = {
-	name: "Ocelot boot flash",
-	size: FLASH_WINDOW_SIZE,
-	buswidth: FLASH_BUSWIDTH,
-	read8: ocelot_read8,
-	copy_from: ocelot_copy_from_cache,
-	write8: ocelot_write8,
+	.name		= "Ocelot boot flash",
+	.size		= FLASH_WINDOW_SIZE,
+	.buswidth	= FLASH_BUSWIDTH,
+	.read8		= ocelot_read8,
+	.copy_from	= ocelot_copy_from_cache,
+	.write8		= ocelot_write8,
 };
 
 struct map_info ocelot_nvram_map = {
-	name: "Ocelot NVRAM",
-	size: NVRAM_WINDOW_SIZE,
-	buswidth: NVRAM_BUSWIDTH,
-	read8: ocelot_read8,
-	copy_from: ocelot_copy_from,
-	write8: ocelot_write8,
-	copy_to: ocelot_copy_to
+	.name		= "Ocelot NVRAM",
+	.size		= NVRAM_WINDOW_SIZE,
+	.buswidth	= NVRAM_BUSWIDTH,
+	.read8		= ocelot_read8,
+	.copy_from	= ocelot_copy_from,
+	.write8		= ocelot_write8,
+	.copy_to	= ocelot_copy_to
 };
 
 static int __init init_ocelot_maps(void)

drivers/mtd/maps/octagon-5066.c

@@ -151,32 +151,32 @@ static void oct5066_copy_to(struct map_info *map, unsigned long to, const void *
 
 static struct map_info oct5066_map[2] = {
 	{
-		name: "Octagon 5066 Socket",
-		size: 512 * 1024,
-		buswidth: 1,
-		read8: oct5066_read8,
-		read16: oct5066_read16,
-		read32: oct5066_read32,
-		copy_from: oct5066_copy_from,
-		write8: oct5066_write8,
-		write16: oct5066_write16,
-		write32: oct5066_write32,
-		copy_to: oct5066_copy_to,
-		map_priv_1: 1<<6
+		.name		= "Octagon 5066 Socket",
+		.size		= 512 * 1024,
+		.buswidth	= 1,
+		.read8		= oct5066_read8,
+		.read16		= oct5066_read16,
+		.read32		= oct5066_read32,
+		.copy_from	= oct5066_copy_from,
+		.write8		= oct5066_write8,
+		.write16	= oct5066_write16,
+		.write32	= oct5066_write32,
+		.copy_to	= oct5066_copy_to,
+		.map_priv_1	= 1<<6
 	},
 	{
-		name: "Octagon 5066 Internal Flash",
-		size: 2 * 1024 * 1024,
-		buswidth: 1,
-		read8: oct5066_read8,
-		read16: oct5066_read16,
-		read32: oct5066_read32,
-		copy_from: oct5066_copy_from,
-		write8: oct5066_write8,
-		write16: oct5066_write16,
-		write32: oct5066_write32,
-		copy_to: oct5066_copy_to,
-		map_priv_1: 2<<6
+		.name		= "Octagon 5066 Internal Flash",
+		.size		= 2 * 1024 * 1024,
+		.buswidth	= 1,
+		.read8		= oct5066_read8,
+		.read16		= oct5066_read16,
+		.read32		= oct5066_read32,
+		.copy_from	= oct5066_copy_from,
+		.write8		= oct5066_write8,
+		.write16	= oct5066_write16,
+		.write32	= oct5066_write32,
+		.copy_to	= oct5066_copy_to,
+		.map_priv_1	= 2<<6
 	}
 };
 

drivers/mtd/maps/pci.c

@@ -98,10 +98,10 @@ intel_iq80310_translate(struct map_pci_info *map, unsigned long ofs)
 }
 
 static struct mtd_pci_info intel_iq80310_info = {
-	init:		intel_iq80310_init,
-	exit:		intel_iq80310_exit,
-	translate:	intel_iq80310_translate,
-	map_name:	"cfi_probe",
+	.init		= intel_iq80310_init,
+	.exit		= intel_iq80310_exit,
+	.translate	= intel_iq80310_translate,
+	.map_name	= "cfi_probe",
 };
 
 /*
@@ -181,10 +181,10 @@ intel_dc21285_translate(struct map_pci_info *map, unsigned long ofs)
 }
 
 static struct mtd_pci_info intel_dc21285_info = {
-	init:		intel_dc21285_init,
-	exit:		intel_dc21285_exit,
-	translate:	intel_dc21285_translate,
-	map_name:	"jedec_probe",
+	.init		= intel_dc21285_init,
+	.exit		= intel_dc21285_exit,
+	.translate	= intel_dc21285_translate,
+	.map_name	= "jedec_probe",
 };
 
 /*
@@ -193,24 +193,22 @@ static struct mtd_pci_info intel_dc21285_info = {
 
 static struct pci_device_id mtd_pci_ids[] __devinitdata = {
 	{
-		vendor:		PCI_VENDOR_ID_INTEL,
-		device:		0x530d,
-		subvendor:	PCI_ANY_ID,
-		subdevice:	PCI_ANY_ID,
-		class:		PCI_CLASS_MEMORY_OTHER << 8,
-		class_mask:	0xffff00,
-		driver_data:	(unsigned long)&intel_iq80310_info,
+		.vendor		= PCI_VENDOR_ID_INTEL,
+		.device		= 0x530d,
+		.subvendor	= PCI_ANY_ID,
+		.subdevice	= PCI_ANY_ID,
+		.class		= PCI_CLASS_MEMORY_OTHER << 8,
+		.class_mask	= 0xffff00,
+		.driver_data	= (unsigned long)&intel_iq80310_info,
 	},
 	{
-		vendor:		PCI_VENDOR_ID_DEC,
-		device:		PCI_DEVICE_ID_DEC_21285,
-		subvendor:	0,	/* DC21285 defaults to 0 on reset */
-		subdevice:	0,	/* DC21285 defaults to 0 on reset */
-		class:		0,
-		class_mask:	0,
-		driver_data:	(unsigned long)&intel_dc21285_info,
+		.vendor		= PCI_VENDOR_ID_DEC,
+		.device		= PCI_DEVICE_ID_DEC_21285,
+		.subvendor	= 0,	/* DC21285 defaults to 0 on reset */
+		.subdevice	= 0,	/* DC21285 defaults to 0 on reset */
+		.driver_data	= (unsigned long)&intel_dc21285_info,
 	},
-	{ 0, }
+	{ .vendor = 0, }
 };
 
 /*
@@ -275,14 +273,14 @@ static void mtd_pci_copyto(struct map_info *_map, unsigned long to, const void *
 }
 
 static struct map_info mtd_pci_map = {
-	read8:		mtd_pci_read8,
-	read16:		mtd_pci_read16,
-	read32:		mtd_pci_read32,
-	copy_from:	mtd_pci_copyfrom,
-	write8:		mtd_pci_write8,
-	write16:	mtd_pci_write16,
-	write32:	mtd_pci_write32,
-	copy_to:	mtd_pci_copyto,
+	.read8		= mtd_pci_read8,
+	.read16		= mtd_pci_read16,
+	.read32		= mtd_pci_read32,
+	.copy_from	= mtd_pci_copyfrom,
+	.write8		= mtd_pci_write8,
+	.write16	= mtd_pci_write16,
+	.write32	= mtd_pci_write32,
+	.copy_to	= mtd_pci_copyto,
 };
 
 static int __devinit
@@ -359,10 +357,10 @@ mtd_pci_remove(struct pci_dev *dev)
 }
 
 static struct pci_driver mtd_pci_driver = {
-	name:		"MTD PCI",
-	probe:		mtd_pci_probe,
-	remove:		mtd_pci_remove,
-	id_table:	mtd_pci_ids,
+	.name		= "MTD PCI",
+	.probe		= mtd_pci_probe,
+	.remove		= mtd_pci_remove,
+	.id_table	= mtd_pci_ids,
 };
 
 static int __init mtd_pci_maps_init(void)

drivers/mtd/maps/physmap.c

@@ -63,17 +63,17 @@ void physmap_copy_to(struct map_info *map, unsigned long to, const void *from, s
 }
 
 struct map_info physmap_map = {
-	name: "Physically mapped flash",
-	size: WINDOW_SIZE,
-	buswidth: BUSWIDTH,
-	read8: physmap_read8,
-	read16: physmap_read16,
-	read32: physmap_read32,
-	copy_from: physmap_copy_from,
-	write8: physmap_write8,
-	write16: physmap_write16,
-	write32: physmap_write32,
-	copy_to: physmap_copy_to
+	.name		= "Physically mapped flash",
+	.size		= WINDOW_SIZE,
+	.buswidth	= BUSWIDTH,
+	.read8		= physmap_read8,
+	.read16		= physmap_read16,
+	.read32		= physmap_read32,
+	.copy_from	= physmap_copy_from,
+	.write8		= physmap_write8,
+	.write16	= physmap_write16,
+	.write32	= physmap_write32,
+	.copy_to	= physmap_copy_to
 };
 
 int __init init_physmap(void)

drivers/mtd/maps/pnc2000.c

@@ -65,17 +65,17 @@ void pnc_copy_to(struct map_info *map, unsigned long to, const void *from, ssize
 }
 
 struct map_info pnc_map = {
-	name: "PNC-2000",
-	size: WINDOW_SIZE,
-	buswidth: 4,
-	read8: pnc_read8,
-	read16: pnc_read16,
-	read32: pnc_read32,
-	copy_from: pnc_copy_from,
-	write8: pnc_write8,
-	write16: pnc_write16,
-	write32: pnc_write32,
-	copy_to: pnc_copy_to
+	.name		= "PNC-2000",
+	.size		= WINDOW_SIZE,
+	.buswidth	= 4,
+	.read8		= pnc_read8,
+	.read16		= pnc_read16,
+	.read32		= pnc_read32,
+	.copy_from	= pnc_copy_from,
+	.write8		= pnc_write8,
+	.write16	= pnc_write16,
+	.write32	= pnc_write32,
+	.copy_to	= pnc_copy_to
 };
 
 
@@ -84,19 +84,18 @@ struct map_info pnc_map = {
  */
 static struct mtd_partition pnc_partitions[3] = {
 	{
-		name: "PNC-2000 boot firmware",
-		size: 0x20000,
-		offset: 0
+		.name	= "PNC-2000 boot firmware",
+		.size	= 0x20000,
 	},
 	{
-		name: "PNC-2000 kernel",
-		size: 0x1a0000,
-		offset: 0x20000
+		.name	= "PNC-2000 kernel",
+		.size	= 0x1a0000,
+		.offset	= 0x20000
 	},
 	{
-		name: "PNC-2000 filesystem",
-		size: 0x240000,
-		offset: 0x1c0000
+		.name	= "PNC-2000 filesystem",
+		.size	= 0x240000,
+		.offset	= 0x1c0000
 	}
 };
 

drivers/mtd/maps/rpxlite.c

@@ -61,17 +61,17 @@ void rpxlite_copy_to(struct map_info *map, unsigned long to, const void *from, s
 }
 
 struct map_info rpxlite_map = {
-	name: "RPX",
-	size: WINDOW_SIZE,
-	buswidth: 4,
-	read8: rpxlite_read8,
-	read16: rpxlite_read16,
-	read32: rpxlite_read32,
-	copy_from: rpxlite_copy_from,
-	write8: rpxlite_write8,
-	write16: rpxlite_write16,
-	write32: rpxlite_write32,
-	copy_to: rpxlite_copy_to
+	.name		= "RPX",
+	.size		= WINDOW_SIZE,
+	.buswidth	= 4,
+	.read8		= rpxlite_read8,
+	.read16		= rpxlite_read16,
+	.read32		= rpxlite_read32,
+	.copy_from	= rpxlite_copy_from,
+	.write8		= rpxlite_write8,
+	.write16	= rpxlite_write16,
+	.write32	= rpxlite_write32,
+	.copy_to	= rpxlite_copy_to
 };
 
 int __init init_rpxlite(void)

drivers/mtd/maps/sbc_gxx.c

@@ -90,15 +90,20 @@ static spinlock_t sbc_gxx_spin = SPIN_LOCK_UNLOCKED;
 /* partition_info gives details on the logical partitions that the split the 
  * single flash device into. If the size if zero we use up to the end of the
  * device. */
-static struct mtd_partition partition_info[]={
-    { name: "SBC-GXx flash boot partition", 
-      offset: 0, 
-      size:   BOOT_PARTITION_SIZE_KiB*1024 },
-    { name: "SBC-GXx flash data partition", 
-      offset: BOOT_PARTITION_SIZE_KiB*1024, 
-      size: (DATA_PARTITION_SIZE_KiB)*1024 },
-    { name: "SBC-GXx flash application partition", 
-      offset: (BOOT_PARTITION_SIZE_KiB+DATA_PARTITION_SIZE_KiB)*1024 }
+static struct mtd_partition partition_info[] = {
+	{
+		.name	= "SBC-GXx flash boot partition", 
+		.size	= BOOT_PARTITION_SIZE_KiB*1024
+	},
+	{
+		.name	= "SBC-GXx flash data partition", 
+		.offset	= BOOT_PARTITION_SIZE_KiB*1024, 
+		.size	= (DATA_PARTITION_SIZE_KiB)*1024
+	},
+	{
+		.name	= "SBC-GXx flash application partition", 
+		.offset	= (BOOT_PARTITION_SIZE_KiB+DATA_PARTITION_SIZE_KiB)*1024
+	}
 };
 
 #define NUM_PARTITIONS 3
@@ -203,19 +208,20 @@ static void sbc_gxx_copy_to(struct map_info *map, unsigned long to, const void *
 }
 
 static struct map_info sbc_gxx_map = {
-	name: "SBC-GXx flash",
-	size: MAX_SIZE_KiB*1024, /* this must be set to a maximum possible amount
-			 of flash so the cfi probe routines find all
-			 the chips */
-	buswidth: 1,
-	read8: sbc_gxx_read8,
-	read16: sbc_gxx_read16,
-	read32: sbc_gxx_read32,
-	copy_from: sbc_gxx_copy_from,
-	write8: sbc_gxx_write8,
-	write16: sbc_gxx_write16,
-	write32: sbc_gxx_write32,
-	copy_to: sbc_gxx_copy_to
+	.name		= "SBC-GXx flash",
+	.size		= MAX_SIZE_KiB*1024, /* this must be set to a maximum
+						possible amount of flash so
+						the cfi probe routines find
+						all the chips */
+	.buswidth	= 1,
+	.read8		= sbc_gxx_read8,
+	.read16		= sbc_gxx_read16,
+	.read32		= sbc_gxx_read32,
+	.copy_from	= sbc_gxx_copy_from,
+	.write8		= sbc_gxx_write8,
+	.write16	= sbc_gxx_write16,
+	.write32	= sbc_gxx_write32,
+	.copy_to	= sbc_gxx_copy_to
 };
 
 /* MTD device for all of the flash. */

drivers/mtd/maps/sc520cdp.c

@@ -125,46 +125,46 @@ static void sc520cdp_copy_to(struct map_info *map, unsigned long to, const void
 
 static struct map_info sc520cdp_map[] = {
 	{
-		name: "SC520CDP Flash Bank #0",
-		size: WINDOW_SIZE_0,
-		buswidth: 4,
-		read8: sc520cdp_read8,
-		read16: sc520cdp_read16,
-		read32: sc520cdp_read32,
-		copy_from: sc520cdp_copy_from,
-		write8: sc520cdp_write8,
-		write16: sc520cdp_write16,
-		write32: sc520cdp_write32,
-		copy_to: sc520cdp_copy_to,
-		map_priv_2: WINDOW_ADDR_0
+		.name		= "SC520CDP Flash Bank #0",
+		.size		= WINDOW_SIZE_0,
+		.buswidth	= 4,
+		.read8		= sc520cdp_read8,
+		.read16		= sc520cdp_read16,
+		.read32		= sc520cdp_read32,
+		.copy_from	= sc520cdp_copy_from,
+		.write8		= sc520cdp_write8,
+		.write16	= sc520cdp_write16,
+		.write32	= sc520cdp_write32,
+		.copy_to	= sc520cdp_copy_to,
+		.map_priv_2	= WINDOW_ADDR_0
 	},
 	{
-		name: "SC520CDP Flash Bank #1",
-		size: WINDOW_SIZE_1,
-		buswidth: 4,
-		read8: sc520cdp_read8,
-		read16: sc520cdp_read16,
-		read32: sc520cdp_read32,
-		copy_from: sc520cdp_copy_from,
-		write8: sc520cdp_write8,
-		write16: sc520cdp_write16,
-		write32: sc520cdp_write32,
-		copy_to: sc520cdp_copy_to,
-		map_priv_2: WINDOW_ADDR_1
+		.name		= "SC520CDP Flash Bank #1",
+		.size		= WINDOW_SIZE_1,
+		.buswidth	= 4,
+		.read8		= sc520cdp_read8,
+		.read16		= sc520cdp_read16,
+		.read32		= sc520cdp_read32,
+		.copy_from	= sc520cdp_copy_from,
+		.write8		= sc520cdp_write8,
+		.write16	= sc520cdp_write16,
+		.write32	= sc520cdp_write32,
+		.copy_to	= sc520cdp_copy_to,
+		.map_priv_2	= WINDOW_ADDR_1
 	},
 	{
-		name: "SC520CDP DIL Flash",
-		size: WINDOW_SIZE_2,
-		buswidth: 1,
-		read8: sc520cdp_read8,
-		read16: sc520cdp_read16,
-		read32: sc520cdp_read32,
-		copy_from: sc520cdp_copy_from,
-		write8: sc520cdp_write8,
-		write16: sc520cdp_write16,
-		write32: sc520cdp_write32,
-		copy_to: sc520cdp_copy_to,
-		map_priv_2: WINDOW_ADDR_2
+		.name		= "SC520CDP DIL Flash",
+		.size		= WINDOW_SIZE_2,
+		.buswidth	= 1,
+		.read8		= sc520cdp_read8,
+		.read16		= sc520cdp_read16,
+		.read32		= sc520cdp_read32,
+		.copy_from	= sc520cdp_copy_from,
+		.write8		= sc520cdp_write8,
+		.write16	= sc520cdp_write16,
+		.write32	= sc520cdp_write32,
+		.copy_to	= sc520cdp_copy_to,
+		.map_priv_2	= WINDOW_ADDR_2
 	},
 };
 

drivers/mtd/maps/solutionengine.c

@@ -42,19 +42,19 @@ static struct mtd_info *eprom_mtd;
 static struct mtd_partition *parsed_parts;
 
 struct map_info soleng_eprom_map = {
-	name: "Solution Engine EPROM",
-	size: 0x400000,
-	buswidth: 4,
-	copy_from: soleng_copy_from,
+	.name		= "Solution Engine EPROM",
+	.size		= 0x400000,
+	.buswidth	= 4,
+	.copy_from	= soleng_copy_from,
 };
 
 struct map_info soleng_flash_map = {
-	name: "Solution Engine FLASH",
-	size: 0x400000,
-	buswidth: 4,
-	read32: soleng_read32,
-	copy_from: soleng_copy_from,
-	write32: soleng_write32,
+	.name		= "Solution Engine FLASH",
+	.size		= 0x400000,
+	.buswidth	= 4,
+	.read32		= soleng_read32,
+	.copy_from	= soleng_copy_from,
+	.write32	= soleng_write32,
 };
 
 static int __init init_soleng_maps(void)

drivers/mtd/maps/sun_uflash.c

@@ -91,17 +91,17 @@ void uflash_copy_to(struct map_info *map, unsigned long to, const void *from,
 }
 
 struct map_info uflash_map_templ = {
-		name:		"SUNW,???-????",
-		size:		UFLASH_WINDOW_SIZE,
-		buswidth:	UFLASH_BUSWIDTH,
-		read8:		uflash_read8,
-		read16:		uflash_read16,
-		read32:		uflash_read32,
-		copy_from:	uflash_copy_from,
-		write8:		uflash_write8,
-		write16:	uflash_write16,
-		write32:	uflash_write32,
-		copy_to:	uflash_copy_to
+	.name		= "SUNW,???-????",
+	.size		= UFLASH_WINDOW_SIZE,
+	.buswidth	= UFLASH_BUSWIDTH,
+	.read8		= uflash_read8,
+	.read16		= uflash_read16,
+	.read32		= uflash_read32,
+	.copy_from	= uflash_copy_from,
+	.write8		= uflash_write8,
+	.write16	= uflash_write16,
+	.write32	= uflash_write32,
+	.copy_to	= uflash_copy_to
 };
 
 int uflash_devinit(struct linux_ebus_device* edev)

drivers/mtd/maps/tqm8xxl.c

@@ -92,17 +92,16 @@ void tqm8xxl_copy_to(struct map_info *map, unsigned long to, const void *from, s
 }
 
 struct map_info tqm8xxl_map = {
-	name: "TQM8xxL",
-	//size: WINDOW_SIZE,
-	buswidth: 4,
-	read8: tqm8xxl_read8,
-	read16: tqm8xxl_read16,
-	read32: tqm8xxl_read32,
-	copy_from: tqm8xxl_copy_from,
-	write8: tqm8xxl_write8,
-	write16: tqm8xxl_write16,
-	write32: tqm8xxl_write32,
-	copy_to: tqm8xxl_copy_to
+	.name		= "TQM8xxL",
+	.buswidth	= 4,
+	.read8		= tqm8xxl_read8,
+	.read16		= tqm8xxl_read16,
+	.read32		= tqm8xxl_read32,
+	.copy_from	= tqm8xxl_copy_from,
+	.write8		= tqm8xxl_write8,
+	.write16	= tqm8xxl_write16,
+	.write32	= tqm8xxl_write32,
+	.copy_to	= tqm8xxl_copy_to
 };
 
 /*
@@ -125,40 +124,39 @@ static unsigned long tqm8xxl_max_flash_size = 0x00800000;
  */
 static struct mtd_partition tqm8xxl_partitions[] = {
 	{
-	  name: "ppcboot",
-	  offset: 0x00000000,
-	  size: 0x00020000,           /* 128KB           */
-	  mask_flags: MTD_WRITEABLE,  /* force read-only */
+		.name		= "ppcboot",
+		.offset		= 0x00000000,
+		.size 		= 0x00020000,	/* 128KB */
+		.mask_flags	= MTD_WRITEABLE, /* force read-only */
 	},
 	{
-	  name: "kernel",             /* default kernel image */
-	  offset: 0x00020000,
-	  size: 0x000e0000,
-	  mask_flags: MTD_WRITEABLE,  /* force read-only */
+		.name		= "kernel",	/* default kernel image */
+		.offset		= 0x00020000,
+		.size		= 0x000e0000,
+		.mask_flags	= MTD_WRITEABLE, /* force read-only */
 	},
 	{
-	  name: "user",
-	  offset: 0x00100000,
-	  size: 0x00100000,
+		.name		= "user",
+		.offset		= 0x00100000,
+		.size		= 0x00100000,
 	},
 	{
-	  name: "initrd",
-	  offset: 0x00200000,
-	  size: 0x00200000,
+		.name		= "initrd",
+		.offset		= 0x00200000,
+		.size		= 0x00200000,
 	}
 };
 /* partition definition for second flahs bank */
 static struct mtd_partition tqm8xxl_fs_partitions[] = {
 	{
-	  name: "cramfs",
-	  offset: 0x00000000,
-	  size: 0x00200000,
+		.name	= "cramfs",
+		.offset	= 0x00000000,
+		.size	= 0x00200000,
 	},
 	{
-	  name: "jffs",
-	  offset: 0x00200000,
-	  size: 0x00200000,
-	  //size: MTDPART_SIZ_FULL,
+		.name	= "jffs",
+		.offset	= 0x00200000,
+		.size	= 0x00200000,
 	}
 };
 #endif

drivers/mtd/maps/uclinux.c

@@ -66,15 +66,15 @@ void uclinux_copy_to(struct map_info *map, unsigned long to, const void *from, s
 /****************************************************************************/
 
 struct map_info uclinux_ram_map = {
-	name:		"RAM",
-	read8:		uclinux_read8,
-	read16:		uclinux_read16,
-	read32:		uclinux_read32,
-	copy_from:	uclinux_copy_from,
-	write8:		uclinux_write8,
-	write16:	uclinux_write16,
-	write32:	uclinux_write32,
-	copy_to:	uclinux_copy_to,
+	.name		= "RAM",
+	.read8		= uclinux_read8,
+	.read16		= uclinux_read16,
+	.read32		= uclinux_read32,
+	.copy_from	= uclinux_copy_from,
+	.write8		= uclinux_write8,
+	.write16	= uclinux_write16,
+	.write32	= uclinux_write32,
+	.copy_to	= uclinux_copy_to,
 };
 
 struct mtd_info *uclinux_ram_mtdinfo;
@@ -82,7 +82,7 @@ struct mtd_info *uclinux_ram_mtdinfo;
 /****************************************************************************/
 
 struct mtd_partition uclinux_romfs[] = {
-	{ name: "ROMfs", offset: 0 }
+	{ .name = "ROMfs", .offset = 0 }
 };
 
 #define	NUM_PARTITIONS	(sizeof(uclinux_romfs) / sizeof(uclinux_romfs[0]))

drivers/mtd/maps/vmax301.c

@@ -142,34 +142,33 @@ static void vmax301_copy_to(struct map_info *map, unsigned long to, const void *
 
 static struct map_info vmax_map[2] = {
 	{
-		name: "VMAX301 Internal Flash",
-		size: 3*2*1024*1024,
-		buswidth: 1,
-		read8: vmax301_read8,
-		read16: vmax301_read16,
-		read32: vmax301_read32,
-		copy_from: vmax301_copy_from,
-		write8: vmax301_write8,
-		write16: vmax301_write16,
-		write32: vmax301_write32,
-		copy_to: vmax301_copy_to,
-		map_priv_1: WINDOW_START + WINDOW_LENGTH,
-		map_priv_2: 0xFFFFFFFF
+		.name		= "VMAX301 Internal Flash",
+		.size		= 3*2*1024*1024,
+		.buswidth	= 1,
+		.read8		= vmax301_read8,
+		.read16		= vmax301_read16,
+		.read32		= vmax301_read32,
+		.copy_from	= vmax301_copy_from,
+		.write8		= vmax301_write8,
+		.write16	= vmax301_write16,
+		.write32	= vmax301_write32,
+		.copy_to	= vmax301_copy_to,
+		.map_priv_1	= WINDOW_START + WINDOW_LENGTH,
+		.map_priv_2	= 0xFFFFFFFF
 	},
 	{
-		name: "VMAX301 Socket",
-		size: 0,
-		buswidth: 1,
-		read8: vmax301_read8,
-		read16: vmax301_read16,
-		read32: vmax301_read32,
-		copy_from: vmax301_copy_from,
-		write8: vmax301_write8,
-		write16: vmax301_write16,
-		write32: vmax301_write32,
-		copy_to: vmax301_copy_to,
-		map_priv_1: WINDOW_START + (3*WINDOW_LENGTH),
-		map_priv_2: 0xFFFFFFFF
+		.name		= "VMAX301 Socket",
+		.buswidth	= 1,
+		.read8		= vmax301_read8,
+		.read16		= vmax301_read16,
+		.read32		= vmax301_read32,
+		.copy_from	= vmax301_copy_from,
+		.write8		= vmax301_write8,
+		.write16	= vmax301_write16,
+		.write32	= vmax301_write32,
+		.copy_to	= vmax301_copy_to,
+		.map_priv_1	= WINDOW_START + (3*WINDOW_LENGTH),
+		.map_priv_2	= 0xFFFFFFFF
 	}
 };
 

drivers/mtd/mtdchar.c

@@ -19,8 +19,8 @@ static void mtd_notify_add(struct mtd_info* mtd);
 static void mtd_notify_remove(struct mtd_info* mtd);
 
 static struct mtd_notifier notifier = {
-	add:	mtd_notify_add,
-	remove:	mtd_notify_remove,
+	.add	= mtd_notify_add,
+	.remove	= mtd_notify_remove,
 };
 
 #endif
@@ -445,13 +445,13 @@ static int mtd_ioctl(struct inode *inode, struct file *file,
 } /* memory_ioctl */
 
 static struct file_operations mtd_fops = {
-	owner:		THIS_MODULE,
-	llseek:		mtd_lseek,     	/* lseek */
-	read:		mtd_read,	/* read */
-	write: 		mtd_write, 	/* write */
-	ioctl:		mtd_ioctl,	/* ioctl */
-	open:		mtd_open,	/* open */
-	release:	mtd_close,	/* release */
+	.owner		= THIS_MODULE,
+	.llseek		= mtd_lseek,	/* lseek */
+	.read		= mtd_read,	/* read */
+	.write 		= mtd_write, 	/* write */
+	.ioctl		= mtd_ioctl,	/* ioctl */
+	.open		= mtd_open,	/* open */
+	.release	= mtd_close,	/* release */
 };
 
 

drivers/mtd/nand/spia.c

@@ -66,12 +66,15 @@ __setup("spia_peddr=",spia_peddr);
  * Define partitions for flash device
  */
 const static struct mtd_partition partition_info[] = {
-	{ name: "SPIA flash partition 1",
-	  offset: 0,
-	  size: 2*1024*1024 },
-	{ name: "SPIA flash partition 2",
-	  offset: 2*1024*1024,
-	  size: 6*1024*1024 }
+	{
+		.name	= "SPIA flash partition 1",
+		.size	= 2*1024*1024
+	},
+	{
+		.name	= "SPIA flash partition 2",
+		.offset	= 2*1024*1024,
+		.size	= 6*1024*1024
+	}
 };
 #define NUM_PARTITIONS 2
 

drivers/mtd/nftlcore.c

@@ -914,8 +914,8 @@ static struct block_device_operations nftl_fops =
  ****************************************************************************/
 
 static struct mtd_notifier nftl_notifier = {
-	add:	NFTL_notify_add,
-	remove:	NFTL_notify_remove
+	.add	= NFTL_notify_add,
+	.remove	= NFTL_notify_remove
 };
 
 extern char nftlmountrev[];

drivers/net/via-rhine.c

@@ -368,6 +368,8 @@ enum chip_capability_flags {
 #else
 #define RHINE_IOTYPE (PCI_USES_IO  | PCI_USES_MASTER | PCI_ADDR0)
 #endif
+/* Beware of PCI posted writes */
+#define IOSYNC	do { readb(dev->base_addr + StationAddr); } while (0)
 
 /* directly indexed by enum via_rhine_chips, above */
 static struct via_rhine_chip_info via_rhine_chip_info[] __devinitdata =
@@ -403,7 +405,8 @@ enum register_offsets {
 	MIICmd=0x70, MIIRegAddr=0x71, MIIData=0x72, MACRegEEcsr=0x74,
 	ConfigA=0x78, ConfigB=0x79, ConfigC=0x7A, ConfigD=0x7B,
 	RxMissed=0x7C, RxCRCErrs=0x7E, MiscCmd=0x81,
-	StickyHW=0x83, WOLcrClr=0xA4, WOLcgClr=0xA7, PwrcsrClr=0xAC,
+	StickyHW=0x83, IntrStatus2=0x84, WOLcrClr=0xA4, WOLcgClr=0xA7,
+	PwrcsrClr=0xAC,
 };
 
 /* Bits in ConfigD */
@@ -430,6 +433,8 @@ enum intr_status_bits {
 	IntrTxAborted=0x2000, IntrLinkChange=0x4000,
 	IntrRxWakeUp=0x8000,
 	IntrNormalSummary=0x0003, IntrAbnormalSummary=0xC260,
+	IntrTxDescRace=0x080000,	/* mapped from IntrStatus2 */
+	IntrTxErrSummary=0x082210,
 };
 
 /* The Rx and Tx buffer descriptors. */
@@ -527,14 +532,28 @@ static struct net_device_stats *via_rhine_get_stats(struct net_device *dev);
 static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
 static int  via_rhine_close(struct net_device *dev);
 
+static inline u32 get_intr_status(struct net_device *dev)
+{
+	long ioaddr = dev->base_addr;
+	struct netdev_private *np = dev->priv;
+	u32 intr_status;
+
+	intr_status = readw(ioaddr + IntrStatus);
+	/* On Rhine-II, Bit 3 indicates Tx descriptor write-back race. */
+	if (np->chip_id == VT6102)
+		intr_status |= readb(ioaddr + IntrStatus2) << 16;
+	return intr_status;
+}
+
 static void wait_for_reset(struct net_device *dev, int chip_id, char *name)
 {
 	long ioaddr = dev->base_addr;
+	int boguscnt = 20;
 
-	udelay(5);
+	IOSYNC;
 
 	if (readw(ioaddr + ChipCmd) & CmdReset) {
-		printk(KERN_INFO "%s: Reset did not complete in 5 us. "
+		printk(KERN_INFO "%s: Reset not complete yet. "
 			"Trying harder.\n", name);
 
 		/* Rhine-II needs to be forced sometimes */
@@ -543,12 +562,14 @@ static void wait_for_reset(struct net_device *dev, int chip_id, char *name)
 
 		/* VT86C100A may need long delay after reset (dlink) */
 		/* Seen on Rhine-II as well (rl) */
-		udelay(100);
+		while ((readw(ioaddr + ChipCmd) & CmdReset) && --boguscnt);
+			udelay(5);
+
 	}
 
 	if (debug > 1)
 		printk(KERN_INFO "%s: Reset %s.\n", name,
-			(readw(ioaddr + ChipCmd) & CmdReset) ? "failed" : "succeeded");
+			boguscnt ? "succeeded" : "failed");
 }
 
 #ifdef USE_MEM
@@ -1226,6 +1247,7 @@ static int via_rhine_start_tx(struct sk_buff *skb, struct net_device *dev)
 {
 	struct netdev_private *np = dev->priv;
 	unsigned entry;
+	u32 intr_status;
 
 	/* Caution: the write order is important here, set the field
 	   with the "ownership" bits last. */
@@ -1275,8 +1297,15 @@ static int via_rhine_start_tx(struct sk_buff *skb, struct net_device *dev)
 
 	/* Non-x86 Todo: explicitly flush cache lines here. */
 
-	/* Wake the potentially-idle transmit channel. */
+	/*
+	 * Wake the potentially-idle transmit channel unless errors are
+	 * pending (the ISR must sort them out first).
+	 */
+	intr_status = get_intr_status(dev);
+	if ((intr_status & IntrTxErrSummary) == 0) {
 		writew(CmdTxDemand | np->chip_cmd, dev->base_addr + ChipCmd);
+	}
+	IOSYNC;
 
 	if (np->cur_tx == np->dirty_tx + TX_QUEUE_LEN)
 		netif_stop_queue(dev);
@@ -1303,38 +1332,51 @@ static void via_rhine_interrupt(int irq, void *dev_instance, struct pt_regs *rgs
 
 	ioaddr = dev->base_addr;
 	
-	while ((intr_status = readw(ioaddr + IntrStatus))) {
+	while ((intr_status = get_intr_status(dev))) {
 		/* Acknowledge all of the current interrupt sources ASAP. */
+		if (intr_status & IntrTxDescRace)
+			writeb(0x08, ioaddr + IntrStatus2);
 		writew(intr_status & 0xffff, ioaddr + IntrStatus);
+		IOSYNC;
 
 		if (debug > 4)
-			printk(KERN_DEBUG "%s: Interrupt, status %4.4x.\n",
+			printk(KERN_DEBUG "%s: Interrupt, status %8.8x.\n",
 				   dev->name, intr_status);
 
 		if (intr_status & (IntrRxDone | IntrRxErr | IntrRxDropped |
 						   IntrRxWakeUp | IntrRxEmpty | IntrRxNoBuf))
 			via_rhine_rx(dev);
 
-		if (intr_status & (IntrTxDone | IntrTxError | IntrTxUnderrun |
-						   IntrTxAborted))
+		if (intr_status & (IntrTxErrSummary | IntrTxDone)) {
+			if (intr_status & IntrTxErrSummary) {
+				int cnt = 20;
+				/* Avoid scavenging before Tx engine turned off */
+				while ((readw(ioaddr+ChipCmd) & CmdTxOn) && --cnt)
+					udelay(5);
+				if (debug > 2 && !cnt)
+					printk(KERN_WARNING "%s: via_rhine_interrupt() "
+						   "Tx engine still on.\n",
+						   dev->name);
+			}
 			via_rhine_tx(dev);
+		}
 
 		/* Abnormal error summary/uncommon events handlers. */
 		if (intr_status & (IntrPCIErr | IntrLinkChange |
 				   IntrStatsMax | IntrTxError | IntrTxAborted |
-				   IntrTxUnderrun))
+				   IntrTxUnderrun | IntrTxDescRace))
 			via_rhine_error(dev, intr_status);
 
 		if (--boguscnt < 0) {
 			printk(KERN_WARNING "%s: Too much work at interrupt, "
-				   "status=0x%4.4x.\n",
+				   "status=%#8.8x.\n",
 				   dev->name, intr_status);
 			break;
 		}
 	}
 
 	if (debug > 3)
-		printk(KERN_DEBUG "%s: exiting interrupt, status=%4.4x.\n",
+		printk(KERN_DEBUG "%s: exiting interrupt, status=%8.8x.\n",
 			   dev->name, readw(ioaddr + IntrStatus));
 }
 
@@ -1512,7 +1554,8 @@ static void via_rhine_rx(struct net_device *dev)
 	}
 
 	/* Pre-emptively restart Rx engine. */
-	writew(CmdRxDemand | np->chip_cmd, dev->base_addr + ChipCmd);
+	writew(readw(dev->base_addr + ChipCmd) | CmdRxOn | CmdRxDemand,
+		   dev->base_addr + ChipCmd);
 }
 
 /* Clears the "tally counters" for CRC errors and missed frames(?).
@@ -1526,15 +1569,35 @@ static inline void clear_tally_counters(const long ioaddr)
 	readw(ioaddr + RxMissed);
 }
 
-static inline void via_rhine_restart_tx(struct net_device *dev) {
+static void via_rhine_restart_tx(struct net_device *dev) {
 	struct netdev_private *np = dev->priv;
+	long ioaddr = dev->base_addr;
 	int entry = np->dirty_tx % TX_RING_SIZE;
+	u32 intr_status;
 
-	/* We know better than the chip where it should continue */
+	/*
+	 * If new errors occured, we need to sort them out before doing Tx.
+	 * In that case the ISR will be back here RSN anyway.
+	 */
+	intr_status = get_intr_status(dev);
+
+	if ((intr_status & IntrTxErrSummary) == 0) {
+
+		/* We know better than the chip where it should continue. */
 		writel(np->tx_ring_dma + entry * sizeof(struct tx_desc),
-		   dev->base_addr + TxRingPtr);
+			   ioaddr + TxRingPtr);
+
+		writew(CmdTxDemand | np->chip_cmd, ioaddr + ChipCmd);
+		IOSYNC;
+	}
+	else {
+		/* This should never happen */
+		if (debug > 1)
+			printk(KERN_WARNING "%s: via_rhine_restart_tx() "
+				   "Another error occured %8.8x.\n",
+				   dev->name, intr_status);
+	}
 
-	writew(CmdTxDemand | np->chip_cmd, dev->base_addr + ChipCmd);
 }
 
 static void via_rhine_error(struct net_device *dev, int intr_status)
@@ -1564,9 +1627,8 @@ static void via_rhine_error(struct net_device *dev, int intr_status)
 	}
 	if (intr_status & IntrTxAborted) {
 		if (debug > 1)
-			printk(KERN_INFO "%s: Abort %4.4x, frame dropped.\n",
+			printk(KERN_INFO "%s: Abort %8.8x, frame dropped.\n",
 				   dev->name, intr_status);
-		via_rhine_restart_tx(dev);
 	}
 	if (intr_status & IntrTxUnderrun) {
 		if (np->tx_thresh < 0xE0)
@@ -1575,15 +1637,21 @@ static void via_rhine_error(struct net_device *dev, int intr_status)
 			printk(KERN_INFO "%s: Transmitter underrun, Tx "
 				   "threshold now %2.2x.\n",
 				   dev->name, np->tx_thresh);
-		via_rhine_restart_tx(dev);
 	}
+	if (intr_status & IntrTxDescRace) {
+		if (debug > 2)
+			printk(KERN_INFO "%s: Tx descriptor write-back race.\n",
+				   dev->name);
+	}
+	if (intr_status & ( IntrTxAborted | IntrTxUnderrun | IntrTxDescRace ))
+		via_rhine_restart_tx(dev);
+
 	if (intr_status & ~( IntrLinkChange | IntrStatsMax | IntrTxUnderrun |
- 						 IntrTxError | IntrTxAborted | IntrNormalSummary)) {
+ 						 IntrTxError | IntrTxAborted | IntrNormalSummary |
+						 IntrTxDescRace )) {
 		if (debug > 1)
-			printk(KERN_ERR "%s: Something Wicked happened! %4.4x.\n",
+			printk(KERN_ERR "%s: Something Wicked happened! %8.8x.\n",
 				   dev->name, intr_status);
-		/* Recovery for other fault sources not known. */
-		writew(CmdTxDemand | np->chip_cmd, dev->base_addr + ChipCmd);
 	}
 
 	spin_unlock (&np->lock);

include/linux/ghash.h

-/*
- * include/linux/ghash.h -- generic hashing with fuzzy retrieval
- *
- * (C) 1997 Thomas Schoebel-Theuer
- *
- * The algorithms implemented here seem to be a completely new invention,
- * and I'll publish the fundamentals in a paper.
- */
-
-#ifndef _GHASH_H
-#define _GHASH_H
-/* HASHSIZE _must_ be a power of two!!! */
-
-
-#define DEF_HASH_FUZZY_STRUCTS(NAME,HASHSIZE,TYPE) \
-\
-struct NAME##_table {\
-	TYPE * hashtable[HASHSIZE];\
-	TYPE * sorted_list;\
-	int nr_entries;\
-};\
-\
-struct NAME##_ptrs {\
-	TYPE * next_hash;\
-	TYPE * prev_hash;\
-	TYPE * next_sorted;\
-	TYPE * prev_sorted;\
-};
-
-#define DEF_HASH_FUZZY(LINKAGE,NAME,HASHSIZE,TYPE,PTRS,KEYTYPE,KEY,KEYCMP,KEYEQ,HASHFN)\
-\
-LINKAGE void insert_##NAME##_hash(struct NAME##_table * tbl, TYPE * elem)\
-{\
-	int ix = HASHFN(elem->KEY);\
-	TYPE ** base = &tbl->hashtable[ix];\
-	TYPE * ptr = *base;\
-	TYPE * prev = NULL;\
-\
-	tbl->nr_entries++;\
-	while(ptr && KEYCMP(ptr->KEY, elem->KEY)) {\
-		base = &ptr->PTRS.next_hash;\
-		prev = ptr;\
-		ptr = *base;\
-	}\
-	elem->PTRS.next_hash = ptr;\
-	elem->PTRS.prev_hash = prev;\
-	if(ptr) {\
-		ptr->PTRS.prev_hash = elem;\
-	}\
-	*base = elem;\
-\
-	ptr = prev;\
-	if(!ptr) {\
-		ptr = tbl->sorted_list;\
-		prev = NULL;\
-	} else {\
-		prev = ptr->PTRS.prev_sorted;\
-	}\
-	while(ptr) {\
-		TYPE * next = ptr->PTRS.next_hash;\
-		if(next && KEYCMP(next->KEY, elem->KEY)) {\
-			prev = ptr;\
-			ptr = next;\
-		} else if(KEYCMP(ptr->KEY, elem->KEY)) {\
-			prev = ptr;\
-			ptr = ptr->PTRS.next_sorted;\
-		} else\
-			break;\
-	}\
-	elem->PTRS.next_sorted = ptr;\
-	elem->PTRS.prev_sorted = prev;\
-	if(ptr) {\
-		ptr->PTRS.prev_sorted = elem;\
-	}\
-	if(prev) {\
-		prev->PTRS.next_sorted = elem;\
-	} else {\
-		tbl->sorted_list = elem;\
-	}\
-}\
-\
-LINKAGE void remove_##NAME##_hash(struct NAME##_table * tbl, TYPE * elem)\
-{\
-	TYPE * next = elem->PTRS.next_hash;\
-	TYPE * prev = elem->PTRS.prev_hash;\
-\
-	tbl->nr_entries--;\
-	if(next)\
-		next->PTRS.prev_hash = prev;\
-	if(prev)\
-		prev->PTRS.next_hash = next;\
-	else {\
-		int ix = HASHFN(elem->KEY);\
-		tbl->hashtable[ix] = next;\
-	}\
-\
-	next = elem->PTRS.next_sorted;\
-	prev = elem->PTRS.prev_sorted;\
-	if(next)\
-		next->PTRS.prev_sorted = prev;\
-	if(prev)\
-		prev->PTRS.next_sorted = next;\
-	else\
-		tbl->sorted_list = next;\
-}\
-\
-LINKAGE TYPE * find_##NAME##_hash(struct NAME##_table * tbl, KEYTYPE pos)\
-{\
-	int ix = hashfn(pos);\
-	TYPE * ptr = tbl->hashtable[ix];\
-	while(ptr && KEYCMP(ptr->KEY, pos))\
-		ptr = ptr->PTRS.next_hash;\
-	if(ptr && !KEYEQ(ptr->KEY, pos))\
-		ptr = NULL;\
-	return ptr;\
-}\
-\
-LINKAGE TYPE * find_##NAME##_hash_fuzzy(struct NAME##_table * tbl, KEYTYPE pos)\
-{\
-	int ix;\
-	int offset;\
-	TYPE * ptr;\
-	TYPE * next;\
-\
-	ptr = tbl->sorted_list;\
-	if(!ptr || KEYCMP(pos, ptr->KEY))\
-		return NULL;\
-	ix = HASHFN(pos);\
-	offset = HASHSIZE;\
-	do {\
-		offset >>= 1;\
-		next = tbl->hashtable[(ix+offset) & ((HASHSIZE)-1)];\
-		if(next && (KEYCMP(next->KEY, pos) || KEYEQ(next->KEY, pos))\
-		   && KEYCMP(ptr->KEY, next->KEY))\
-			ptr = next;\
-	} while(offset);\
-\
-	for(;;) {\
-		next = ptr->PTRS.next_hash;\
-		if(next) {\
-			if(KEYCMP(next->KEY, pos)) {\
-				ptr = next;\
-				continue;\
-			}\
-		}\
-		next = ptr->PTRS.next_sorted;\
-		if(next && KEYCMP(next->KEY, pos)) {\
-			ptr = next;\
-			continue;\
-		}\
-		return ptr;\
-	}\
-	return NULL;\
-}
-
-#define DEF_HASH_STRUCTS(NAME,HASHSIZE,TYPE) \
-\
-struct NAME##_table {\
-	TYPE * hashtable[HASHSIZE];\
-	int nr_entries;\
-};\
-\
-struct NAME##_ptrs {\
-	TYPE * next_hash;\
-	TYPE * prev_hash;\
-};
-
-#define DEF_HASH(LINKAGE,NAME,HASHSIZE,TYPE,PTRS,KEYTYPE,KEY,KEYCMP,KEYEQ,HASHFN)\
-\
-LINKAGE void insert_##NAME##_hash(struct NAME##_table * tbl, TYPE * elem)\
-{\
-	int ix = HASHFN(elem->KEY);\
-	TYPE ** base = &tbl->hashtable[ix];\
-	TYPE * ptr = *base;\
-	TYPE * prev = NULL;\
-\
-	tbl->nr_entries++;\
-	while(ptr && KEYCMP(ptr->KEY, elem->KEY)) {\
-		base = &ptr->PTRS.next_hash;\
-		prev = ptr;\
-		ptr = *base;\
-	}\
-	elem->PTRS.next_hash = ptr;\
-	elem->PTRS.prev_hash = prev;\
-	if(ptr) {\
-		ptr->PTRS.prev_hash = elem;\
-	}\
-	*base = elem;\
-}\
-\
-LINKAGE void remove_##NAME##_hash(struct NAME##_table * tbl, TYPE * elem)\
-{\
-	TYPE * next = elem->PTRS.next_hash;\
-	TYPE * prev = elem->PTRS.prev_hash;\
-\
-	tbl->nr_entries--;\
-	if(next)\
-		next->PTRS.prev_hash = prev;\
-	if(prev)\
-		prev->PTRS.next_hash = next;\
-	else {\
-		int ix = HASHFN(elem->KEY);\
-		tbl->hashtable[ix] = next;\
-	}\
-}\
-\
-LINKAGE TYPE * find_##NAME##_hash(struct NAME##_table * tbl, KEYTYPE pos)\
-{\
-	int ix = hashfn(pos);\
-	TYPE * ptr = tbl->hashtable[ix];\
-	while(ptr && KEYCMP(ptr->KEY, pos))\
-		ptr = ptr->PTRS.next_hash;\
-	if(ptr && !KEYEQ(ptr->KEY, pos))\
-		ptr = NULL;\
-	return ptr;\
-}
-
-#endif

include/linux/net.h

@@ -210,23 +210,23 @@ SOCKCALL_WRAP(name, mmap, (struct file *file, struct socket *sock, struct vm_are
 	      (file, sock, vma)) \
 	      \
 static struct proto_ops name##_ops = {			\
-	family:		fam,				\
+	.family		= fam,				\
 							\
-	release:	__lock_##name##_release,	\
-	bind:		__lock_##name##_bind,		\
-	connect:	__lock_##name##_connect,	\
-	socketpair:	__lock_##name##_socketpair,	\
-	accept:		__lock_##name##_accept,		\
-	getname:	__lock_##name##_getname,	\
-	poll:		__lock_##name##_poll,		\
-	ioctl:		__lock_##name##_ioctl,		\
-	listen:		__lock_##name##_listen,		\
-	shutdown:	__lock_##name##_shutdown,	\
-	setsockopt:	__lock_##name##_setsockopt,	\
-	getsockopt:	__lock_##name##_getsockopt,	\
-	sendmsg:	__lock_##name##_sendmsg,	\
-	recvmsg:	__lock_##name##_recvmsg,	\
-	mmap:		__lock_##name##_mmap,		\
+	.release	= __lock_##name##_release,	\
+	.bind		= __lock_##name##_bind,		\
+	.connect	= __lock_##name##_connect,	\
+	.socketpair	= __lock_##name##_socketpair,	\
+	.accept		= __lock_##name##_accept,	\
+	.getname	= __lock_##name##_getname,	\
+	.poll		= __lock_##name##_poll,		\
+	.ioctl		= __lock_##name##_ioctl,	\
+	.listen		= __lock_##name##_listen,	\
+	.shutdown	= __lock_##name##_shutdown,	\
+	.setsockopt	= __lock_##name##_setsockopt,	\
+	.getsockopt	= __lock_##name##_getsockopt,	\
+	.sendmsg	= __lock_##name##_sendmsg,	\
+	.recvmsg	= __lock_##name##_recvmsg,	\
+	.mmap		= __lock_##name##_mmap,		\
 };
 #endif
 

kernel/posix-timers.c

@@ -1207,7 +1207,7 @@ do_clock_nanosleep(clockid_t which_clock, int flags, struct timespec *tsave)
 {
 	struct timespec t;
 	struct timer_list new_timer;
-	struct abs_struct abs_struct = { list:{next:0} };
+	struct abs_struct abs_struct = { .list = { .next = 0 } };
 	int abs;
 	int rtn = 0;
 	int active;

sound/oss/ad1848.c

@@ -2987,7 +2987,7 @@ static struct pnp_dev *activate_dev(char *devname, char *resname, struct pnp_dev
 	if (err < 0)
 		return(NULL);
 
-	if((err = pnp_activate_dev(dev,NULL)) < 0) {
+	if((err = pnp_activate_dev(dev)) < 0) {
 		printk(KERN_ERR "ad1848: %s %s config failed (out of resources?)[%d]\n", devname, resname, err);
 
 		pnp_device_detach(dev);
@@ -3024,7 +3024,7 @@ static struct pnp_dev *ad1848_init_generic(struct pnp_card *bus, struct address_
 
 static int __init ad1848_isapnp_init(struct address_info *hw_config, struct pnp_card *bus, int slot)
 {
-	char *busname = bus->name[0] ? bus->name : ad1848_isapnp_list[slot].name;
+	char *busname = bus->dev.name[0] ? bus->dev.name : ad1848_isapnp_list[slot].name;
 
 	/* Initialize this baby. */