i40e: fix write-back-on-itr to work with legacy itr
BugLink: http://bugs.launchpad.net/bugs/1547674 We were not doing write-back on interrupt throttle for Legacy case in X722. This patch fixes that, so we do WB_ON_ITR for Legacy as well. Plus the issue that we should still be setting NO_ITR if we are touching the DYN_CTLN register since we do not want to change ITR setting here. Change-ID: I5db8491ee1544118a389db839cecc93e1bbc480e Signed-off-by: Anjali Singhai Jain <anjali.singhai@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> (cherry picked from net-next commit a3d772a3) Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
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