Commit 545f3bcf authored by Nobuhiro Iwamatsu's avatar Nobuhiro Iwamatsu Committed by Paul Mundt

sh: sh3: Change the specification method of IRQ to SCIx_IRQ_MUXED

Some SCIF devices specify the same IRQ. We can use SCIx_IRQ_MUXED for this.
And change use to evt2irq(), without specifying the value of IRQ directly.
This is correction to the SH3 series.
Signed-off-by: default avatarNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
parent 51edfb33
...@@ -75,7 +75,7 @@ static struct plat_sci_port scif0_platform_data = { ...@@ -75,7 +75,7 @@ static struct plat_sci_port scif0_platform_data = {
SCSCR_RE | SCSCR_CKE1 | SCSCR_CKE0, SCSCR_RE | SCSCR_CKE1 | SCSCR_CKE0,
.scbrr_algo_id = SCBRR_ALGO_4, .scbrr_algo_id = SCBRR_ALGO_4,
.type = PORT_SCIF, .type = PORT_SCIF,
.irqs = { 56, 56, 56 }, .irqs = SCIx_IRQ_MUXED(evt2irq(0x900)),
.ops = &sh770x_sci_port_ops, .ops = &sh770x_sci_port_ops,
.regtype = SCIx_SH7705_SCIF_REGTYPE, .regtype = SCIx_SH7705_SCIF_REGTYPE,
}; };
...@@ -94,7 +94,7 @@ static struct plat_sci_port scif1_platform_data = { ...@@ -94,7 +94,7 @@ static struct plat_sci_port scif1_platform_data = {
.scscr = SCSCR_TIE | SCSCR_RIE | SCSCR_TE | SCSCR_RE, .scscr = SCSCR_TIE | SCSCR_RIE | SCSCR_TE | SCSCR_RE,
.scbrr_algo_id = SCBRR_ALGO_4, .scbrr_algo_id = SCBRR_ALGO_4,
.type = PORT_SCIF, .type = PORT_SCIF,
.irqs = { 52, 52, 52 }, .irqs = SCIx_IRQ_MUXED(evt2irq(0x880)),
.ops = &sh770x_sci_port_ops, .ops = &sh770x_sci_port_ops,
.regtype = SCIx_SH7705_SCIF_REGTYPE, .regtype = SCIx_SH7705_SCIF_REGTYPE,
}; };
......
...@@ -114,7 +114,7 @@ static struct plat_sci_port scif0_platform_data = { ...@@ -114,7 +114,7 @@ static struct plat_sci_port scif0_platform_data = {
.scscr = SCSCR_TE | SCSCR_RE, .scscr = SCSCR_TE | SCSCR_RE,
.scbrr_algo_id = SCBRR_ALGO_2, .scbrr_algo_id = SCBRR_ALGO_2,
.type = PORT_SCI, .type = PORT_SCI,
.irqs = { 23, 23, 23, 0 }, .irqs = SCIx_IRQ_MUXED(evt2irq(0x4E0)),
.ops = &sh770x_sci_port_ops, .ops = &sh770x_sci_port_ops,
.regshift = 1, .regshift = 1,
}; };
...@@ -135,7 +135,7 @@ static struct plat_sci_port scif1_platform_data = { ...@@ -135,7 +135,7 @@ static struct plat_sci_port scif1_platform_data = {
.scscr = SCSCR_TE | SCSCR_RE, .scscr = SCSCR_TE | SCSCR_RE,
.scbrr_algo_id = SCBRR_ALGO_2, .scbrr_algo_id = SCBRR_ALGO_2,
.type = PORT_SCIF, .type = PORT_SCIF,
.irqs = { 56, 56, 56, 56 }, .irqs = SCIx_IRQ_MUXED(evt2irq(0x900)),
.ops = &sh770x_sci_port_ops, .ops = &sh770x_sci_port_ops,
.regtype = SCIx_SH3_SCIF_REGTYPE, .regtype = SCIx_SH3_SCIF_REGTYPE,
}; };
...@@ -157,7 +157,7 @@ static struct plat_sci_port scif2_platform_data = { ...@@ -157,7 +157,7 @@ static struct plat_sci_port scif2_platform_data = {
.scscr = SCSCR_TE | SCSCR_RE, .scscr = SCSCR_TE | SCSCR_RE,
.scbrr_algo_id = SCBRR_ALGO_2, .scbrr_algo_id = SCBRR_ALGO_2,
.type = PORT_IRDA, .type = PORT_IRDA,
.irqs = { 52, 52, 52, 52 }, .irqs = SCIx_IRQ_MUXED(evt2irq(0x880)),
.ops = &sh770x_sci_port_ops, .ops = &sh770x_sci_port_ops,
.regshift = 1, .regshift = 1,
}; };
......
...@@ -103,7 +103,7 @@ static struct plat_sci_port scif0_platform_data = { ...@@ -103,7 +103,7 @@ static struct plat_sci_port scif0_platform_data = {
SCSCR_CKE1 | SCSCR_CKE0, SCSCR_CKE1 | SCSCR_CKE0,
.scbrr_algo_id = SCBRR_ALGO_2, .scbrr_algo_id = SCBRR_ALGO_2,
.type = PORT_SCIF, .type = PORT_SCIF,
.irqs = { 52, 52, 52, 52 }, .irqs = SCIx_IRQ_MUXED(evt2irq(0x880)),
}; };
static struct platform_device scif0_device = { static struct platform_device scif0_device = {
...@@ -121,7 +121,7 @@ static struct plat_sci_port scif1_platform_data = { ...@@ -121,7 +121,7 @@ static struct plat_sci_port scif1_platform_data = {
SCSCR_CKE1 | SCSCR_CKE0, SCSCR_CKE1 | SCSCR_CKE0,
.scbrr_algo_id = SCBRR_ALGO_2, .scbrr_algo_id = SCBRR_ALGO_2,
.type = PORT_SCIF, .type = PORT_SCIF,
.irqs = { 56, 56, 56, 56 }, .irqs = SCIx_IRQ_MUXED(evt2irq(0x900)),
}; };
static struct platform_device scif1_device = { static struct platform_device scif1_device = {
......
...@@ -55,7 +55,7 @@ static struct plat_sci_port scif0_platform_data = { ...@@ -55,7 +55,7 @@ static struct plat_sci_port scif0_platform_data = {
.scscr = SCSCR_RE | SCSCR_TE, .scscr = SCSCR_RE | SCSCR_TE,
.scbrr_algo_id = SCBRR_ALGO_4, .scbrr_algo_id = SCBRR_ALGO_4,
.type = PORT_SCIF, .type = PORT_SCIF,
.irqs = { 80, 80, 80, 80 }, .irqs = SCIx_IRQ_MUXED(evt2irq(0xC00)),
.ops = &sh7720_sci_port_ops, .ops = &sh7720_sci_port_ops,
.regtype = SCIx_SH7705_SCIF_REGTYPE, .regtype = SCIx_SH7705_SCIF_REGTYPE,
}; };
...@@ -74,7 +74,7 @@ static struct plat_sci_port scif1_platform_data = { ...@@ -74,7 +74,7 @@ static struct plat_sci_port scif1_platform_data = {
.scscr = SCSCR_RE | SCSCR_TE, .scscr = SCSCR_RE | SCSCR_TE,
.scbrr_algo_id = SCBRR_ALGO_4, .scbrr_algo_id = SCBRR_ALGO_4,
.type = PORT_SCIF, .type = PORT_SCIF,
.irqs = { 81, 81, 81, 81 }, .irqs = SCIx_IRQ_MUXED(evt2irq(0xC20)),
.ops = &sh7720_sci_port_ops, .ops = &sh7720_sci_port_ops,
.regtype = SCIx_SH7705_SCIF_REGTYPE, .regtype = SCIx_SH7705_SCIF_REGTYPE,
}; };
......
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