ASoC: Intel: bxtn: Disable interrupt when DSP is in D3
When DSP is in D3, no interrupts are expected, so disable interrupt while entering D3. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
Showing
Please register or sign in to comment