Commit 552c8f76 authored by kbuild test robot's avatar kbuild test robot Committed by Alex Deucher

drm/amdgpu/gfx9: gfx_v9_0_enable_gfx_static_mg_power_gating() can be static

Signed-off-by: default avatarFengguang Wu <fengguang.wu@intel.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent f03defe0
...@@ -1964,8 +1964,8 @@ static void gfx_v9_0_enable_gfx_pipeline_powergating(struct amdgpu_device *adev, ...@@ -1964,8 +1964,8 @@ static void gfx_v9_0_enable_gfx_pipeline_powergating(struct amdgpu_device *adev,
data = RREG32(SOC15_REG_OFFSET(GC, 0, mmDB_RENDER_CONTROL)); data = RREG32(SOC15_REG_OFFSET(GC, 0, mmDB_RENDER_CONTROL));
} }
void gfx_v9_0_enable_gfx_static_mg_power_gating(struct amdgpu_device *adev, static void gfx_v9_0_enable_gfx_static_mg_power_gating(struct amdgpu_device *adev,
bool enable) bool enable)
{ {
uint32_t data, default_data; uint32_t data, default_data;
...@@ -1978,7 +1978,7 @@ void gfx_v9_0_enable_gfx_static_mg_power_gating(struct amdgpu_device *adev, ...@@ -1978,7 +1978,7 @@ void gfx_v9_0_enable_gfx_static_mg_power_gating(struct amdgpu_device *adev,
WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL), data); WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL), data);
} }
void gfx_v9_0_enable_gfx_dynamic_mg_power_gating(struct amdgpu_device *adev, static void gfx_v9_0_enable_gfx_dynamic_mg_power_gating(struct amdgpu_device *adev,
bool enable) bool enable)
{ {
uint32_t data, default_data; uint32_t data, default_data;
......
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