Commit 55aedef5 authored by Andy Shevchenko's avatar Andy Shevchenko Committed by Linus Walleij

pinctrl: intel: Do pin translation when lock IRQ

Default GPIOLIB callbacks for request and release IRQ do not do a GPIO
to pin translation which is necessary for Intel hardware, such as Intel
Cannonlake. Absence of the translation prevents some pins to be locked
as IRQ due to direction check. Introduce own callbacks to make
translation possible to avoid above issue.

Fixes: a60eac32 ("pinctrl: intel: Allow custom GPIO base for pad groups")
Signed-off-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: default avatarMika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent b4859f3e
......@@ -872,6 +872,34 @@ static int intel_gpio_to_pin(struct intel_pinctrl *pctrl, unsigned offset,
return -EINVAL;
}
static int intel_gpio_irq_reqres(struct irq_data *d)
{
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
struct intel_pinctrl *pctrl = gpiochip_get_data(gc);
int pin;
pin = intel_gpio_to_pin(pctrl, irqd_to_hwirq(d), NULL, NULL);
if (pin >= 0) {
if (gpiochip_lock_as_irq(gc, pin)) {
dev_err(pctrl->dev, "unable to lock HW IRQ %d for IRQ\n",
pin);
return -EINVAL;
}
}
return 0;
}
static void intel_gpio_irq_relres(struct irq_data *d)
{
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
struct intel_pinctrl *pctrl = gpiochip_get_data(gc);
int pin;
pin = intel_gpio_to_pin(pctrl, irqd_to_hwirq(d), NULL, NULL);
if (pin >= 0)
gpiochip_unlock_as_irq(gc, pin);
}
static void intel_gpio_irq_ack(struct irq_data *d)
{
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
......@@ -1087,6 +1115,8 @@ static irqreturn_t intel_gpio_irq(int irq, void *data)
static struct irq_chip intel_gpio_irqchip = {
.name = "intel-gpio",
.irq_request_resources = intel_gpio_irq_reqres,
.irq_release_resources = intel_gpio_irq_relres,
.irq_enable = intel_gpio_irq_enable,
.irq_ack = intel_gpio_irq_ack,
.irq_mask = intel_gpio_irq_mask,
......
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