Commit 55e1040e authored by John Youn's avatar John Youn Committed by Felipe Balbi

usb: dwc2: Improve handling of host and device hwparams

Adds separate functions to get the host and device specific hardware
parameters. The functions check whether the parameters need to be read
at all, depending on dr_mode, and forces the mode only if necessary.
This saves some delays during probe. This also adds two device mode
parameters that will be used by the gadget.
Signed-off-by: default avatarJohn Youn <johnyoun@synopsys.com>
Signed-off-by: default avatarFelipe Balbi <balbi@ti.com>
parent 09c96980
...@@ -3218,6 +3218,63 @@ static bool dwc2_force_mode_if_needed(struct dwc2_hsotg *hsotg, bool host) ...@@ -3218,6 +3218,63 @@ static bool dwc2_force_mode_if_needed(struct dwc2_hsotg *hsotg, bool host)
return dwc2_force_mode(hsotg, host); return dwc2_force_mode(hsotg, host);
} }
/*
* Gets host hardware parameters. Forces host mode if not currently in
* host mode. Should be called immediately after a core soft reset in
* order to get the reset values.
*/
static void dwc2_get_host_hwparams(struct dwc2_hsotg *hsotg)
{
struct dwc2_hw_params *hw = &hsotg->hw_params;
u32 gnptxfsiz;
u32 hptxfsiz;
bool forced;
if (hsotg->dr_mode == USB_DR_MODE_PERIPHERAL)
return;
forced = dwc2_force_mode_if_needed(hsotg, true);
gnptxfsiz = dwc2_readl(hsotg->regs + GNPTXFSIZ);
hptxfsiz = dwc2_readl(hsotg->regs + HPTXFSIZ);
dev_dbg(hsotg->dev, "gnptxfsiz=%08x\n", gnptxfsiz);
dev_dbg(hsotg->dev, "hptxfsiz=%08x\n", hptxfsiz);
if (forced)
dwc2_clear_force_mode(hsotg);
hw->host_nperio_tx_fifo_size = (gnptxfsiz & FIFOSIZE_DEPTH_MASK) >>
FIFOSIZE_DEPTH_SHIFT;
hw->host_perio_tx_fifo_size = (hptxfsiz & FIFOSIZE_DEPTH_MASK) >>
FIFOSIZE_DEPTH_SHIFT;
}
/*
* Gets device hardware parameters. Forces device mode if not
* currently in device mode. Should be called immediately after a core
* soft reset in order to get the reset values.
*/
static void dwc2_get_dev_hwparams(struct dwc2_hsotg *hsotg)
{
struct dwc2_hw_params *hw = &hsotg->hw_params;
bool forced;
u32 gnptxfsiz;
if (hsotg->dr_mode == USB_DR_MODE_HOST)
return;
forced = dwc2_force_mode_if_needed(hsotg, false);
gnptxfsiz = dwc2_readl(hsotg->regs + GNPTXFSIZ);
dev_dbg(hsotg->dev, "gnptxfsiz=%08x\n", gnptxfsiz);
if (forced)
dwc2_clear_force_mode(hsotg);
hw->dev_nperio_tx_fifo_size = (gnptxfsiz & FIFOSIZE_DEPTH_MASK) >>
FIFOSIZE_DEPTH_SHIFT;
}
/** /**
* During device initialization, read various hardware configuration * During device initialization, read various hardware configuration
* registers and interpret the contents. * registers and interpret the contents.
...@@ -3230,8 +3287,7 @@ int dwc2_get_hwparams(struct dwc2_hsotg *hsotg) ...@@ -3230,8 +3287,7 @@ int dwc2_get_hwparams(struct dwc2_hsotg *hsotg)
struct dwc2_hw_params *hw = &hsotg->hw_params; struct dwc2_hw_params *hw = &hsotg->hw_params;
unsigned width; unsigned width;
u32 hwcfg1, hwcfg2, hwcfg3, hwcfg4; u32 hwcfg1, hwcfg2, hwcfg3, hwcfg4;
u32 hptxfsiz, grxfsiz, gnptxfsiz; u32 grxfsiz;
u32 gusbcfg = 0;
int retval; int retval;
/* /*
...@@ -3268,22 +3324,16 @@ int dwc2_get_hwparams(struct dwc2_hsotg *hsotg) ...@@ -3268,22 +3324,16 @@ int dwc2_get_hwparams(struct dwc2_hsotg *hsotg)
dev_dbg(hsotg->dev, "hwcfg4=%08x\n", hwcfg4); dev_dbg(hsotg->dev, "hwcfg4=%08x\n", hwcfg4);
dev_dbg(hsotg->dev, "grxfsiz=%08x\n", grxfsiz); dev_dbg(hsotg->dev, "grxfsiz=%08x\n", grxfsiz);
/* Force host mode to get HPTXFSIZ / GNPTXFSIZ exact power on value */ /*
if (hsotg->dr_mode != USB_DR_MODE_HOST) { * Host specific hardware parameters. Reading these parameters
gusbcfg = dwc2_readl(hsotg->regs + GUSBCFG); * requires the controller to be in host mode. The mode will
dwc2_writel(gusbcfg | GUSBCFG_FORCEHOSTMODE, * be forced, if necessary, to read these values.
hsotg->regs + GUSBCFG); */
usleep_range(25000, 50000); dwc2_get_host_hwparams(hsotg);
} dwc2_get_dev_hwparams(hsotg);
gnptxfsiz = dwc2_readl(hsotg->regs + GNPTXFSIZ); /* hwcfg1 */
hptxfsiz = dwc2_readl(hsotg->regs + HPTXFSIZ); hw->dev_ep_dirs = hwcfg1;
dev_dbg(hsotg->dev, "gnptxfsiz=%08x\n", gnptxfsiz);
dev_dbg(hsotg->dev, "hptxfsiz=%08x\n", hptxfsiz);
if (hsotg->dr_mode != USB_DR_MODE_HOST) {
dwc2_writel(gusbcfg, hsotg->regs + GUSBCFG);
usleep_range(25000, 50000);
}
/* hwcfg2 */ /* hwcfg2 */
hw->op_mode = (hwcfg2 & GHWCFG2_OP_MODE_MASK) >> hw->op_mode = (hwcfg2 & GHWCFG2_OP_MODE_MASK) >>
...@@ -3339,10 +3389,6 @@ int dwc2_get_hwparams(struct dwc2_hsotg *hsotg) ...@@ -3339,10 +3389,6 @@ int dwc2_get_hwparams(struct dwc2_hsotg *hsotg)
/* fifo sizes */ /* fifo sizes */
hw->host_rx_fifo_size = (grxfsiz & GRXFSIZ_DEPTH_MASK) >> hw->host_rx_fifo_size = (grxfsiz & GRXFSIZ_DEPTH_MASK) >>
GRXFSIZ_DEPTH_SHIFT; GRXFSIZ_DEPTH_SHIFT;
hw->host_nperio_tx_fifo_size = (gnptxfsiz & FIFOSIZE_DEPTH_MASK) >>
FIFOSIZE_DEPTH_SHIFT;
hw->host_perio_tx_fifo_size = (hptxfsiz & FIFOSIZE_DEPTH_MASK) >>
FIFOSIZE_DEPTH_SHIFT;
dev_dbg(hsotg->dev, "Detected values from hardware:\n"); dev_dbg(hsotg->dev, "Detected values from hardware:\n");
dev_dbg(hsotg->dev, " op_mode=%d\n", dev_dbg(hsotg->dev, " op_mode=%d\n",
......
...@@ -459,6 +459,7 @@ struct dwc2_core_params { ...@@ -459,6 +459,7 @@ struct dwc2_core_params {
* 1 - 16 bits * 1 - 16 bits
* 2 - 8 or 16 bits * 2 - 8 or 16 bits
* @snpsid: Value from SNPSID register * @snpsid: Value from SNPSID register
* @dev_ep_dirs: Direction of device endpoints (GHWCFG1)
*/ */
struct dwc2_hw_params { struct dwc2_hw_params {
unsigned op_mode:3; unsigned op_mode:3;
...@@ -469,6 +470,7 @@ struct dwc2_hw_params { ...@@ -469,6 +470,7 @@ struct dwc2_hw_params {
unsigned en_multiple_tx_fifo:1; unsigned en_multiple_tx_fifo:1;
unsigned host_rx_fifo_size:16; unsigned host_rx_fifo_size:16;
unsigned host_nperio_tx_fifo_size:16; unsigned host_nperio_tx_fifo_size:16;
unsigned dev_nperio_tx_fifo_size:16;
unsigned host_perio_tx_fifo_size:16; unsigned host_perio_tx_fifo_size:16;
unsigned nperio_tx_q_depth:3; unsigned nperio_tx_q_depth:3;
unsigned host_perio_tx_q_depth:3; unsigned host_perio_tx_q_depth:3;
...@@ -485,6 +487,7 @@ struct dwc2_hw_params { ...@@ -485,6 +487,7 @@ struct dwc2_hw_params {
unsigned power_optimized:1; unsigned power_optimized:1;
unsigned utmi_phy_data_width:2; unsigned utmi_phy_data_width:2;
u32 snpsid; u32 snpsid;
u32 dev_ep_dirs;
}; };
/* Size of control and EP0 buffers */ /* Size of control and EP0 buffers */
......
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