Commit 59baa83e authored by David Virag's avatar David Virag Committed by Krzysztof Kozlowski

dt-bindings: clock: exynos7885: Add CMU_TOP PLL MUX indices

Add indices for missing MUX clocks from PLLs in CMU_TOP.
Signed-off-by: default avatarDavid Virag <virag.david003@gmail.com>
Link: https://lore.kernel.org/r/20240806121157.479212-3-virag.david003@gmail.comSigned-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
parent abf3a3ea
......@@ -69,6 +69,8 @@
#define CLK_GOUT_FSYS_MMC_EMBD 58
#define CLK_GOUT_FSYS_MMC_SDIO 59
#define CLK_GOUT_FSYS_USB30DRD 60
#define CLK_MOUT_SHARED0_PLL 61
#define CLK_MOUT_SHARED1_PLL 62
/* CMU_CORE */
#define CLK_MOUT_CORE_BUS_USER 1
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment