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Commit 59f5abe0 authored by Fran Hsu's avatar Fran Hsu Committed by Joel Stanley
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ARM: dts: nuvoton: Add Quanta GSJ BMC 

The Quanta GSJ BMC uses the Nuvoton NPCM730 SoC.

Included features:

 1. Image partitions
 2. PWM fan controller
 3. USB device
 4. Serial port
 5. FIU
 6. LEDs and GPIOs
Signed-off-by: default avatarFran Hsu <Fran.Hsu@quantatw.com>
Reviewed-by: default avatarBenjamin Fair <benjaminfair@google.com>
Signed-off-by: default avatarJoel Stanley <joel@jms.id.au>
parent c2a983a7
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Showing with 492 additions and 1 deletion
arch/arm/boot/dts/Makefile
View file @ 59f5abe0
......@@ -339,7 +339,8 @@ dtb-$(CONFIG_ARCH_LPC32XX) += \
lpc3250-ea3250.dtb \
lpc3250-phy3250.dtb
dtb-$(CONFIG_ARCH_NPCM7XX) += \
nuvoton-npcm750-evb.dtb
nuvoton-npcm750-evb.dtb \
nuvoton-npcm730-gsj.dtb
dtb-$(CONFIG_MACH_MESON6) += \
meson6-atv1200.dtb
dtb-$(CONFIG_MACH_MESON8) += \
......
arch/arm/boot/dts/nuvoton-npcm730-gsj.dts 0 → 100644
View file @ 59f5abe0
// SPDX-License-Identifier: GPL-2.0
// Copyright (c) 2019 Quanta Computer lnc. Fran.Hsu@quantatw.com
/dts-v1/;
#include "nuvoton-npcm730.dtsi"
#include "nuvoton-npcm730-gsj-gpio.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "Quanta GSJ Board (Device Tree v12)";
compatible = "nuvoton,npcm750";
aliases {
ethernet1 = &gmac0;
serial3 = &serial3;
i2c1 = &i2c1;
i2c2 = &i2c2;
i2c3 = &i2c3;
i2c4 = &i2c4;
i2c8 = &i2c8;
i2c9 = &i2c9;
i2c10 = &i2c10;
i2c11 = &i2c11;
i2c12 = &i2c12;
i2c15 = &i2c15;
fiu0 = &fiu0;
};
chosen {
stdout-path = &serial3;
};
memory {
reg = <0 0x40000000>;
};
leds {
compatible = "gpio-leds";
led-bmc-live {
gpios = <&gpio4 15 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
LED_U2_0_LOCATE {
gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
LED_U2_1_LOCATE {
gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
LED_U2_2_LOCATE {
gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
LED_U2_3_LOCATE {
gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
LED_U2_4_LOCATE {
gpios = <&gpio0 10 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
LED_U2_5_LOCATE {
gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
LED_BMC_TRAY_PWRGD {
gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
LED_U2_7_FAULT {
gpios = <&gpio6 8 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
LED_U2_6_LOCATE {
gpios = <&gpio0 24 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
LED_U2_7_LOCATE {
gpios = <&gpio0 25 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
LED_U2_0_FAULT {
gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
LED_U2_1_FAULT {
gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
LED_U2_2_FAULT {
gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
LED_U2_3_FAULT {
gpios = <&gpio2 23 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
LED_U2_4_FAULT {
gpios = <&gpio2 24 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
LED_U2_5_FAULT {
gpios = <&gpio2 25 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
LED_U2_6_FAULT {
gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
};
};
&fiu0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0cs1_pins>;
status = "okay";
spi-nor@0 {
compatible = "jedec,spi-nor";
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
spi-rx-bus-width = <2>;
partitions@80000000 {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
bmc@0{
label = "bmc";
reg = <0x000000 0x2000000>;
};
u-boot@0 {
label = "u-boot";
reg = <0x0000000 0x80000>;
read-only;
};
u-boot-env@100000{
label = "u-boot-env";
reg = <0x00100000 0x40000>;
};
kernel@200000 {
label = "kernel";
reg = <0x0200000 0x600000>;
};
rofs@800000 {
label = "rofs";
reg = <0x800000 0x1400000>;
};
rwfs@1c00000 {
label = "rwfs";
reg = <0x1c00000 0x300000>;
};
reserved@1f00000 {
label = "reserved";
reg = <0x1f00000 0x100000>;
};
};
};
};
&gmac0 {
phy-mode = "rgmii-id";
status = "okay";
};
&ehci1 {
status = "okay";
};
&watchdog1 {
status = "okay";
};
&rng {
status = "okay";
};
&serial0 {
status = "okay";
};
&serial1 {
status = "okay";
};
&serial2 {
status = "okay";
};
&serial3 {
status = "okay";
};
&adc {
status = "okay";
};
&i2c1 {
status = "okay";
lm75@5c {
compatible = "maxim,max31725";
reg = <0x5c>;
status = "okay";
};
};
&i2c2 {
status = "okay";
lm75@5c {
compatible = "maxim,max31725";
reg = <0x5c>;
status = "okay";
};
};
&i2c3 {
status = "okay";
lm75@5c {
compatible = "maxim,max31725";
reg = <0x5c>;
};
};
&i2c4 {
status = "okay";
lm75@5c {
compatible = "maxim,max31725";
reg = <0x5c>;
};
};
&i2c8 {
status = "okay";
};
&i2c9 {
status = "okay";
eeprom@55 {
compatible = "atmel,24c64";
reg = <0x55>;
};
};
&i2c10 {
status = "okay";
eeprom@55 {
compatible = "atmel,24c64";
reg = <0x55>;
};
};
&i2c11 {
status = "okay";
/* P12V Quarter Brick DC/DC Power Module Q54SH12050 @60 */
power-brick@36 {
compatible = "delta,dps800";
reg = <0x36>;
};
hotswap@15 {
compatible = "ti,lm5066i";
reg = <0x15>;
};
};
&i2c12 {
status = "okay";
ucd90160@6b {
compatible = "ti,ucd90160";
reg = <0x6b>;
};
};
&i2c15 {
status = "okay";
i2c-switch@75 {
compatible = "nxp,pca9548";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x75>;
i2c-mux-idle-disconnect;
i2c_u20: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
i2c_u21: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
i2c_u22: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
};
i2c_u23: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
};
i2c_u24: i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <4>;
};
i2c_u25: i2c@5 {
#address-cells = <1>;
#size-cells = <0>;
reg = <5>;
};
i2c_u26: i2c@6 {
#address-cells = <1>;
#size-cells = <0>;
reg = <6>;
};
i2c_u27: i2c@7 {
#address-cells = <1>;
#size-cells = <0>;
reg = <7>;
};
};
};
&pwm_fan {
pinctrl-names = "default";
pinctrl-0 = <&pwm0_pins &pwm1_pins &pwm2_pins
&fanin0_pins &fanin1_pins
&fanin2_pins &fanin3_pins
&fanin4_pins &fanin5_pins>;
status = "okay";
fan@0 {
reg = <0x00>;
fan-tach-ch = /bits/ 8 <0x00 0x01>;
cooling-levels = <127 255>;
};
fan@1 {
reg = <0x01>;
fan-tach-ch = /bits/ 8 <0x02 0x03>;
cooling-levels = /bits/ 8 <127 255>;
};
fan@2 {
reg = <0x02>;
fan-tach-ch = /bits/ 8 <0x04 0x05>;
cooling-levels = /bits/ 8 <127 255>;
};
};
&pinctrl {
pinctrl-names = "default";
pinctrl-0 = <
/* GPI pins*/
&gpio8_pins
&gpio9_pins
&gpio12_pins
&gpio13_pins
&gpio14_pins
&gpio60_pins
&gpio83_pins
&gpio91_pins
&gpio92_pins
&gpio95_pins
&gpio136_pins
&gpio137_pins
&gpio141_pins
&gpio144_pins
&gpio145_pins
&gpio146_pins
&gpio147_pins
&gpio148_pins
&gpio149_pins
&gpio150_pins
&gpio151_pins
&gpio152_pins
&gpio153_pins
&gpio154_pins
&gpio155_pins
&gpio156_pins
&gpio157_pins
&gpio158_pins
&gpio159_pins
&gpio161_pins
&gpio162_pins
&gpio163_pins
&gpio164_pins
&gpio165_pins
&gpio166_pins
&gpio167_pins
&gpio168_pins
&gpio169_pins
&gpio170_pins
&gpio177_pins
&gpio191_pins
&gpio192_pins
&gpio203_pins
/* GPO pins*/
&gpio0pp_pins
&gpio1pp_pins
&gpio2pp_pins
&gpio3pp_pins
&gpio4pp_pins
&gpio5pp_pins
&gpio6pp_pins
&gpio7pp_pins
&gpio10pp_pins
&gpio11pp_pins
&gpio15od_pins
&gpio17pp_pins
&gpio18pp_pins
&gpio19pp_pins
&gpio24pp_pins
&gpio25pp_pins
&gpio37od_pins
&gpio59pp_pins
&gpio72od_pins
&gpio73od_pins
&gpio74od_pins
&gpio75od_pins
&gpio76od_pins
&gpio77od_pins
&gpio78od_pins
&gpio79od_pins
&gpio84pp_pins
&gpio85pp_pins
&gpio86pp_pins
&gpio87pp_pins
&gpio88pp_pins
&gpio89pp_pins
&gpio90pp_pins
&gpio93pp_pins
&gpio94pp_pins
&gpio125pp_pins
&gpio126od_pins
&gpio127od_pins
&gpio142od_pins
&gpio143ol_pins
&gpio175od_pins
&gpio176od_pins
&gpio190od_pins
&gpio194pp_pins
&gpio195od_pins
&gpio196od_pins
&gpio197od_pins
&gpio198od_pins
&gpio199od_pins
&gpio200pp_pins
&gpio202od_pins
>;
};
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